Merge branch 'fixes' of git://git.armlinux.org.uk/~rmk/linux-arm
Pull ARM fixes from Russell King: "A fix for a regression on ARMv4T CPUs, and wiring up the new pkey syscalls for ARM" * 'fixes' of git://git.armlinux.org.uk/~rmk/linux-arm: ARM: wire up new pkey syscalls ARM: fix oops when using older ARMv4T CPUs
This commit is contained in:
commit
41ec793d2b
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@ -19,7 +19,7 @@
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* This may need to be greater than __NR_last_syscall+1 in order to
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* account for the padding in the syscall table
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*/
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#define __NR_syscalls (396)
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#define __NR_syscalls (400)
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#define __ARCH_WANT_STAT64
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#define __ARCH_WANT_SYS_GETHOSTNAME
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@ -420,6 +420,9 @@
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#define __NR_copy_file_range (__NR_SYSCALL_BASE+391)
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#define __NR_preadv2 (__NR_SYSCALL_BASE+392)
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#define __NR_pwritev2 (__NR_SYSCALL_BASE+393)
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#define __NR_pkey_mprotect (__NR_SYSCALL_BASE+394)
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#define __NR_pkey_alloc (__NR_SYSCALL_BASE+395)
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#define __NR_pkey_free (__NR_SYSCALL_BASE+396)
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/*
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* The following SWIs are ARM private.
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@ -403,6 +403,9 @@
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CALL(sys_copy_file_range)
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CALL(sys_preadv2)
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CALL(sys_pwritev2)
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CALL(sys_pkey_mprotect)
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/* 395 */ CALL(sys_pkey_alloc)
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CALL(sys_pkey_free)
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#ifndef syscalls_counted
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.equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls
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#define syscalls_counted
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@ -7,7 +7,7 @@
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* : r4 = aborted context pc
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* : r5 = aborted context psr
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*
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* Returns : r4-r5, r10-r11, r13 preserved
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* Returns : r4-r5, r9-r11, r13 preserved
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*
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* Purpose : obtain information about current aborted instruction.
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* Note: we read user space. This means we might cause a data
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@ -48,7 +48,10 @@ ENTRY(v4t_late_abort)
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/* c */ b do_DataAbort @ ldc rd, [rn], #m @ Same as ldr rd, [rn], #m
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/* d */ b do_DataAbort @ ldc rd, [rn, #m]
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/* e */ b .data_unknown
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/* f */
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/* f */ b .data_unknown
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.data_unknown_r9:
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ldr r9, [sp], #4
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.data_unknown: @ Part of jumptable
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mov r0, r4
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mov r1, r8
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@ -57,6 +60,7 @@ ENTRY(v4t_late_abort)
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.data_arm_ldmstm:
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tst r8, #1 << 21 @ check writeback bit
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beq do_DataAbort @ no writeback -> no fixup
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str r9, [sp, #-4]!
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mov r7, #0x11
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orr r7, r7, #0x1100
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and r6, r8, r7
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@ -75,12 +79,14 @@ ENTRY(v4t_late_abort)
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subne r7, r7, r6, lsl #2 @ Undo increment
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addeq r7, r7, r6, lsl #2 @ Undo decrement
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str r7, [r2, r9, lsr #14] @ Put register 'Rn'
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ldr r9, [sp], #4
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b do_DataAbort
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.data_arm_lateldrhpre:
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tst r8, #1 << 21 @ Check writeback bit
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beq do_DataAbort @ No writeback -> no fixup
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.data_arm_lateldrhpost:
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str r9, [sp, #-4]!
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and r9, r8, #0x00f @ get Rm / low nibble of immediate value
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tst r8, #1 << 22 @ if (immediate offset)
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andne r6, r8, #0xf00 @ { immediate high nibble
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@ -93,6 +99,7 @@ ENTRY(v4t_late_abort)
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subne r7, r7, r6 @ Undo incrmenet
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addeq r7, r7, r6 @ Undo decrement
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str r7, [r2, r9, lsr #14] @ Put register 'Rn'
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ldr r9, [sp], #4
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b do_DataAbort
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.data_arm_lateldrpreconst:
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@ -101,12 +108,14 @@ ENTRY(v4t_late_abort)
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.data_arm_lateldrpostconst:
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movs r6, r8, lsl #20 @ Get offset
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beq do_DataAbort @ zero -> no fixup
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str r9, [sp, #-4]!
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and r9, r8, #15 << 16 @ Extract 'n' from instruction
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ldr r7, [r2, r9, lsr #14] @ Get register 'Rn'
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tst r8, #1 << 23 @ Check U bit
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subne r7, r7, r6, lsr #20 @ Undo increment
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addeq r7, r7, r6, lsr #20 @ Undo decrement
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str r7, [r2, r9, lsr #14] @ Put register 'Rn'
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ldr r9, [sp], #4
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b do_DataAbort
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.data_arm_lateldrprereg:
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@ -115,6 +124,7 @@ ENTRY(v4t_late_abort)
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.data_arm_lateldrpostreg:
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and r7, r8, #15 @ Extract 'm' from instruction
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ldr r6, [r2, r7, lsl #2] @ Get register 'Rm'
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str r9, [sp, #-4]!
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mov r9, r8, lsr #7 @ get shift count
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ands r9, r9, #31
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and r7, r8, #0x70 @ get shift type
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@ -126,33 +136,33 @@ ENTRY(v4t_late_abort)
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b .data_arm_apply_r6_and_rn
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b .data_arm_apply_r6_and_rn @ 1: LSL #0
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nop
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b .data_unknown @ 2: MUL?
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b .data_unknown_r9 @ 2: MUL?
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nop
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b .data_unknown @ 3: MUL?
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b .data_unknown_r9 @ 3: MUL?
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nop
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mov r6, r6, lsr r9 @ 4: LSR #!0
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b .data_arm_apply_r6_and_rn
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mov r6, r6, lsr #32 @ 5: LSR #32
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b .data_arm_apply_r6_and_rn
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b .data_unknown @ 6: MUL?
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b .data_unknown_r9 @ 6: MUL?
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nop
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b .data_unknown @ 7: MUL?
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b .data_unknown_r9 @ 7: MUL?
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nop
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mov r6, r6, asr r9 @ 8: ASR #!0
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b .data_arm_apply_r6_and_rn
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mov r6, r6, asr #32 @ 9: ASR #32
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b .data_arm_apply_r6_and_rn
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b .data_unknown @ A: MUL?
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b .data_unknown_r9 @ A: MUL?
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nop
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b .data_unknown @ B: MUL?
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b .data_unknown_r9 @ B: MUL?
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nop
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mov r6, r6, ror r9 @ C: ROR #!0
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b .data_arm_apply_r6_and_rn
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mov r6, r6, rrx @ D: RRX
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b .data_arm_apply_r6_and_rn
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b .data_unknown @ E: MUL?
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b .data_unknown_r9 @ E: MUL?
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nop
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b .data_unknown @ F: MUL?
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b .data_unknown_r9 @ F: MUL?
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.data_thumb_abort:
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ldrh r8, [r4] @ read instruction
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@ -190,6 +200,7 @@ ENTRY(v4t_late_abort)
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.data_thumb_pushpop:
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tst r8, #1 << 10
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beq .data_unknown
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str r9, [sp, #-4]!
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and r6, r8, #0x55 @ hweight8(r8) + R bit
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and r9, r8, #0xaa
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add r6, r6, r9, lsr #1
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@ -204,9 +215,11 @@ ENTRY(v4t_late_abort)
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addeq r7, r7, r6, lsl #2 @ increment SP if PUSH
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subne r7, r7, r6, lsl #2 @ decrement SP if POP
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str r7, [r2, #13 << 2]
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ldr r9, [sp], #4
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b do_DataAbort
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.data_thumb_ldmstm:
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str r9, [sp, #-4]!
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and r6, r8, #0x55 @ hweight8(r8)
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and r9, r8, #0xaa
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add r6, r6, r9, lsr #1
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@ -219,4 +232,5 @@ ENTRY(v4t_late_abort)
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and r6, r6, #15 @ number of regs to transfer
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sub r7, r7, r6, lsl #2 @ always decrement
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str r7, [r2, r9, lsr #6]
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ldr r9, [sp], #4
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b do_DataAbort
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