From 4533d8551b7dc594f5d203c1dc6c1527a21ad61d Mon Sep 17 00:00:00 2001 From: Kuppuswamy Sathyanarayanan Date: Mon, 5 Jun 2017 12:08:01 -0700 Subject: [PATCH] mfd: intel_soc_pmic_bxtwc: Fix TMU interrupt index TMU interrupts are registered as a separate interrupt chip, and hence it should start its interrupt index(BXTWC_TMU_IRQ) number from 0. But currently, BXTWC_TMU_IRQ is defined as part of enum bxtwc_irqs_level2 and its index value is 11. Since this index value is used when calculating .num_irqs of regmap_irq_chip_tmu, it incorrectly reports number of IRQs as 12 instead of actual value of 1. This patch fixes this issue by creating new enum of tmu IRQs and resetting its starting index to 0. Signed-off-by: Kuppuswamy Sathyanarayanan Reviewed-by: Andy Shevchenko Signed-off-by: Lee Jones --- drivers/mfd/intel_soc_pmic_bxtwc.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/mfd/intel_soc_pmic_bxtwc.c b/drivers/mfd/intel_soc_pmic_bxtwc.c index 8c3cbf63c6ad..7cbaf1eda3f8 100644 --- a/drivers/mfd/intel_soc_pmic_bxtwc.c +++ b/drivers/mfd/intel_soc_pmic_bxtwc.c @@ -95,7 +95,10 @@ enum bxtwc_irqs_level2 { BXTWC_GPIO0_IRQ, BXTWC_GPIO1_IRQ, BXTWC_CRIT_IRQ, - BXTWC_TMU_IRQ, +}; + +enum bxtwc_irqs_tmu { + BXTWC_TMU_IRQ = 0, }; static const struct regmap_irq bxtwc_regmap_irqs[] = {