scsi: gdth: remove gdth_{alloc,free}_ioctl
Out of the three callers once insists on the scratch buffer, and the others are fine with a new allocation. Switch those two to just use pci_alloc_consistent directly, and open code the scratch buffer allocation in the remaining one. This avoids a case where we might be doing a memory allocation under a spinlock with irqs disabled. [mkp: typo] Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
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@ -4239,7 +4239,7 @@ static int ioc_general(void __user *arg, char *cmnd)
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gdth_ioctl_general gen;
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gdth_ha_str *ha;
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char *buf = NULL;
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u64 paddr;
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dma_addr_t paddr;
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int rval;
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if (copy_from_user(&gen, arg, sizeof(gdth_ioctl_general)))
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@ -4256,8 +4256,8 @@ static int ioc_general(void __user *arg, char *cmnd)
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return -EINVAL;
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if (gen.data_len + gen.sense_len > 0) {
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buf = gdth_ioctl_alloc(ha, gen.data_len + gen.sense_len, FALSE,
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&paddr);
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buf = pci_alloc_consistent(ha->pdev,
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gen.data_len + gen.sense_len, &paddr);
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if (!buf)
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return -EFAULT;
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@ -4292,7 +4292,7 @@ static int ioc_general(void __user *arg, char *cmnd)
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rval = 0;
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out_free_buf:
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gdth_ioctl_free(ha, gen.data_len+gen.sense_len, buf, paddr);
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pci_free_consistent(ha->pdev, gen.data_len + gen.sense_len, buf, paddr);
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return rval;
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}
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@ -31,7 +31,6 @@ static int gdth_set_asc_info(struct Scsi_Host *host, char *buffer,
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int i, found;
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gdth_cmd_str gdtcmd;
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gdth_cpar_str *pcpar;
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u64 paddr;
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char cmnd[MAX_COMMAND_SIZE];
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memset(cmnd, 0xff, 12);
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@ -113,13 +112,23 @@ static int gdth_set_asc_info(struct Scsi_Host *host, char *buffer,
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}
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if (wb_mode) {
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if (!gdth_ioctl_alloc(ha, sizeof(gdth_cpar_str), TRUE, &paddr))
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return(-EBUSY);
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unsigned long flags;
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BUILD_BUG_ON(sizeof(gdth_cpar_str) > GDTH_SCRATCH);
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spin_lock_irqsave(&ha->smp_lock, flags);
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if (ha->scratch_busy) {
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spin_unlock_irqrestore(&ha->smp_lock, flags);
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return -EBUSY;
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}
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ha->scratch_busy = TRUE;
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spin_unlock_irqrestore(&ha->smp_lock, flags);
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pcpar = (gdth_cpar_str *)ha->pscratch;
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memcpy( pcpar, &ha->cpar, sizeof(gdth_cpar_str) );
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gdtcmd.Service = CACHESERVICE;
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gdtcmd.OpCode = GDT_IOCTL;
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gdtcmd.u.ioctl.p_param = paddr;
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gdtcmd.u.ioctl.p_param = ha->scratch_phys;
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gdtcmd.u.ioctl.param_size = sizeof(gdth_cpar_str);
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gdtcmd.u.ioctl.subfunc = CACHE_CONFIG;
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gdtcmd.u.ioctl.channel = INVALID_CHANNEL;
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@ -127,7 +136,10 @@ static int gdth_set_asc_info(struct Scsi_Host *host, char *buffer,
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gdth_execute(host, &gdtcmd, cmnd, 30, NULL);
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gdth_ioctl_free(ha, GDTH_SCRATCH, ha->pscratch, paddr);
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spin_lock_irqsave(&ha->smp_lock, flags);
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ha->scratch_busy = FALSE;
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spin_unlock_irqrestore(&ha->smp_lock, flags);
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printk("Done.\n");
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return(orig_length);
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}
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@ -143,7 +155,7 @@ int gdth_show_info(struct seq_file *m, struct Scsi_Host *host)
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int id, i, j, k, sec, flag;
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int no_mdrv = 0, drv_no, is_mirr;
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u32 cnt;
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u64 paddr;
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dma_addr_t paddr;
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int rc = -ENOMEM;
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gdth_cmd_str *gdtcmd;
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@ -232,7 +244,7 @@ int gdth_show_info(struct seq_file *m, struct Scsi_Host *host)
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seq_puts(m, "\nPhysical Devices:");
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flag = FALSE;
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buf = gdth_ioctl_alloc(ha, size, FALSE, &paddr);
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buf = pci_alloc_consistent(ha->pdev, size, &paddr);
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if (!buf)
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goto stop_output;
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for (i = 0; i < ha->bus_cnt; ++i) {
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@ -406,7 +418,7 @@ int gdth_show_info(struct seq_file *m, struct Scsi_Host *host)
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seq_printf(m,
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" To Array Drv.:\t%s\n", hrec);
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}
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if (!flag)
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seq_puts(m, "\n --\n");
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@ -500,7 +512,7 @@ int gdth_show_info(struct seq_file *m, struct Scsi_Host *host)
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}
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}
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}
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gdth_ioctl_free(ha, size, buf, paddr);
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pci_free_consistent(ha->pdev, size, buf, paddr);
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for (i = 0; i < MAX_HDRIVES; ++i) {
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if (!(ha->hdr[i].present))
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@ -553,47 +565,6 @@ int gdth_show_info(struct seq_file *m, struct Scsi_Host *host)
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return rc;
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}
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static char *gdth_ioctl_alloc(gdth_ha_str *ha, int size, int scratch,
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u64 *paddr)
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{
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unsigned long flags;
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char *ret_val;
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if (size == 0)
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return NULL;
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spin_lock_irqsave(&ha->smp_lock, flags);
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if (!ha->scratch_busy && size <= GDTH_SCRATCH) {
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ha->scratch_busy = TRUE;
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ret_val = ha->pscratch;
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*paddr = ha->scratch_phys;
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} else if (scratch) {
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ret_val = NULL;
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} else {
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dma_addr_t dma_addr;
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ret_val = pci_alloc_consistent(ha->pdev, size, &dma_addr);
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*paddr = dma_addr;
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}
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spin_unlock_irqrestore(&ha->smp_lock, flags);
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return ret_val;
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}
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static void gdth_ioctl_free(gdth_ha_str *ha, int size, char *buf, u64 paddr)
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{
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unsigned long flags;
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if (buf == ha->pscratch) {
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spin_lock_irqsave(&ha->smp_lock, flags);
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ha->scratch_busy = FALSE;
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spin_unlock_irqrestore(&ha->smp_lock, flags);
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} else {
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pci_free_consistent(ha->pdev, size, buf, paddr);
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}
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}
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#ifdef GDTH_IOCTL_PROC
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static int gdth_ioctl_check_bin(gdth_ha_str *ha, u16 size)
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{
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@ -12,9 +12,6 @@ int gdth_execute(struct Scsi_Host *shost, gdth_cmd_str *gdtcmd, char *cmnd,
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static int gdth_set_asc_info(struct Scsi_Host *host, char *buffer,
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int length, gdth_ha_str *ha);
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static char *gdth_ioctl_alloc(gdth_ha_str *ha, int size, int scratch,
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u64 *paddr);
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static void gdth_ioctl_free(gdth_ha_str *ha, int size, char *buf, u64 paddr);
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static void gdth_wait_completion(gdth_ha_str *ha, int busnum, int id);
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#endif
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