bpf: fix 32-bit ALU op verification
32-bit ALU ops operate on 32-bit values and have 32-bit outputs.
Adjust the verifier accordingly.
Fixes: f1174f77b5
("bpf/verifier: rework value tracking")
Signed-off-by: Jann Horn <jannh@google.com>
Signed-off-by: Alexei Starovoitov <ast@kernel.org>
Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
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@ -2017,6 +2017,10 @@ static int adjust_ptr_min_max_vals(struct bpf_verifier_env *env,
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return 0;
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return 0;
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}
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}
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/* WARNING: This function does calculations on 64-bit values, but the actual
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* execution may occur on 32-bit values. Therefore, things like bitshifts
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* need extra checks in the 32-bit case.
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*/
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static int adjust_scalar_min_max_vals(struct bpf_verifier_env *env,
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static int adjust_scalar_min_max_vals(struct bpf_verifier_env *env,
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struct bpf_insn *insn,
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struct bpf_insn *insn,
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struct bpf_reg_state *dst_reg,
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struct bpf_reg_state *dst_reg,
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@ -2027,12 +2031,8 @@ static int adjust_scalar_min_max_vals(struct bpf_verifier_env *env,
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bool src_known, dst_known;
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bool src_known, dst_known;
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s64 smin_val, smax_val;
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s64 smin_val, smax_val;
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u64 umin_val, umax_val;
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u64 umin_val, umax_val;
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u64 insn_bitness = (BPF_CLASS(insn->code) == BPF_ALU64) ? 64 : 32;
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if (BPF_CLASS(insn->code) != BPF_ALU64) {
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/* 32-bit ALU ops are (32,32)->64 */
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coerce_reg_to_size(dst_reg, 4);
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coerce_reg_to_size(&src_reg, 4);
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}
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smin_val = src_reg.smin_value;
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smin_val = src_reg.smin_value;
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smax_val = src_reg.smax_value;
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smax_val = src_reg.smax_value;
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umin_val = src_reg.umin_value;
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umin_val = src_reg.umin_value;
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@ -2168,9 +2168,9 @@ static int adjust_scalar_min_max_vals(struct bpf_verifier_env *env,
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__update_reg_bounds(dst_reg);
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__update_reg_bounds(dst_reg);
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break;
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break;
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case BPF_LSH:
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case BPF_LSH:
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if (umax_val > 63) {
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if (umax_val >= insn_bitness) {
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/* Shifts greater than 63 are undefined. This includes
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/* Shifts greater than 31 or 63 are undefined.
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* shifts by a negative number.
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* This includes shifts by a negative number.
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*/
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*/
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mark_reg_unknown(env, regs, insn->dst_reg);
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mark_reg_unknown(env, regs, insn->dst_reg);
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break;
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break;
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@ -2196,9 +2196,9 @@ static int adjust_scalar_min_max_vals(struct bpf_verifier_env *env,
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__update_reg_bounds(dst_reg);
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__update_reg_bounds(dst_reg);
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break;
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break;
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case BPF_RSH:
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case BPF_RSH:
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if (umax_val > 63) {
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if (umax_val >= insn_bitness) {
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/* Shifts greater than 63 are undefined. This includes
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/* Shifts greater than 31 or 63 are undefined.
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* shifts by a negative number.
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* This includes shifts by a negative number.
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*/
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*/
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mark_reg_unknown(env, regs, insn->dst_reg);
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mark_reg_unknown(env, regs, insn->dst_reg);
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break;
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break;
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@ -2234,6 +2234,12 @@ static int adjust_scalar_min_max_vals(struct bpf_verifier_env *env,
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break;
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break;
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}
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}
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if (BPF_CLASS(insn->code) != BPF_ALU64) {
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/* 32-bit ALU ops are (32,32)->32 */
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coerce_reg_to_size(dst_reg, 4);
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coerce_reg_to_size(&src_reg, 4);
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}
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__reg_deduce_bounds(dst_reg);
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__reg_deduce_bounds(dst_reg);
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__reg_bound_offset(dst_reg);
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__reg_bound_offset(dst_reg);
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return 0;
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return 0;
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