mtd: rawnand: plat_nand: Pass a nand_chip object to all platform_nand_ctrl hooks
Let's make the raw NAND API consistent by patching all helpers and hooks to take a nand_chip object instead of an mtd_info one or remove the mtd_info object when both are passed. In order to do that, we first need to update the platform_nand_ctrl hooks to take a nand_chip object instead of an mtd_info. We add temporary plat_nand_xxx() wrappers to the do the mtd -> chip conversion, but those will be dropped when patching nand_chip hooks to take a nand_chip object. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Reviewed-by: Alexander Sverdlin <alexander.sverdlin@gmail.com> Acked-by: Alexander Sverdlin <alexander.sverdlin@gmail.com> Acked-by: Robert Jarzmik <robert.jarzmik@free.fr> Acked-by: Krzysztof Halasa <khalasa@piap.pl> Acked-by: Paul Burton <paul.burton@mips.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
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47bd59e538
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@ -45,10 +45,9 @@
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#define NAND_CTRL_ADDR(chip) (chip->IO_ADDR_W + 0x40)
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static void snappercl15_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
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static void snappercl15_nand_cmd_ctrl(struct nand_chip *chip, int cmd,
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unsigned int ctrl)
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{
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struct nand_chip *chip = mtd_to_nand(mtd);
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static u16 nand_state = SNAPPERCL15_NAND_WPN;
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u16 set;
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@ -73,10 +72,8 @@ static void snappercl15_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
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__raw_writew((cmd & 0xff) | nand_state, chip->IO_ADDR_W);
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}
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static int snappercl15_nand_dev_ready(struct mtd_info *mtd)
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static int snappercl15_nand_dev_ready(struct nand_chip *chip)
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{
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struct nand_chip *chip = mtd_to_nand(mtd);
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return !!(__raw_readw(NAND_CTRL_ADDR(chip)) & SNAPPERCL15_NAND_RDY);
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}
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@ -76,11 +76,9 @@ static void __init ts72xx_map_io(void)
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#define TS72XX_NAND_CONTROL_ADDR_LINE 22 /* 0xN0400000 */
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#define TS72XX_NAND_BUSY_ADDR_LINE 23 /* 0xN0800000 */
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static void ts72xx_nand_hwcontrol(struct mtd_info *mtd,
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static void ts72xx_nand_hwcontrol(struct nand_chip *chip,
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int cmd, unsigned int ctrl)
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{
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struct nand_chip *chip = mtd_to_nand(mtd);
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if (ctrl & NAND_CTRL_CHANGE) {
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void __iomem *addr = chip->IO_ADDR_R;
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unsigned char bits;
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@ -99,9 +97,8 @@ static void ts72xx_nand_hwcontrol(struct mtd_info *mtd,
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__raw_writeb(cmd, chip->IO_ADDR_W);
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}
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static int ts72xx_nand_device_ready(struct mtd_info *mtd)
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static int ts72xx_nand_device_ready(struct nand_chip *chip)
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{
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struct nand_chip *chip = mtd_to_nand(mtd);
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void __iomem *addr = chip->IO_ADDR_R;
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addr += (1 << TS72XX_NAND_BUSY_ADDR_LINE);
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@ -129,10 +129,9 @@ static void qong_init_nor_mtd(void)
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/*
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* Hardware specific access to control-lines
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*/
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static void qong_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
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static void qong_nand_cmd_ctrl(struct nand_chip *nand_chip, int cmd,
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unsigned int ctrl)
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{
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struct nand_chip *nand_chip = mtd_to_nand(mtd);
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if (cmd == NAND_CMD_NONE)
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return;
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@ -145,14 +144,14 @@ static void qong_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
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/*
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* Read the Device Ready pin.
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*/
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static int qong_nand_device_ready(struct mtd_info *mtd)
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static int qong_nand_device_ready(struct nand_chip *chip)
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{
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return gpio_get_value(IOMUX_TO_GPIO(MX31_PIN_NFRB));
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}
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static void qong_nand_select_chip(struct mtd_info *mtd, int chip)
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static void qong_nand_select_chip(struct nand_chip *chip, int cs)
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{
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if (chip >= 0)
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if (cs >= 0)
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gpio_set_value(IOMUX_TO_GPIO(MX31_PIN_NFCE_B), 0);
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else
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gpio_set_value(IOMUX_TO_GPIO(MX31_PIN_NFCE_B), 1);
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@ -75,9 +75,8 @@ static struct mtd_partition ixdp425_partitions[] = {
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};
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static void
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ixdp425_flash_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
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ixdp425_flash_nand_cmd_ctrl(struct nand_chip *this, int cmd, unsigned int ctrl)
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{
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struct nand_chip *this = mtd_to_nand(mtd);
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int offset = (int)nand_get_controller_data(this);
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if (ctrl & NAND_CTRL_CHANGE) {
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@ -186,7 +186,7 @@ static struct platform_device nor_device = {
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#define FSAMPLE_NAND_RB_GPIO_PIN 62
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static int nand_dev_ready(struct mtd_info *mtd)
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static int nand_dev_ready(struct nand_chip *chip)
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{
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return gpio_get_value(FSAMPLE_NAND_RB_GPIO_PIN);
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}
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@ -182,7 +182,7 @@ static struct mtd_partition h2_nand_partitions[] = {
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#define H2_NAND_RB_GPIO_PIN 62
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static int h2_nand_dev_ready(struct mtd_info *mtd)
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static int h2_nand_dev_ready(struct nand_chip *chip)
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{
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return gpio_get_value(H2_NAND_RB_GPIO_PIN);
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}
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@ -185,7 +185,7 @@ static struct mtd_partition nand_partitions[] = {
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#define H3_NAND_RB_GPIO_PIN 10
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static int nand_dev_ready(struct mtd_info *mtd)
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static int nand_dev_ready(struct nand_chip *chip)
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{
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return gpio_get_value(H3_NAND_RB_GPIO_PIN);
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}
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@ -20,9 +20,8 @@
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#include "common.h"
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void omap1_nand_cmd_ctl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
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void omap1_nand_cmd_ctl(struct nand_chip *this, int cmd, unsigned int ctrl)
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{
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struct nand_chip *this = mtd_to_nand(mtd);
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unsigned long mask;
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if (cmd == NAND_CMD_NONE)
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@ -144,7 +144,7 @@ static struct platform_device nor_device = {
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#define P2_NAND_RB_GPIO_PIN 62
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static int nand_dev_ready(struct mtd_info *mtd)
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static int nand_dev_ready(struct nand_chip *chip)
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{
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return gpio_get_value(P2_NAND_RB_GPIO_PIN);
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}
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@ -26,7 +26,6 @@
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#ifndef __ARCH_ARM_MACH_OMAP1_COMMON_H
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#define __ARCH_ARM_MACH_OMAP1_COMMON_H
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#include <linux/mtd/mtd.h>
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#include <linux/platform_data/i2c-omap.h>
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#include <linux/reboot.h>
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@ -82,7 +81,8 @@ void omap1_restart(enum reboot_mode, const char *);
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extern void __init omap_check_revision(void);
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extern void omap1_nand_cmd_ctl(struct mtd_info *mtd, int cmd,
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struct nand_chip;
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extern void omap1_nand_cmd_ctl(struct nand_chip *this, int cmd,
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unsigned int ctrl);
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extern void omap1_timer_init(void);
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@ -131,11 +131,9 @@ static void ts78xx_ts_rtc_unload(void)
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* NAND_CLE: bit 1 -> bit 1
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* NAND_ALE: bit 2 -> bit 0
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*/
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static void ts78xx_ts_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
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unsigned int ctrl)
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static void ts78xx_ts_nand_cmd_ctrl(struct nand_chip *this, int cmd,
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unsigned int ctrl)
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{
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struct nand_chip *this = mtd_to_nand(mtd);
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if (ctrl & NAND_CTRL_CHANGE) {
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unsigned char bits;
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writeb(cmd, this->IO_ADDR_W);
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}
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static int ts78xx_ts_nand_dev_ready(struct mtd_info *mtd)
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static int ts78xx_ts_nand_dev_ready(struct nand_chip *chip)
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{
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return readb(TS_NAND_CTRL) & 0x20;
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}
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static void ts78xx_ts_nand_write_buf(struct mtd_info *mtd,
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const uint8_t *buf, int len)
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static void ts78xx_ts_nand_write_buf(struct nand_chip *chip,
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const uint8_t *buf, int len)
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{
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struct nand_chip *chip = mtd_to_nand(mtd);
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void __iomem *io_base = chip->IO_ADDR_W;
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unsigned long off = ((unsigned long)buf & 3);
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int sz;
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writesb(io_base, buf, len);
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}
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static void ts78xx_ts_nand_read_buf(struct mtd_info *mtd,
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uint8_t *buf, int len)
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static void ts78xx_ts_nand_read_buf(struct nand_chip *chip,
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uint8_t *buf, int len)
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{
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struct nand_chip *chip = mtd_to_nand(mtd);
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void __iomem *io_base = chip->IO_ADDR_R;
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unsigned long off = ((unsigned long)buf & 3);
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int sz;
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@ -571,9 +571,9 @@ static inline void balloon3_i2c_init(void) {}
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* NAND
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******************************************************************************/
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#if defined(CONFIG_MTD_NAND_PLATFORM)||defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
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static void balloon3_nand_cmd_ctl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
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static void balloon3_nand_cmd_ctl(struct nand_chip *this, int cmd,
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unsigned int ctrl)
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{
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struct nand_chip *this = mtd_to_nand(mtd);
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uint8_t balloon3_ctl_set = 0, balloon3_ctl_clr = 0;
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if (ctrl & NAND_CTRL_CHANGE) {
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writeb(cmd, this->IO_ADDR_W);
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}
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static void balloon3_nand_select_chip(struct mtd_info *mtd, int chip)
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static void balloon3_nand_select_chip(struct nand_chip *this, int chip)
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{
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if (chip < 0 || chip > 3)
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return;
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BALLOON3_NAND_CONTROL_REG);
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}
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static int balloon3_nand_dev_ready(struct mtd_info *mtd)
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static int balloon3_nand_dev_ready(struct nand_chip *this)
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{
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return __raw_readl(BALLOON3_NAND_STAT_REG) & BALLOON3_NAND_STAT_RNB;
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}
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@ -285,10 +285,9 @@ static void nand_cs_off(void)
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}
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/* hardware specific access to control-lines */
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static void em_x270_nand_cmd_ctl(struct mtd_info *mtd, int dat,
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static void em_x270_nand_cmd_ctl(struct nand_chip *this, int dat,
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unsigned int ctrl)
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{
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struct nand_chip *this = mtd_to_nand(mtd);
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unsigned long nandaddr = (unsigned long)this->IO_ADDR_W;
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dsb();
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}
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/* read device ready pin */
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static int em_x270_nand_device_ready(struct mtd_info *mtd)
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static int em_x270_nand_device_ready(struct nand_chip *this)
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{
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dsb();
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@ -247,10 +247,9 @@ static inline void palmtx_keys_init(void) {}
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******************************************************************************/
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#if defined(CONFIG_MTD_NAND_PLATFORM) || \
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defined(CONFIG_MTD_NAND_PLATFORM_MODULE)
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static void palmtx_nand_cmd_ctl(struct mtd_info *mtd, int cmd,
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unsigned int ctrl)
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static void palmtx_nand_cmd_ctl(struct nand_chip *this, int cmd,
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unsigned int ctrl)
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{
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struct nand_chip *this = mtd_to_nand(mtd);
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char __iomem *nandaddr = this->IO_ADDR_W;
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if (cmd == NAND_CMD_NONE)
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/**********************************************************************/
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static void au1200_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
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static void au1200_nand_cmd_ctrl(struct nand_chip *this, int cmd,
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unsigned int ctrl)
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{
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struct nand_chip *this = mtd_to_nand(mtd);
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unsigned long ioaddr = (unsigned long)this->IO_ADDR_W;
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ioaddr &= 0xffffff00;
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}
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}
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static int au1200_nand_device_ready(struct mtd_info *mtd)
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static int au1200_nand_device_ready(struct nand_chip *this)
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{
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return alchemy_rdsmem(AU1000_MEM_STSTAT) & 1;
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}
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@ -149,10 +149,9 @@ static void __init db1300_gpio_config(void)
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/**********************************************************************/
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static void au1300_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
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static void au1300_nand_cmd_ctrl(struct nand_chip *this, int cmd,
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unsigned int ctrl)
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{
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struct nand_chip *this = mtd_to_nand(mtd);
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unsigned long ioaddr = (unsigned long)this->IO_ADDR_W;
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ioaddr &= 0xffffff00;
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}
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}
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static int au1300_nand_device_ready(struct mtd_info *mtd)
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static int au1300_nand_device_ready(struct nand_chip *this)
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{
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return alchemy_rdsmem(AU1000_MEM_STSTAT) & 1;
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}
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/**********************************************************************/
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static void au1550_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
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static void au1550_nand_cmd_ctrl(struct nand_chip *this, int cmd,
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unsigned int ctrl)
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{
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struct nand_chip *this = mtd_to_nand(mtd);
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unsigned long ioaddr = (unsigned long)this->IO_ADDR_W;
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ioaddr &= 0xffffff00;
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}
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}
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static int au1550_nand_device_ready(struct mtd_info *mtd)
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static int au1550_nand_device_ready(struct nand_chip *this)
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{
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return alchemy_rdsmem(AU1000_MEM_STSTAT) & 1;
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}
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@ -92,8 +92,8 @@ struct xlr_nand_flash_priv {
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static struct xlr_nand_flash_priv nand_priv;
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static void xlr_nand_ctrl(struct mtd_info *mtd, int cmd,
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unsigned int ctrl)
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static void xlr_nand_ctrl(struct nand_chip *chip, int cmd,
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unsigned int ctrl)
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{
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if (ctrl & NAND_CLE)
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nlm_write_reg(nand_priv.flash_mmio,
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@ -178,9 +178,8 @@ static struct platform_device pnx833x_sata_device = {
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};
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static void
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pnx833x_flash_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
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pnx833x_flash_nand_cmd_ctrl(struct nand_chip *this, int cmd, unsigned int ctrl)
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{
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struct nand_chip *this = mtd_to_nand(mtd);
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unsigned long nandaddr = (unsigned long)this->IO_ADDR_W;
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if (cmd == NAND_CMD_NONE)
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@ -141,14 +141,13 @@ static struct platform_device cf_slot0 = {
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};
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/* Resources and device for NAND */
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static int rb532_dev_ready(struct mtd_info *mtd)
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static int rb532_dev_ready(struct nand_chip *chip)
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{
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return gpio_get_value(GPIO_RDY);
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}
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static void rb532_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl)
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static void rb532_cmd_ctrl(struct nand_chip *chip, int cmd, unsigned int ctrl)
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{
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struct nand_chip *chip = mtd_to_nand(mtd);
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unsigned char orbits, nandbits;
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if (ctrl & NAND_CTRL_CHANGE) {
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@ -165,11 +165,9 @@ static struct mtd_partition migor_nand_flash_partitions[] = {
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},
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};
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static void migor_nand_flash_cmd_ctl(struct mtd_info *mtd, int cmd,
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static void migor_nand_flash_cmd_ctl(struct nand_chip *chip, int cmd,
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unsigned int ctrl)
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{
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struct nand_chip *chip = mtd_to_nand(mtd);
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if (cmd == NAND_CMD_NONE)
|
||||
return;
|
||||
|
||||
|
@ -181,7 +179,7 @@ static void migor_nand_flash_cmd_ctl(struct mtd_info *mtd, int cmd,
|
|||
writeb(cmd, chip->IO_ADDR_W);
|
||||
}
|
||||
|
||||
static int migor_nand_flash_ready(struct mtd_info *mtd)
|
||||
static int migor_nand_flash_ready(struct nand_chip *chip)
|
||||
{
|
||||
return gpio_get_value(GPIO_PTA1); /* NAND_RBn */
|
||||
}
|
||||
|
|
|
@ -23,6 +23,42 @@ struct plat_nand_data {
|
|||
void __iomem *io_base;
|
||||
};
|
||||
|
||||
static void plat_nand_cmd_ctrl(struct mtd_info *mtd, int dat, unsigned int ctrl)
|
||||
{
|
||||
struct platform_nand_data *pdata = dev_get_platdata(mtd->dev.parent);
|
||||
|
||||
pdata->ctrl.cmd_ctrl(mtd_to_nand(mtd), dat, ctrl);
|
||||
}
|
||||
|
||||
static int plat_nand_dev_ready(struct mtd_info *mtd)
|
||||
{
|
||||
struct platform_nand_data *pdata = dev_get_platdata(mtd->dev.parent);
|
||||
|
||||
return pdata->ctrl.dev_ready(mtd_to_nand(mtd));
|
||||
}
|
||||
|
||||
static void plat_nand_select_chip(struct mtd_info *mtd, int cs)
|
||||
{
|
||||
struct platform_nand_data *pdata = dev_get_platdata(mtd->dev.parent);
|
||||
|
||||
pdata->ctrl.select_chip(mtd_to_nand(mtd), cs);
|
||||
}
|
||||
|
||||
static void plat_nand_write_buf(struct mtd_info *mtd, const uint8_t *buf,
|
||||
int len)
|
||||
{
|
||||
struct platform_nand_data *pdata = dev_get_platdata(mtd->dev.parent);
|
||||
|
||||
pdata->ctrl.write_buf(mtd_to_nand(mtd), buf, len);
|
||||
}
|
||||
|
||||
static void plat_nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
|
||||
{
|
||||
struct platform_nand_data *pdata = dev_get_platdata(mtd->dev.parent);
|
||||
|
||||
pdata->ctrl.read_buf(mtd_to_nand(mtd), buf, len);
|
||||
}
|
||||
|
||||
/*
|
||||
* Probe for the NAND device.
|
||||
*/
|
||||
|
@ -62,11 +98,22 @@ static int plat_nand_probe(struct platform_device *pdev)
|
|||
|
||||
data->chip.IO_ADDR_R = data->io_base;
|
||||
data->chip.IO_ADDR_W = data->io_base;
|
||||
data->chip.cmd_ctrl = pdata->ctrl.cmd_ctrl;
|
||||
data->chip.dev_ready = pdata->ctrl.dev_ready;
|
||||
data->chip.select_chip = pdata->ctrl.select_chip;
|
||||
data->chip.write_buf = pdata->ctrl.write_buf;
|
||||
data->chip.read_buf = pdata->ctrl.read_buf;
|
||||
|
||||
if (pdata->ctrl.cmd_ctrl)
|
||||
data->chip.cmd_ctrl = plat_nand_cmd_ctrl;
|
||||
|
||||
if (pdata->ctrl.dev_ready)
|
||||
data->chip.dev_ready = plat_nand_dev_ready;
|
||||
|
||||
if (pdata->ctrl.select_chip)
|
||||
data->chip.select_chip = plat_nand_select_chip;
|
||||
|
||||
if (pdata->ctrl.write_buf)
|
||||
data->chip.write_buf = plat_nand_write_buf;
|
||||
|
||||
if (pdata->ctrl.read_buf)
|
||||
data->chip.read_buf = plat_nand_read_buf;
|
||||
|
||||
data->chip.chip_delay = pdata->chip.chip_delay;
|
||||
data->chip.options |= pdata->chip.options;
|
||||
data->chip.bbt_options |= pdata->chip.bbt_options;
|
||||
|
|
|
@ -1595,11 +1595,11 @@ struct platform_device;
|
|||
struct platform_nand_ctrl {
|
||||
int (*probe)(struct platform_device *pdev);
|
||||
void (*remove)(struct platform_device *pdev);
|
||||
int (*dev_ready)(struct mtd_info *mtd);
|
||||
void (*select_chip)(struct mtd_info *mtd, int chip);
|
||||
void (*cmd_ctrl)(struct mtd_info *mtd, int dat, unsigned int ctrl);
|
||||
void (*write_buf)(struct mtd_info *mtd, const uint8_t *buf, int len);
|
||||
void (*read_buf)(struct mtd_info *mtd, uint8_t *buf, int len);
|
||||
int (*dev_ready)(struct nand_chip *chip);
|
||||
void (*select_chip)(struct nand_chip *chip, int cs);
|
||||
void (*cmd_ctrl)(struct nand_chip *chip, int dat, unsigned int ctrl);
|
||||
void (*write_buf)(struct nand_chip *chip, const uint8_t *buf, int len);
|
||||
void (*read_buf)(struct nand_chip *chip, uint8_t *buf, int len);
|
||||
void *priv;
|
||||
};
|
||||
|
||||
|
|
Loading…
Reference in New Issue