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drm/amd/powerplay: optimization function of smu_update_table 

in fact, the firmware need 2 parameter: 1.table_id, 2.XferArg
so change the function interface to match the firmware code

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Kevin Wang 2019-04-08 16:15:36 +08:00 committed by Alex Deucher
parent 7cdd4dc58d
commit 4825d8d6a0
2 changed files with 9 additions and 3 deletions
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7
drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
View File

@ -97,16 +97,19 @@ int smu_common_read_sensor(struct smu_context *smu, enum amd_pp_sensors sensor,
return ret; return ret;
} }
int smu_update_table(struct smu_context *smu, uint32_t table_id, int smu_update_table_with_arg(struct smu_context *smu, uint16_t table_id, uint16_t exarg,
void *table_data, bool drv2smu) void *table_data, bool drv2smu)
{ {
struct smu_table_context *smu_table = &smu->smu_table; struct smu_table_context *smu_table = &smu->smu_table;
struct smu_table *table = NULL; struct smu_table *table = NULL;
int ret = 0; int ret = 0;
uint32_t table_index;
if (!table_data || table_id >= smu_table->table_count) if (!table_data || table_id >= smu_table->table_count)
return -EINVAL; return -EINVAL;
table_index = (exarg << 16) | table_id;
table = &smu_table->tables[table_id]; table = &smu_table->tables[table_id];
if (drv2smu) if (drv2smu)
@ -123,7 +126,7 @@ int smu_update_table(struct smu_context *smu, uint32_t table_id,
ret = smu_send_smc_msg_with_param(smu, drv2smu ? ret = smu_send_smc_msg_with_param(smu, drv2smu ?
SMU_MSG_TransferTableDram2Smu : SMU_MSG_TransferTableDram2Smu :
SMU_MSG_TransferTableSmu2Dram, SMU_MSG_TransferTableSmu2Dram,
table_id); table_index);
if (ret) if (ret)
return ret; return ret;

5
drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
View File

@ -745,8 +745,11 @@ extern int smu_feature_set_enabled(struct smu_context *smu, int feature_id, bool
extern int smu_feature_is_supported(struct smu_context *smu, int feature_id); extern int smu_feature_is_supported(struct smu_context *smu, int feature_id);
extern int smu_feature_set_supported(struct smu_context *smu, int feature_id, bool enable); extern int smu_feature_set_supported(struct smu_context *smu, int feature_id, bool enable);
int smu_update_table(struct smu_context *smu, uint32_t table_id, int smu_update_table_with_arg(struct smu_context *smu, uint16_t table_id, uint16_t exarg,
void *table_data, bool drv2smu); void *table_data, bool drv2smu);
#define smu_update_table(smu, table_id, table_data, drv2smu) \
smu_update_table_with_arg((smu), (table_id), 0, (table_data), (drv2smu))
bool is_support_sw_smu(struct amdgpu_device *adev); bool is_support_sw_smu(struct amdgpu_device *adev);
int smu_reset(struct smu_context *smu); int smu_reset(struct smu_context *smu);
int smu_common_read_sensor(struct smu_context *smu, enum amd_pp_sensors sensor, int smu_common_read_sensor(struct smu_context *smu, enum amd_pp_sensors sensor,