drm/i915/gvt: Add carefully checking in GTT walker paths
When debugging the gtt code, found the intel_vgpu_gma_to_gpa() can translate any given GMA though the GMA is not valid. This because the GTT ops suppress the possible errors, which may result in an invalid PT entry is retrieved by upper caller. This patch changed the prototype of pte ops to propagate status to callers. Then we make sure the GTT walker stop as early as when a error is detected to prevent undefined behavior. Signed-off-by: Changbin Du <changbin.du@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
This commit is contained in:
Changbin Du
Zhenyu Wang
parent
36ed7e97e2
commit
4b2dbbc225
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@ -259,7 +259,7 @@ static void write_pte64(struct drm_i915_private *dev_priv,
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writeq(pte, addr);
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}
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static inline struct intel_gvt_gtt_entry *gtt_get_entry64(void *pt,
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static inline int gtt_get_entry64(void *pt,
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struct intel_gvt_gtt_entry *e,
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unsigned long index, bool hypervisor_access, unsigned long gpa,
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struct intel_vgpu *vgpu)
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@ -268,22 +268,23 @@ static inline struct intel_gvt_gtt_entry *gtt_get_entry64(void *pt,
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int ret;
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if (WARN_ON(info->gtt_entry_size != 8))
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return e;
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return -EINVAL;
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if (hypervisor_access) {
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ret = intel_gvt_hypervisor_read_gpa(vgpu, gpa +
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(index << info->gtt_entry_size_shift),
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&e->val64, 8);
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WARN_ON(ret);
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if (WARN_ON(ret))
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return ret;
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} else if (!pt) {
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e->val64 = read_pte64(vgpu->gvt->dev_priv, index);
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} else {
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e->val64 = *((u64 *)pt + index);
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}
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return e;
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return 0;
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}
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static inline struct intel_gvt_gtt_entry *gtt_set_entry64(void *pt,
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static inline int gtt_set_entry64(void *pt,
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struct intel_gvt_gtt_entry *e,
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unsigned long index, bool hypervisor_access, unsigned long gpa,
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struct intel_vgpu *vgpu)
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@ -292,19 +293,20 @@ static inline struct intel_gvt_gtt_entry *gtt_set_entry64(void *pt,
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int ret;
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if (WARN_ON(info->gtt_entry_size != 8))
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return e;
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return -EINVAL;
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if (hypervisor_access) {
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ret = intel_gvt_hypervisor_write_gpa(vgpu, gpa +
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(index << info->gtt_entry_size_shift),
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&e->val64, 8);
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WARN_ON(ret);
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if (WARN_ON(ret))
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return ret;
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} else if (!pt) {
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write_pte64(vgpu->gvt->dev_priv, index, e->val64);
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} else {
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*((u64 *)pt + index) = e->val64;
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}
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return e;
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return 0;
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}
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#define GTT_HAW 46
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@ -445,21 +447,25 @@ static int gtt_entry_p2m(struct intel_vgpu *vgpu, struct intel_gvt_gtt_entry *p,
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/*
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* MM helpers.
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*/
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struct intel_gvt_gtt_entry *intel_vgpu_mm_get_entry(struct intel_vgpu_mm *mm,
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int intel_vgpu_mm_get_entry(struct intel_vgpu_mm *mm,
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void *page_table, struct intel_gvt_gtt_entry *e,
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unsigned long index)
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{
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struct intel_gvt *gvt = mm->vgpu->gvt;
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struct intel_gvt_gtt_pte_ops *ops = gvt->gtt.pte_ops;
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int ret;
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e->type = mm->page_table_entry_type;
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ops->get_entry(page_table, e, index, false, 0, mm->vgpu);
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ret = ops->get_entry(page_table, e, index, false, 0, mm->vgpu);
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if (ret)
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return ret;
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ops->test_pse(e);
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return e;
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return 0;
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}
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struct intel_gvt_gtt_entry *intel_vgpu_mm_set_entry(struct intel_vgpu_mm *mm,
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int intel_vgpu_mm_set_entry(struct intel_vgpu_mm *mm,
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void *page_table, struct intel_gvt_gtt_entry *e,
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unsigned long index)
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{
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@ -472,7 +478,7 @@ struct intel_gvt_gtt_entry *intel_vgpu_mm_set_entry(struct intel_vgpu_mm *mm,
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/*
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* PPGTT shadow page table helpers.
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*/
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static inline struct intel_gvt_gtt_entry *ppgtt_spt_get_entry(
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static inline int ppgtt_spt_get_entry(
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struct intel_vgpu_ppgtt_spt *spt,
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void *page_table, int type,
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struct intel_gvt_gtt_entry *e, unsigned long index,
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@ -480,20 +486,24 @@ static inline struct intel_gvt_gtt_entry *ppgtt_spt_get_entry(
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{
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struct intel_gvt *gvt = spt->vgpu->gvt;
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struct intel_gvt_gtt_pte_ops *ops = gvt->gtt.pte_ops;
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int ret;
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e->type = get_entry_type(type);
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if (WARN(!gtt_type_is_entry(e->type), "invalid entry type\n"))
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return e;
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return -EINVAL;
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ops->get_entry(page_table, e, index, guest,
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ret = ops->get_entry(page_table, e, index, guest,
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spt->guest_page.gfn << GTT_PAGE_SHIFT,
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spt->vgpu);
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if (ret)
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return ret;
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ops->test_pse(e);
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return e;
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return 0;
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}
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static inline struct intel_gvt_gtt_entry *ppgtt_spt_set_entry(
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static inline int ppgtt_spt_set_entry(
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struct intel_vgpu_ppgtt_spt *spt,
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void *page_table, int type,
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struct intel_gvt_gtt_entry *e, unsigned long index,
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@ -503,7 +513,7 @@ static inline struct intel_gvt_gtt_entry *ppgtt_spt_set_entry(
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struct intel_gvt_gtt_pte_ops *ops = gvt->gtt.pte_ops;
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if (WARN(!gtt_type_is_entry(e->type), "invalid entry type\n"))
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return e;
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return -EINVAL;
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return ops->set_entry(page_table, e, index, guest,
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spt->guest_page.gfn << GTT_PAGE_SHIFT,
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@ -792,13 +802,13 @@ static struct intel_vgpu_ppgtt_spt *ppgtt_find_shadow_page(
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#define for_each_present_guest_entry(spt, e, i) \
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for (i = 0; i < pt_entries(spt); i++) \
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if (spt->vgpu->gvt->gtt.pte_ops->test_present( \
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ppgtt_get_guest_entry(spt, e, i)))
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if (!ppgtt_get_guest_entry(spt, e, i) && \
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spt->vgpu->gvt->gtt.pte_ops->test_present(e))
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#define for_each_present_shadow_entry(spt, e, i) \
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for (i = 0; i < pt_entries(spt); i++) \
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if (spt->vgpu->gvt->gtt.pte_ops->test_present( \
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ppgtt_get_shadow_entry(spt, e, i)))
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if (!ppgtt_get_shadow_entry(spt, e, i) && \
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spt->vgpu->gvt->gtt.pte_ops->test_present(e))
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static void ppgtt_get_shadow_page(struct intel_vgpu_ppgtt_spt *spt)
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{
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@ -1713,8 +1723,10 @@ unsigned long intel_vgpu_gma_to_gpa(struct intel_vgpu_mm *mm, unsigned long gma)
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if (!vgpu_gmadr_is_valid(vgpu, gma))
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goto err;
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ggtt_get_guest_entry(mm, &e,
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gma_ops->gma_to_ggtt_pte_index(gma));
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ret = ggtt_get_guest_entry(mm, &e,
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gma_ops->gma_to_ggtt_pte_index(gma));
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if (ret)
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goto err;
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gpa = (pte_ops->get_pfn(&e) << GTT_PAGE_SHIFT)
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+ (gma & ~GTT_PAGE_MASK);
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@ -1724,7 +1736,9 @@ unsigned long intel_vgpu_gma_to_gpa(struct intel_vgpu_mm *mm, unsigned long gma)
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switch (mm->page_table_level) {
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case 4:
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ppgtt_get_shadow_root_entry(mm, &e, 0);
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ret = ppgtt_get_shadow_root_entry(mm, &e, 0);
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if (ret)
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goto err;
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gma_index[0] = gma_ops->gma_to_pml4_index(gma);
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gma_index[1] = gma_ops->gma_to_l4_pdp_index(gma);
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gma_index[2] = gma_ops->gma_to_pde_index(gma);
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@ -1732,15 +1746,19 @@ unsigned long intel_vgpu_gma_to_gpa(struct intel_vgpu_mm *mm, unsigned long gma)
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index = 4;
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break;
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case 3:
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ppgtt_get_shadow_root_entry(mm, &e,
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ret = ppgtt_get_shadow_root_entry(mm, &e,
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gma_ops->gma_to_l3_pdp_index(gma));
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if (ret)
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goto err;
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gma_index[0] = gma_ops->gma_to_pde_index(gma);
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gma_index[1] = gma_ops->gma_to_pte_index(gma);
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index = 2;
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break;
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case 2:
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ppgtt_get_shadow_root_entry(mm, &e,
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ret = ppgtt_get_shadow_root_entry(mm, &e,
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gma_ops->gma_to_pde_index(gma));
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if (ret)
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goto err;
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gma_index[0] = gma_ops->gma_to_pte_index(gma);
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index = 1;
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break;
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@ -1755,6 +1773,11 @@ unsigned long intel_vgpu_gma_to_gpa(struct intel_vgpu_mm *mm, unsigned long gma)
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(i == index - 1));
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if (ret)
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goto err;
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if (!pte_ops->test_present(&e)) {
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gvt_dbg_core("GMA 0x%lx is not present\n", gma);
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goto err;
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}
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}
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gpa = (pte_ops->get_pfn(&e) << GTT_PAGE_SHIFT)
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@ -49,14 +49,18 @@ struct intel_gvt_gtt_entry {
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};
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struct intel_gvt_gtt_pte_ops {
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struct intel_gvt_gtt_entry *(*get_entry)(void *pt,
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struct intel_gvt_gtt_entry *e,
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unsigned long index, bool hypervisor_access, unsigned long gpa,
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struct intel_vgpu *vgpu);
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struct intel_gvt_gtt_entry *(*set_entry)(void *pt,
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struct intel_gvt_gtt_entry *e,
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unsigned long index, bool hypervisor_access, unsigned long gpa,
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struct intel_vgpu *vgpu);
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int (*get_entry)(void *pt,
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struct intel_gvt_gtt_entry *e,
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unsigned long index,
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bool hypervisor_access,
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unsigned long gpa,
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struct intel_vgpu *vgpu);
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int (*set_entry)(void *pt,
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struct intel_gvt_gtt_entry *e,
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unsigned long index,
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bool hypervisor_access,
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unsigned long gpa,
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struct intel_vgpu *vgpu);
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bool (*test_present)(struct intel_gvt_gtt_entry *e);
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void (*clear_present)(struct intel_gvt_gtt_entry *e);
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bool (*test_pse)(struct intel_gvt_gtt_entry *e);
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@ -143,12 +147,12 @@ struct intel_vgpu_mm {
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struct intel_vgpu *vgpu;
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};
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extern struct intel_gvt_gtt_entry *intel_vgpu_mm_get_entry(
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extern int intel_vgpu_mm_get_entry(
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struct intel_vgpu_mm *mm,
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void *page_table, struct intel_gvt_gtt_entry *e,
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unsigned long index);
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extern struct intel_gvt_gtt_entry *intel_vgpu_mm_set_entry(
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extern int intel_vgpu_mm_set_entry(
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struct intel_vgpu_mm *mm,
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void *page_table, struct intel_gvt_gtt_entry *e,
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unsigned long index);
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