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PCI: xilinx: Remove dependency on ARM-specific struct hw_pci 

The Xilinx PCIe host controller driver uses pci_common_init_dev(), which
is ARM-specific and requires the ARM struct hw_pci.  The part of
pci_common_init_dev() that is needed is limited and can be done here
without using hw_pci.

Create and scan the root bus directly without using the ARM
pci_common_init_dev() interface.

[bhelgaas: revise changelog to show similarity to 79953dd22c ("PCI: rcar: Remove dependency on ARM-specific struct hw_pci")]
Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com>
Signed-off-by: Ravi Kiran Gummaluri <rgummal@xilinx.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Michal Simek <michal.simek@xilinx.com>
This commit is contained in:
Bharat Kumar Gogada 2016-02-11 21:58:08 +05:30 committed by Bjorn Helgaas
parent 0259882e34
commit 4c01f3b089
1 changed files with 16 additions and 66 deletions
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82
drivers/pci/host/pcie-xilinx.c
View File

@ -111,17 +111,11 @@ struct xilinx_pcie_port {
u8 root_busno;
struct device *dev;
struct irq_domain *irq_domain;
struct resource bus_range;
struct list_head resources;
};
static DECLARE_BITMAP(msi_irq_in_use, XILINX_NUM_MSI_IRQS);
static inline struct xilinx_pcie_port *sys_to_pcie(struct pci_sys_data *sys)
{
return sys->private_data;
}
static inline u32 pcie_read(struct xilinx_pcie_port *port, u32 reg)
{
return readl(port->reg_base + reg);
@ -163,7 +157,7 @@ static void xilinx_pcie_clear_err_interrupts(struct xilinx_pcie_port *port)
*/
static bool xilinx_pcie_valid_device(struct pci_bus *bus, unsigned int devfn)
{
struct xilinx_pcie_port *port = sys_to_pcie(bus->sysdata);
struct xilinx_pcie_port *port = bus->sysdata;
/* Check if link is up when trying to access downstream ports */
if (bus->number != port->root_busno)
@ -196,7 +190,7 @@ static bool xilinx_pcie_valid_device(struct pci_bus *bus, unsigned int devfn)
static void __iomem *xilinx_pcie_map_bus(struct pci_bus *bus,
unsigned int devfn, int where)
{
struct xilinx_pcie_port *port = sys_to_pcie(bus->sysdata);
struct xilinx_pcie_port *port = bus->sysdata;
int relbus;
if (!xilinx_pcie_valid_device(bus, devfn))
@ -228,7 +222,7 @@ static void xilinx_pcie_destroy_msi(unsigned int irq)
if (!test_bit(irq, msi_irq_in_use)) {
msi = irq_get_msi_desc(irq);
port = sys_to_pcie(msi_desc_to_pci_sysdata(msi));
port = msi_desc_to_pci_sysdata(msi);
dev_err(port->dev, "Trying to free unused MSI#%d\n", irq);
} else {
clear_bit(irq, msi_irq_in_use);
@ -277,7 +271,7 @@ static int xilinx_pcie_msi_setup_irq(struct msi_controller *chip,
struct pci_dev *pdev,
struct msi_desc *desc)
{
struct xilinx_pcie_port *port = sys_to_pcie(pdev->bus->sysdata);
struct xilinx_pcie_port *port = pdev->bus->sysdata;
unsigned int irq;
int hwirq;
struct msi_msg msg;
@ -613,47 +607,6 @@ static void xilinx_pcie_init_port(struct xilinx_pcie_port *port)
XILINX_PCIE_REG_RPSC);
}
/**
* xilinx_pcie_setup - Setup memory resources
* @nr: Bus number
* @sys: Per controller structure
*
* Return: '1' on success and error value on failure
*/
static int xilinx_pcie_setup(int nr, struct pci_sys_data *sys)
{
struct xilinx_pcie_port *port = sys_to_pcie(sys);
list_splice_init(&port->resources, &sys->resources);
return 1;
}
/**
* xilinx_pcie_scan_bus - Scan PCIe bus for devices
* @nr: Bus number
* @sys: Per controller structure
*
* Return: Valid Bus pointer on success and NULL on failure
*/
static struct pci_bus *xilinx_pcie_scan_bus(int nr, struct pci_sys_data *sys)
{
struct xilinx_pcie_port *port = sys_to_pcie(sys);
struct pci_bus *bus;
port->root_busno = sys->busnr;
if (IS_ENABLED(CONFIG_PCI_MSI))
bus = pci_scan_root_bus_msi(port->dev, sys->busnr,
&xilinx_pcie_ops, sys,
&sys->resources,
&xilinx_pcie_msi_chip);
else
bus = pci_scan_root_bus(port->dev, sys->busnr,
&xilinx_pcie_ops, sys, &sys->resources);
return bus;
}
/**
* xilinx_pcie_parse_dt - Parse Device tree
* @port: PCIe port information
@ -705,8 +658,9 @@ static int xilinx_pcie_parse_dt(struct xilinx_pcie_port *port)
static int xilinx_pcie_probe(struct platform_device *pdev)
{
struct xilinx_pcie_port *port;
struct hw_pci hw;
struct device *dev = &pdev->dev;
struct pci_bus *bus;
int err;
resource_size_t iobase = 0;
LIST_HEAD(res);
@ -740,24 +694,20 @@ static int xilinx_pcie_probe(struct platform_device *pdev)
dev_err(dev, "Getting bridge resources failed\n");
return err;
}
platform_set_drvdata(pdev, port);
/* Register the device */
memset(&hw, 0, sizeof(hw));
hw = (struct hw_pci) {
.nr_controllers = 1,
.private_data = (void **)&port,
.setup = xilinx_pcie_setup,
.map_irq = of_irq_parse_and_map_pci,
.scan = xilinx_pcie_scan_bus,
.ops = &xilinx_pcie_ops,
};
bus = pci_create_root_bus(&pdev->dev, 0,
&xilinx_pcie_ops, port, &res);
if (!bus)
return -ENOMEM;
#ifdef CONFIG_PCI_MSI
xilinx_pcie_msi_chip.dev = port->dev;
bus->msi = &xilinx_pcie_msi_chip;
#endif
pci_common_init_dev(dev, &hw);
pci_scan_child_bus(bus);
pci_assign_unassigned_bus_resources(bus);
pci_fixup_irqs(pci_common_swizzle, of_irq_parse_and_map_pci);
pci_bus_add_devices(bus);
platform_set_drvdata(pdev, port);
return 0;
}