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ARM: dts: imx6dl: correct cpufreq volt/freq table 

Currently the cpufreq volt/freq table we used is
for LDO enable mode, according to latest datasheet
Rev. 3, 03/2014, the volt/freq table is as below:

LDO enabled(min value):
996MHz: VDDARM: 1.225V, VDDSOC: 1.150V;
792MHz: VDDARM: 1.150V, VDDSOC: 1.150V;
396MHz: VDDARM: 1.050V, VDDSOC: 1.150V;

LDO bypassed(min value):
996MHz: VDDARM: 1.250V, VDDSOC: 1.150V;
792MHz: VDDARM: 1.150V, VDDSOC: 1.150V;
396MHz: VDDARM: 1.050V, VDDSOC: 1.150V;

Adding 25mV to cover board IR drop, for LDO enabled
mode of 996MHz, VDDARM should be 1.250V, so this
patch updates it.

Signed-off-by: Anson Huang <b20788@freescale.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
This commit is contained in:
Anson Huang 2014-12-05 16:23:49 +08:00 committed by Shawn Guo
parent eabb3227d9
commit 4c61a1e75c
1 changed files with 1 additions and 1 deletions
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2
arch/arm/boot/dts/imx6dl.dtsi
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@ -28,7 +28,7 @@ cpu@0 {
next-level-cache = <&L2>;
operating-points = <
/* kHz uV */
996000 1275000
996000 1250000
792000 1175000
396000 1075000
>;