clk: rockchip: add more rk3188 graphics clock ids
Add ids for cif, v{d/e}pu clocks on rk3188. ACLK_CIF does get a needed 1 at it's end but that should be safe because no driver for the camera interface has surfaced so far and the old vendor kernels for these socs are based on linux-3.0 and still used board files then, so there really are no previous users anywhere to be found. Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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@ -68,12 +68,14 @@
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#define ACLK_LCDC1 196
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#define ACLK_GPU 197
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#define ACLK_SMC 198
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#define ACLK_CIF 199
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#define ACLK_CIF1 199
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#define ACLK_IPP 200
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#define ACLK_RGA 201
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#define ACLK_CIF0 202
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#define ACLK_CPU 203
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#define ACLK_PERI 204
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#define ACLK_VEPU 205
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#define ACLK_VDPU 206
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/* pclk gates */
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#define PCLK_GRF 320
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@ -134,8 +136,11 @@
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#define HCLK_NANDC0 467
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#define HCLK_CPU 468
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#define HCLK_PERI 469
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#define HCLK_CIF1 470
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#define HCLK_VEPU 471
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#define HCLK_VDPU 472
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#define CLK_NR_CLKS (HCLK_PERI + 1)
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#define CLK_NR_CLKS (HCLK_VDPU + 1)
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/* soft-reset indices */
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#define SRST_MCORE 2
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