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ARM: S3C24XX: fix building without PM_SLEEP 

We get lots of link errors based on the assumption that
any s3c24xx kernel would enable CONFIG_PM_SLEEP if it
enables CONFIG_PM. This tries to clean that up.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Kukjin Kim <kgene@kernel.org>
This commit is contained in:
Arnd Bergmann 2015-02-27 05:50:22 +09:00 committed by Kukjin Kim
parent ea8d33ad32
commit 4f506daf0e
11 changed files with 31 additions and 22 deletions
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8
arch/arm/mach-s3c24xx/Kconfig
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@ -39,14 +39,14 @@ config CPU_S3C2412
bool "SAMSUNG S3C2412" bool "SAMSUNG S3C2412"
select CPU_ARM926T select CPU_ARM926T
select S3C2412_COMMON_CLK select S3C2412_COMMON_CLK
select S3C2412_PM if PM select S3C2412_PM if PM_SLEEP
help help
Support for the S3C2412 and S3C2413 SoCs from the S3C24XX line Support for the S3C2412 and S3C2413 SoCs from the S3C24XX line
config CPU_S3C2416 config CPU_S3C2416
bool "SAMSUNG S3C2416/S3C2450" bool "SAMSUNG S3C2416/S3C2450"
select CPU_ARM926T select CPU_ARM926T
select S3C2416_PM if PM select S3C2416_PM if PM_SLEEP
select S3C2443_COMMON_CLK select S3C2443_COMMON_CLK
help help
Support for the S3C2416 SoC from the S3C24XX line Support for the S3C2416 SoC from the S3C24XX line
@ -55,7 +55,7 @@ config CPU_S3C2440
bool "SAMSUNG S3C2440" bool "SAMSUNG S3C2440"
select CPU_ARM920T select CPU_ARM920T
select S3C2410_COMMON_CLK select S3C2410_COMMON_CLK
select S3C2410_PM if PM select S3C2410_PM if PM_SLEEP
help help
Support for S3C2440 Samsung Mobile CPU based systems. Support for S3C2440 Samsung Mobile CPU based systems.
@ -63,7 +63,7 @@ config CPU_S3C2442
bool "SAMSUNG S3C2442" bool "SAMSUNG S3C2442"
select CPU_ARM920T select CPU_ARM920T
select S3C2410_COMMON_CLK select S3C2410_COMMON_CLK
select S3C2410_PM if PM select S3C2410_PM if PM_SLEEP
help help
Support for S3C2442 Samsung Mobile CPU based systems. Support for S3C2442 Samsung Mobile CPU based systems.

3
arch/arm/mach-s3c24xx/Makefile
View File

@ -32,7 +32,8 @@ obj-$(CONFIG_CPU_S3C2443) += s3c2443.o
# PM # PM
obj-$(CONFIG_PM) += pm.o irq-pm.o sleep.o obj-$(CONFIG_PM) += pm.o
obj-$(CONFIG_PM_SLEEP) += irq-pm.o sleep.o
# common code # common code

3
arch/arm/mach-s3c24xx/pm-s3c2416.c
View File

@ -23,6 +23,7 @@
#include "s3c2412-power.h" #include "s3c2412-power.h"
#ifdef CONFIG_PM_SLEEP
extern void s3c2412_sleep_enter(void); extern void s3c2412_sleep_enter(void);
static int s3c2416_cpu_suspend(unsigned long arg) static int s3c2416_cpu_suspend(unsigned long arg)
@ -70,7 +71,7 @@ static __init int s3c2416_pm_init(void)
} }
arch_initcall(s3c2416_pm_init); arch_initcall(s3c2416_pm_init);
#endif
static void s3c2416_pm_resume(void) static void s3c2416_pm_resume(void)
{ {

6
arch/arm/mach-s3c24xx/pm.c
View File

@ -50,6 +50,7 @@
#define PFX "s3c24xx-pm: " #define PFX "s3c24xx-pm: "
#ifdef CONFIG_PM_SLEEP
static struct sleep_save core_save[] = { static struct sleep_save core_save[] = {
/* we restore the timings here, with the proviso that the board /* we restore the timings here, with the proviso that the board
* brings the system up in an slower, or equal frequency setting * brings the system up in an slower, or equal frequency setting
@ -67,6 +68,7 @@ static struct sleep_save core_save[] = {
SAVE_ITEM(S3C2410_BANKCON4), SAVE_ITEM(S3C2410_BANKCON4),
SAVE_ITEM(S3C2410_BANKCON5), SAVE_ITEM(S3C2410_BANKCON5),
}; };
#endif
/* s3c_pm_check_resume_pin /* s3c_pm_check_resume_pin
* *
@ -121,7 +123,7 @@ void s3c_pm_configure_extint(void)
} }
} }
#ifdef CONFIG_PM_SLEEP
void s3c_pm_restore_core(void) void s3c_pm_restore_core(void)
{ {
s3c_pm_do_restore_core(core_save, ARRAY_SIZE(core_save)); s3c_pm_do_restore_core(core_save, ARRAY_SIZE(core_save));
@ -131,4 +133,4 @@ void s3c_pm_save_core(void)
{ {
s3c_pm_do_save(core_save, ARRAY_SIZE(core_save)); s3c_pm_do_save(core_save, ARRAY_SIZE(core_save));
} }
#endif

2
arch/arm/mach-s3c24xx/s3c2410.c
View File

@ -121,7 +121,7 @@ int __init s3c2410_init(void)
{ {
printk("S3C2410: Initialising architecture\n"); printk("S3C2410: Initialising architecture\n");
#ifdef CONFIG_PM #ifdef CONFIG_PM_SLEEP
register_syscore_ops(&s3c2410_pm_syscore_ops); register_syscore_ops(&s3c2410_pm_syscore_ops);
register_syscore_ops(&s3c24xx_irq_syscore_ops); register_syscore_ops(&s3c24xx_irq_syscore_ops);
#endif #endif

2
arch/arm/mach-s3c24xx/s3c2412.c
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@ -172,7 +172,7 @@ int __init s3c2412_init(void)
{ {
printk("S3C2412: Initialising architecture\n"); printk("S3C2412: Initialising architecture\n");
#ifdef CONFIG_PM #ifdef CONFIG_PM_SLEEP
register_syscore_ops(&s3c2412_pm_syscore_ops); register_syscore_ops(&s3c2412_pm_syscore_ops);
register_syscore_ops(&s3c24xx_irq_syscore_ops); register_syscore_ops(&s3c24xx_irq_syscore_ops);
#endif #endif

2
arch/arm/mach-s3c24xx/s3c2416.c
View File

@ -98,7 +98,7 @@ int __init s3c2416_init(void)
s3c_adc_setname("s3c2416-adc"); s3c_adc_setname("s3c2416-adc");
s3c_rtc_setname("s3c2416-rtc"); s3c_rtc_setname("s3c2416-rtc");
#ifdef CONFIG_PM #ifdef CONFIG_PM_SLEEP
register_syscore_ops(&s3c2416_pm_syscore_ops); register_syscore_ops(&s3c2416_pm_syscore_ops);
register_syscore_ops(&s3c24xx_irq_syscore_ops); register_syscore_ops(&s3c24xx_irq_syscore_ops);
register_syscore_ops(&s3c2416_irq_syscore_ops); register_syscore_ops(&s3c2416_irq_syscore_ops);

4
arch/arm/mach-s3c24xx/s3c2440.c
View File

@ -57,11 +57,11 @@ int __init s3c2440_init(void)
/* register suspend/resume handlers */ /* register suspend/resume handlers */
#ifdef CONFIG_PM #ifdef CONFIG_PM_SLEEP
register_syscore_ops(&s3c2410_pm_syscore_ops); register_syscore_ops(&s3c2410_pm_syscore_ops);
register_syscore_ops(&s3c24xx_irq_syscore_ops); register_syscore_ops(&s3c24xx_irq_syscore_ops);
#endif
register_syscore_ops(&s3c244x_pm_syscore_ops); register_syscore_ops(&s3c244x_pm_syscore_ops);
#endif
/* register our system device for everything else */ /* register our system device for everything else */

4
arch/arm/mach-s3c24xx/s3c2442.c
View File

@ -60,11 +60,11 @@ int __init s3c2442_init(void)
{ {
printk("S3C2442: Initialising architecture\n"); printk("S3C2442: Initialising architecture\n");
#ifdef CONFIG_PM #ifdef CONFIG_PM_SLEEP
register_syscore_ops(&s3c2410_pm_syscore_ops); register_syscore_ops(&s3c2410_pm_syscore_ops);
register_syscore_ops(&s3c24xx_irq_syscore_ops); register_syscore_ops(&s3c24xx_irq_syscore_ops);
#endif
register_syscore_ops(&s3c244x_pm_syscore_ops); register_syscore_ops(&s3c244x_pm_syscore_ops);
#endif
return device_register(&s3c2442_dev); return device_register(&s3c2442_dev);
} }

7
arch/arm/mach-s3c24xx/s3c244x.c
View File

@ -108,7 +108,7 @@ static int __init s3c2442_core_init(void)
core_initcall(s3c2442_core_init); core_initcall(s3c2442_core_init);
#ifdef CONFIG_PM #ifdef CONFIG_PM_SLEEP
static struct sleep_save s3c244x_sleep[] = { static struct sleep_save s3c244x_sleep[] = {
SAVE_ITEM(S3C2440_DSC0), SAVE_ITEM(S3C2440_DSC0),
SAVE_ITEM(S3C2440_DSC1), SAVE_ITEM(S3C2440_DSC1),
@ -127,12 +127,9 @@ static void s3c244x_resume(void)
{ {
s3c_pm_do_restore(s3c244x_sleep, ARRAY_SIZE(s3c244x_sleep)); s3c_pm_do_restore(s3c244x_sleep, ARRAY_SIZE(s3c244x_sleep));
} }
#else
#define s3c244x_suspend NULL
#define s3c244x_resume NULL
#endif
struct syscore_ops s3c244x_pm_syscore_ops = { struct syscore_ops s3c244x_pm_syscore_ops = {
.suspend = s3c244x_suspend, .suspend = s3c244x_suspend,
.resume = s3c244x_resume, .resume = s3c244x_resume,
}; };
#endif

12
arch/arm/plat-samsung/include/plat/pm.h
View File

@ -43,7 +43,11 @@ extern unsigned long s3c_irqwake_eintmask;
/* IRQ masks for IRQs allowed to go to sleep (see irq.c) */ /* IRQ masks for IRQs allowed to go to sleep (see irq.c) */
extern unsigned long s3c_irqwake_intallow; extern unsigned long s3c_irqwake_intallow;
#ifdef CONFIG_PM_SLEEP
extern unsigned long s3c_irqwake_eintallow; extern unsigned long s3c_irqwake_eintallow;
#else
#define s3c_irqwake_eintallow 0
#endif
/* per-cpu sleep functions */ /* per-cpu sleep functions */
@ -60,14 +64,18 @@ extern int s3c2410_cpu_suspend(unsigned long);
#ifdef CONFIG_PM_SLEEP #ifdef CONFIG_PM_SLEEP
extern int s3c_irq_wake(struct irq_data *data, unsigned int state); extern int s3c_irq_wake(struct irq_data *data, unsigned int state);
extern int s3c_irqext_wake(struct irq_data *data, unsigned int state);
extern void s3c_cpu_resume(void); extern void s3c_cpu_resume(void);
#else #else
#define s3c_irq_wake NULL #define s3c_irq_wake NULL
#define s3c_irqext_wake NULL
#define s3c_cpu_resume NULL #define s3c_cpu_resume NULL
#endif #endif
#ifdef CONFIG_SAMSUNG_PM
extern int s3c_irqext_wake(struct irq_data *data, unsigned int state);
#else
#define s3c_irqext_wake NULL
#endif
#ifdef CONFIG_S3C_PM_DEBUG_LED_SMDK #ifdef CONFIG_S3C_PM_DEBUG_LED_SMDK
/** /**
* s3c_pm_debug_smdkled() - Debug PM suspend/resume via SMDK Board LEDs * s3c_pm_debug_smdkled() - Debug PM suspend/resume via SMDK Board LEDs