ASoC: qcom: Add ability to handle interrupts per dma channel
This patch adds ablity to lpass driver to handle interrupt per dma channel. Without this patch its not possible to use multipl ports on the lpass. Tested-by: Kenneth Westfield <kwestfie@codeaurora.org> Acked-by: Kenneth Westfield <kwestfie@codeaurora.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Mark Brown <broonie@kernel.org>
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0054055c59
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@ -356,27 +356,15 @@ static struct snd_pcm_ops lpass_platform_pcm_ops = {
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.mmap = lpass_platform_pcmops_mmap,
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};
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static irqreturn_t lpass_platform_lpaif_irq(int irq, void *data)
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static irqreturn_t lpass_dma_interrupt_handler(
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struct snd_pcm_substream *substream,
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struct lpass_data *drvdata,
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int chan, u32 interrupts)
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{
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struct snd_pcm_substream *substream = data;
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struct snd_soc_pcm_runtime *soc_runtime = substream->private_data;
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struct lpass_data *drvdata =
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snd_soc_platform_get_drvdata(soc_runtime->platform);
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struct lpass_variant *v = drvdata->variant;
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struct lpass_pcm_data *pcm_data = snd_soc_pcm_get_drvdata(soc_runtime);
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unsigned int interrupts;
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irqreturn_t ret = IRQ_NONE;
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int rv, chan = pcm_data->rdma_ch;
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rv = regmap_read(drvdata->lpaif_map,
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LPAIF_IRQSTAT_REG(v, LPAIF_IRQ_PORT_HOST), &interrupts);
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if (rv) {
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dev_err(soc_runtime->dev, "%s() error reading from irqstat reg: %d\n",
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__func__, rv);
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return IRQ_NONE;
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}
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interrupts &= LPAIF_IRQ_ALL(chan);
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int rv;
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if (interrupts & LPAIF_IRQ_PER(chan)) {
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rv = regmap_write(drvdata->lpaif_map,
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@ -422,6 +410,35 @@ static irqreturn_t lpass_platform_lpaif_irq(int irq, void *data)
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return ret;
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}
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static irqreturn_t lpass_platform_lpaif_irq(int irq, void *data)
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{
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struct lpass_data *drvdata = data;
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struct lpass_variant *v = drvdata->variant;
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unsigned int irqs;
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int rv, chan;
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rv = regmap_read(drvdata->lpaif_map,
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LPAIF_IRQSTAT_REG(v, LPAIF_IRQ_PORT_HOST), &irqs);
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if (rv) {
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pr_err("%s() error reading from irqstat reg: %d\n",
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__func__, rv);
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return IRQ_NONE;
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}
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/* Handle per channel interrupts */
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for (chan = 0; chan < LPASS_MAX_DMA_CHANNELS; chan++) {
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if (irqs & LPAIF_IRQ_ALL(chan) && drvdata->substream[chan]) {
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rv = lpass_dma_interrupt_handler(
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drvdata->substream[chan],
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drvdata, chan, irqs);
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if (rv != IRQ_HANDLED)
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return rv;
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}
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}
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return IRQ_HANDLED;
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}
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static int lpass_platform_alloc_buffer(struct snd_pcm_substream *substream,
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struct snd_soc_pcm_runtime *soc_runtime)
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{
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@ -477,6 +494,7 @@ static int lpass_platform_pcm_new(struct snd_soc_pcm_runtime *soc_runtime)
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if (IS_ERR_VALUE(data->rdma_ch))
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return data->rdma_ch;
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drvdata->substream[data->rdma_ch] = substream;
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data->i2s_port = cpu_dai->driver->id;
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snd_soc_pcm_set_drvdata(soc_runtime, data);
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@ -488,29 +506,12 @@ static int lpass_platform_pcm_new(struct snd_soc_pcm_runtime *soc_runtime)
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if (ret)
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return ret;
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ret = devm_request_irq(soc_runtime->dev, drvdata->lpaif_irq,
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lpass_platform_lpaif_irq, IRQF_TRIGGER_RISING,
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"lpass-irq-lpaif", substream);
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if (ret) {
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dev_err(soc_runtime->dev, "%s() irq request failed: %d\n",
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__func__, ret);
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goto err_buf;
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}
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/* ensure audio hardware is disabled */
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ret = regmap_write(drvdata->lpaif_map,
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LPAIF_IRQEN_REG(v, LPAIF_IRQ_PORT_HOST), 0);
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if (ret) {
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dev_err(soc_runtime->dev, "%s() error writing to irqen reg: %d\n",
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__func__, ret);
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return ret;
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}
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ret = regmap_write(drvdata->lpaif_map,
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LPAIF_RDMACTL_REG(v, data->rdma_ch), 0);
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if (ret) {
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dev_err(soc_runtime->dev, "%s() error writing to rdmactl reg: %d\n",
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__func__, ret);
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return ret;
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goto err_buf;
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}
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return 0;
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@ -530,6 +531,8 @@ static void lpass_platform_pcm_free(struct snd_pcm *pcm)
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struct lpass_pcm_data *data = snd_soc_pcm_get_drvdata(soc_runtime);
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struct lpass_variant *v = drvdata->variant;
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drvdata->substream[data->rdma_ch] = NULL;
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if (v->free_dma_channel)
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v->free_dma_channel(drvdata, data->rdma_ch);
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@ -545,6 +548,8 @@ static struct snd_soc_platform_driver lpass_platform_driver = {
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int asoc_qcom_lpass_platform_register(struct platform_device *pdev)
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{
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struct lpass_data *drvdata = platform_get_drvdata(pdev);
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struct lpass_variant *v = drvdata->variant;
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int ret;
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drvdata->lpaif_irq = platform_get_irq_byname(pdev, "lpass-irq-lpaif");
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if (drvdata->lpaif_irq < 0) {
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@ -553,6 +558,25 @@ int asoc_qcom_lpass_platform_register(struct platform_device *pdev)
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return -ENODEV;
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}
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/* ensure audio hardware is disabled */
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ret = regmap_write(drvdata->lpaif_map,
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LPAIF_IRQEN_REG(v, LPAIF_IRQ_PORT_HOST), 0);
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if (ret) {
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dev_err(&pdev->dev, "%s() error writing to irqen reg: %d\n",
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__func__, ret);
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return ret;
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}
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ret = devm_request_irq(&pdev->dev, drvdata->lpaif_irq,
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lpass_platform_lpaif_irq, IRQF_TRIGGER_RISING,
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"lpass-irq-lpaif", drvdata);
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if (ret) {
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dev_err(&pdev->dev, "%s() irq request failed: %d\n",
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__func__, ret);
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return ret;
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}
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return devm_snd_soc_register_platform(&pdev->dev,
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&lpass_platform_driver);
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}
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@ -23,6 +23,7 @@
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#define LPASS_AHBIX_CLOCK_FREQUENCY 131072000
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#define LPASS_MAX_MI2S_PORTS (8)
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#define LPASS_MAX_DMA_CHANNELS (8)
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/* Both the CPU DAI and platform drivers will access this data */
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struct lpass_data {
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@ -47,6 +48,9 @@ struct lpass_data {
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/* SOC specific variations in the LPASS IP integration */
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struct lpass_variant *variant;
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/* used it for handling interrupt per dma channel */
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struct snd_pcm_substream *substream[LPASS_MAX_DMA_CHANNELS];
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};
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/* Vairant data per each SOC */
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