spi: spi-fsl-espi: Log fifo counters on error
Log RX and TX fifo counters when a transfer is done and these are not zero. Signed-off-by: Tiago Brusamarello <tiago.brusamarello@datacom.ind.br> Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -547,8 +547,11 @@ static void fsl_espi_cpu_irq(struct fsl_espi *espi, u32 events)
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dev_err(espi->dev,
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"Transfer done but SPIE_DON isn't set!\n");
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if (SPIE_RXCNT(events) || SPIE_TXCNT(events) != FSL_ESPI_FIFO_SIZE)
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if (SPIE_RXCNT(events) || SPIE_TXCNT(events) != FSL_ESPI_FIFO_SIZE) {
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dev_err(espi->dev, "Transfer done but rx/tx fifo's aren't empty!\n");
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dev_err(espi->dev, "SPIE_RXCNT = %d, SPIE_TXCNT = %d\n",
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SPIE_RXCNT(events), SPIE_TXCNT(events));
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}
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complete(&espi->done);
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}
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