p71924506
/
linux_old1
1
0
Fork 0
Code Issues Pull Requests Projects Releases Wiki Activity

ARM: Device-tree updates for 4.15 

We add device tree files for a couple of additional SoCs in various areas:
 
 Allwinner R40/V40 for entertainment, Broadcom Hurricane 2 for networking,
 Amlogic A113D for audio, and Renesas R-Car V3M for automotive.
 
 As usual, lots of new boards get added based on those and other SoCs:
 
  - Actions S500 based CubieBoard6 single-board computer
 
  - Amlogic Meson-AXG A113D based development board
  - Amlogic S912 based Khadas VIM2 single-board computer
  - Amlogic S912 based Tronsmart Vega S96 set-top-box
 
  - Allwinner H5 based NanoPi NEO Plus2 single-board computer
  - Allwinner R40 based Banana Pi M2 Ultra and Berry single-board computers
  - Allwinner A83T based TBS A711 Tablet
 
  - Broadcom Hurricane 2 based Ubiquiti UniFi Switch 8
  - Broadcom bcm47xx based Luxul XAP-1440/XAP-810/ABR-4500/XBR-4500
      wireless access points and routers
 
  - NXP i.MX51 based Zodiac Inflight Innovations RDU1 board
  - NXP i.MX53 based GE Healthcare PPD biometric monitor
  - NXP i.MX6 based Pistachio single-board computer
  - NXP i.MX6 based Vining-2000 automotive diagnostic interface
  - NXP i.MX6 based Ka-Ro TX6 Computer-on-Module in additional variants
 
  - Qualcomm MSM8974 (Snapdragon 800) based Fairphone 2 phone
  - Qualcomm MSM8974pro (Snapdragon 801) based Sony Xperia Z2 Tablet
 
  - Realtek RTD1295 based set-top-boxes MeLE V9 and PROBOX2 AVA
 
  - Renesas R-Car V3M (R8A77970) SoC and "Eagle" reference board
  - Renesas H3ULCB and M3ULCB "Kingfisher" extension infotainment boards
  - Renasas r8a7745 based iWave G22D-SODIMM SoM
 
  - Rockchip rk3288 based Amarula Vyasa single-board computer
 
  - Samsung Exynos5800 based Odroid HC1 single-board computer
 
 For existing SoC support, there was a lot of ongoing work, as usual
 most of that concentrated on the Renesas, Rockchip, OMAP, i.MX, Amlogic
 and Allwinner platforms, but others were also active.
 
 Rob Herring and many others worked on reducing the number of issues that
 the latest version of 'dtc' now warns about. Unfortunately there is still
 a lot left to do.
 
 A rework of the ARM foundation model introduced several new files
 for common variations of the model.
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABAgAGBQJaDhcfAAoJEGCrR//JCVIngu0QAI2ntVotaOAOaCurNCnoVwI1
 j+eKwHGTawQRcSHWN8C+p4FzzaOmw+vvbOyewky8PWaDOCkK6yWEHRf3hb2la2jw
 j9prht28R1RAHIRPuah4SxKHYoT4VW9q/2hMHJ2BiNDOMX54xE7j2cUvWSsIRz5o
 id2QqKsp2OIDNQAXAA4N25FjdBCYvSik80panSdJITtJODIj6UfmcXSgqkoQ3TTV
 rwVyFtryl9Si3eyZYcfB2/0ILKuaMC8gl7IX9z+PkRqu9XN7i6bZKZlMMtpJqX3u
 Ad89kLkFqNhiwZ77bIoRRl+0NEoSu5hTPLHRqghS6gPfDY2JT6igf0rGC8twjfea
 fzGOBWr6NlIlUmR4smS0GyE/3YsfOQvYWjE+zx5qkmay30TORVTZBzsBR+kQJzKK
 tnbO1zvst1ECtk9e8np0di4NAo9rwM37dxpu4aspP1Umxw1K68VSNE3RhGl8UUwW
 oNvHa8hD8Ck0QDBNltrkmKBVoIYKRU3XhXrRXVjRQdu6Xitml0XYBi80V0h33EE3
 162UXDEMu1/aqRRZUtKw7+yozT8fqOHjH8Zrv2zCVGg0HEwVohcWv/BPXbrg0abJ
 wXYS8VocZJP6Nb4FQMe+cRbBUHoBgBQqbsF60tWiYsjv0zoc5hogLWcZYqzDcIO6
 06OBR3HgUW27urUn/JBu
 =TnSo
 -----END PGP SIGNATURE-----

Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

Pull ARM device-tree updates from Arnd Bergmann:
 "We add device tree files for a couple of additional SoCs in various
  areas:

  Allwinner R40/V40 for entertainment, Broadcom Hurricane 2 for
  networking, Amlogic A113D for audio, and Renesas R-Car V3M for
  automotive.

  As usual, lots of new boards get added based on those and other SoCs:

   - Actions S500 based CubieBoard6 single-board computer

   - Amlogic Meson-AXG A113D based development board
   - Amlogic S912 based Khadas VIM2 single-board computer
   - Amlogic S912 based Tronsmart Vega S96 set-top-box

   - Allwinner H5 based NanoPi NEO Plus2 single-board computer
   - Allwinner R40 based Banana Pi M2 Ultra and Berry single-board computers
   - Allwinner A83T based TBS A711 Tablet

   - Broadcom Hurricane 2 based Ubiquiti UniFi Switch 8
   - Broadcom bcm47xx based Luxul XAP-1440/XAP-810/ABR-4500/XBR-4500
     wireless access points and routers

   - NXP i.MX51 based Zodiac Inflight Innovations RDU1 board
   - NXP i.MX53 based GE Healthcare PPD biometric monitor
   - NXP i.MX6 based Pistachio single-board computer
   - NXP i.MX6 based Vining-2000 automotive diagnostic interface
   - NXP i.MX6 based Ka-Ro TX6 Computer-on-Module in additional variants

   - Qualcomm MSM8974 (Snapdragon 800) based Fairphone 2 phone
   - Qualcomm MSM8974pro (Snapdragon 801) based Sony Xperia Z2 Tablet

   - Realtek RTD1295 based set-top-boxes MeLE V9 and PROBOX2 AVA

   - Renesas R-Car V3M (R8A77970) SoC and "Eagle" reference board
   - Renesas H3ULCB and M3ULCB "Kingfisher" extension infotainment boards
   - Renasas r8a7745 based iWave G22D-SODIMM SoM

   - Rockchip rk3288 based Amarula Vyasa single-board computer

   - Samsung Exynos5800 based Odroid HC1 single-board computer

  For existing SoC support, there was a lot of ongoing work, as usual
  most of that concentrated on the Renesas, Rockchip, OMAP, i.MX,
  Amlogic and Allwinner platforms, but others were also active.

  Rob Herring and many others worked on reducing the number of issues
  that the latest version of 'dtc' now warns about. Unfortunately there
  is still a lot left to do.

  A rework of the ARM foundation model introduced several new files for
  common variations of the model"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (599 commits)
  arm64: dts: uniphier: route on-board device IRQ to GPIO controller for PXs3
  dt-bindings: bus: Add documentation for the Technologic Systems NBUS
  arm64: dts: actions: s900-bubblegum-96: Add fake uart5 clock
  ARM: dts: owl-s500: Add CubieBoard6
  dt-bindings: arm: actions: Add CubieBoard6
  ARM: dts: owl-s500-guitar-bb-rev-b: Add fake uart3 clock
  ARM: dts: owl-s500: Set power domains for CPU2 and CPU3
  arm: dts: mt7623: remove unused compatible string for pio node
  arm: dts: mt7623: update usb related nodes
  arm: dts: mt7623: update crypto node
  ARM: dts: sun8i: a711: Enable USB OTG
  ARM: dts: sun8i: a711: Add regulator support
  ARM: dts: sun8i: a83t: bananapi-m3: Enable AP6212 WiFi on mmc1
  ARM: dts: sun8i: a83t: cubietruck-plus: Enable AP6330 WiFi on mmc1
  ARM: dts: sun8i: a83t: Move mmc1 pinctrl setting to dtsi file
  ARM: dts: sun8i: a83t: allwinner-h8homlet-v2: Add AXP818 regulator nodes
  ARM: dts: sun8i: a83t: bananapi-m3: Add AXP813 regulator nodes
  ARM: dts: sun8i: a83t: cubietruck-plus: Add AXP818 regulator nodes
  ARM: dts: sunxi: Add dtsi for AXP81x PMIC
  arm64: dts: allwinner: H5: Restore EMAC changes
  ...
This commit is contained in:
Linus Torvalds 2017-11-16 15:48:26 -08:00
parent 8c60969856 ba5b5034bd
commit 527d147074
608 changed files with 28157 additions and 15976 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
Documentation/devicetree/bindings/arm/actions.txt
View File

@ -21,6 +21,7 @@ Boards:
Root node property compatible must contain, depending on board:
- Cubietech CubieBoard6: "cubietech,cubieboard6"
- LeMaker Guitar Base Board rev. B: "lemaker,guitar-bb-rev-b", "lemaker,guitar"

8
Documentation/devicetree/bindings/arm/amlogic.txt
View File

@ -41,6 +41,10 @@ Boards with the Amlogic Meson GXM S912 SoC shall have the following properties:
Required root node property:
compatible: "amlogic,s912", "amlogic,meson-gxm";
Boards with the Amlogic Meson AXG A113D SoC shall have the following properties:
Required root node property:
compatible: "amlogic,a113d", "amlogic,meson-axg";
Board compatible values (alphabetically, grouped by SoC):
- "geniatech,atv1200" (Meson6)
@ -71,8 +75,12 @@ Board compatible values (alphabetically, grouped by SoC):
- "amlogic,q200" (Meson gxm s912)
- "amlogic,q201" (Meson gxm s912)
- "khadas,vim2" (Meson gxm s912)
- "kingnovel,r-box-pro" (Meson gxm S912)
- "nexbox,a1" (Meson gxm s912)
- "tronsmart,vega-s96" (Meson gxm s912)
- "amlogic,s400" (Meson axg a113d)
Amlogic Meson Firmware registers Interface
------------------------------------------

20
Documentation/devicetree/bindings/arm/amlogic/analog-top.txt Normal file
View File

@ -0,0 +1,20 @@
Amlogic Meson8 and Meson8b "analog top" registers:
--------------------------------------------------
The analog top registers contain information about the so-called
"metal revision" (which encodes the "minor version") of the SoC.
Required properties:
- reg: the register range of the analog top registers
- compatible: depending on the SoC this should be one of:
- "amlogic,meson8-analog-top"
- "amlogic,meson8b-analog-top"
along with "syscon"
Example:
analog_top: analog-top@81a8 {
compatible = "amlogic,meson8-analog-top", "syscon";
reg = <0x81a8 0x14>;
};

17
Documentation/devicetree/bindings/arm/amlogic/assist.txt Normal file
View File

@ -0,0 +1,17 @@
Amlogic Meson6/Meson8/Meson8b assist registers:
-----------------------------------------------
The assist registers contain basic information about the SoC,
for example the encoded SoC part number.
Required properties:
- reg: the register range of the assist registers
- compatible: should be "amlogic,meson-mx-assist" along with "syscon"
Example:
assist: assist@7c00 {
compatible = "amlogic,meson-mx-assist", "syscon";
reg = <0x7c00 0x200>;
};

17
Documentation/devicetree/bindings/arm/amlogic/bootrom.txt Normal file
View File

@ -0,0 +1,17 @@
Amlogic Meson6/Meson8/Meson8b bootrom:
--------------------------------------
The bootrom register area can be used to access SoC specific
information, such as the "misc version".
Required properties:
- reg: the register range of the bootrom registers
- compatible: should be "amlogic,meson-mx-bootrom" along with "syscon"
Example:
bootrom: bootrom@d9040000 {
compatible = "amlogic,meson-mx-bootrom", "syscon";
reg = <0xd9040000 0x10000>;
};

14
Documentation/devicetree/bindings/arm/bcm/brcm,hr2.txt Normal file
View File

@ -0,0 +1,14 @@
Broadcom Hurricane 2 device tree bindings
---------------------------------------
Broadcom Hurricane 2 family of SoCs are used for switching control. These SoCs
are based on Broadcom's iProc SoC architecture and feature a single core Cortex
A9 ARM CPUs, DDR2/DDR3 memory, PCIe GEN-2, USB 2.0 and USB 3.0, serial and NAND
flash and a PCIe attached integrated switching engine.
Boards with Hurricane SoCs shall have the following properties:
Required root node property:
BCM53342
compatible = "brcm,bcm53342", "brcm,hr2";

2
Documentation/devicetree/bindings/arm/realtek.txt
View File

@ -12,6 +12,8 @@ Required root node properties:
Root node property compatible must contain, depending on board:
- MeLE V9: "mele,v9"
- ProBox2 AVA: "probox2,ava"
- Zidoo X9S: "zidoo,x9s"

4
Documentation/devicetree/bindings/arm/rockchip.txt
View File

@ -1,5 +1,9 @@
Rockchip platforms device tree bindings
---------------------------------------
- Amarula Vyasa RK3288 board
Required root node properties:
- compatible = "amarula,vyasa-rk3288", "rockchip,rk3288";
- Asus Tinker board
Required root node properties:
- compatible = "asus,rk3288-tinker", "rockchip,rk3288";

1
Documentation/devicetree/bindings/arm/samsung/samsung-boards.txt
View File

@ -57,6 +57,7 @@ Required root node properties:
- "hardkernel,odroid-xu3-lite" - for Exynos5422-based Hardkernel
Odroid XU3 Lite board.
- "hardkernel,odroid-xu4" - for Exynos5422-based Hardkernel Odroid XU4.
- "hardkernel,odroid-hc1" - for Exynos5422-based Hardkernel Odroid HC1.
* Insignal
- "insignal,arndale" - for Exynos5250-based Insignal Arndale board.

16
Documentation/devicetree/bindings/arm/shmobile.txt
View File

@ -39,6 +39,8 @@ SoCs:
compatible = "renesas,r8a7795"
- R-Car M3-W (R8A77960)
compatible = "renesas,r8a7796"
- R-Car V3M (R8A77970)
compatible = "renesas,r8a77970"
- R-Car D3 (R8A77995)
compatible = "renesas,r8a77995"
@ -57,6 +59,8 @@ Boards:
compatible = "renesas,bockw", "renesas,r8a7778"
- Draak (RTP0RC77995SEB0010S)
compatible = "renesas,draak", "renesas,r8a77995"
- Eagle (RTP0RC77970SEB0010S)
compatible = "renesas,eagle", "renesas,r8a77970"
- Genmai (RTK772100BC00000BR)
compatible = "renesas,genmai", "renesas,r7s72100"
- GR-Peach (X28A-M01-E/F)
@ -65,7 +69,7 @@ Boards:
compatible = "renesas,gose", "renesas,r8a7793"
- H3ULCB (R-Car Starter Kit Premier, RTP0RC7795SKBX0010SA00 (H3 ES1.1))
H3ULCB (R-Car Starter Kit Premier, RTP0RC77951SKBX010SA00 (H3 ES2.0))
compatible = "renesas,h3ulcb", "renesas,r8a7795";
compatible = "renesas,h3ulcb", "renesas,r8a7795"
- Henninger
compatible = "renesas,henninger", "renesas,r8a7791"
- iWave Systems RZ/G1E SODIMM SOM Development Platform (iW-RainboW-G22D)
@ -76,6 +80,8 @@ Boards:
compatible = "iwave,g20d", "iwave,g20m", "renesas,r8a7743"
- iWave Systems RZ/G1M Qseven System On Module (iW-RainboW-G20M-Qseven)
compatible = "iwave,g20m", "renesas,r8a7743"
- Kingfisher (SBEV-RCAR-KF-M03)
compatible = "shimafuji,kingfisher"
- Koelsch (RTP0RC7791SEB00010S)
compatible = "renesas,koelsch", "renesas,r8a7791"
- Kyoto Microcomputer Co. KZM-A9-Dual
@ -85,7 +91,7 @@ Boards:
- Lager (RTP0RC7790SEB00010S)
compatible = "renesas,lager", "renesas,r8a7790"
- M3ULCB (R-Car Starter Kit Pro, RTP0RC7796SKBX0010SA09 (M3 ES1.0))
compatible = "renesas,m3ulcb", "renesas,r8a7796";
compatible = "renesas,m3ulcb", "renesas,r8a7796"
- Marzen (R0P7779A00010S)
compatible = "renesas,marzen", "renesas,r8a7779"
- Porter (M2-LCDP)
@ -93,11 +99,11 @@ Boards:
- RSKRZA1 (YR0K77210C000BE)
compatible = "renesas,rskrza1", "renesas,r7s72100"
- Salvator-X (RTP0RC7795SIPB0010S)
compatible = "renesas,salvator-x", "renesas,r8a7795";
compatible = "renesas,salvator-x", "renesas,r8a7795"
- Salvator-X (RTP0RC7796SIPB0011S)
compatible = "renesas,salvator-x", "renesas,r8a7796";
compatible = "renesas,salvator-x", "renesas,r8a7796"
- Salvator-XS (Salvator-X 2nd version, RTP0RC7795SIPB0012S)
compatible = "renesas,salvator-xs", "renesas,r8a7795";
compatible = "renesas,salvator-xs", "renesas,r8a7795"
- SILK (RTP0RC7794LCB00011S)
compatible = "renesas,silk", "renesas,r8a7794"
- SK-RZG1E (YR8A77450S000BE)

50
Documentation/devicetree/bindings/bus/ts-nbus.txt Normal file
View File

@ -0,0 +1,50 @@
Technologic Systems NBUS
The NBUS is a bus used to interface with peripherals in the Technologic
Systems FPGA on the TS-4600 SoM.
Required properties :
- compatible : "technologic,ts-nbus"
- #address-cells : must be 1
- #size-cells : must be 0
- pwms : The PWM bound to the FPGA
- ts,data-gpios : The 8 GPIO pins connected to the data lines on the FPGA
- ts,csn-gpios : The GPIO pin connected to the csn line on the FPGA
- ts,txrx-gpios : The GPIO pin connected to the txrx line on the FPGA
- ts,strobe-gpios : The GPIO pin connected to the stobe line on the FPGA
- ts,ale-gpios : The GPIO pin connected to the ale line on the FPGA
- ts,rdy-gpios : The GPIO pin connected to the rdy line on the FPGA
Child nodes:
The NBUS node can contain zero or more child nodes representing peripherals
on the bus.
Example:
nbus {
compatible = "technologic,ts-nbus";
pinctrl-0 = <&nbus_pins>;
#address-cells = <1>;
#size-cells = <0>;
pwms = <&pwm 2 83>;
ts,data-gpios = <&gpio0 0 GPIO_ACTIVE_HIGH
&gpio0 1 GPIO_ACTIVE_HIGH
&gpio0 2 GPIO_ACTIVE_HIGH
&gpio0 3 GPIO_ACTIVE_HIGH
&gpio0 4 GPIO_ACTIVE_HIGH
&gpio0 5 GPIO_ACTIVE_HIGH
&gpio0 6 GPIO_ACTIVE_HIGH
&gpio0 7 GPIO_ACTIVE_HIGH>;
ts,csn-gpios = <&gpio0 16 GPIO_ACTIVE_HIGH>;
ts,txrx-gpios = <&gpio0 24 GPIO_ACTIVE_HIGH>;
ts,strobe-gpios = <&gpio0 25 GPIO_ACTIVE_HIGH>;
ts,ale-gpios = <&gpio0 26 GPIO_ACTIVE_HIGH>;
ts,rdy-gpios = <&gpio0 21 GPIO_ACTIVE_HIGH>;
watchdog@2a {
compatible = "...";
/* ... */
};
};

14
Documentation/devicetree/bindings/clock/brcm,iproc-clocks.txt
View File

@ -137,6 +137,20 @@ These clock IDs are defined in:
ch1_audio audiopll 2 BCM_CYGNUS_AUDIOPLL_CH1
ch2_audio audiopll 3 BCM_CYGNUS_AUDIOPLL_CH2
Hurricane 2
------
PLL and leaf clock compatible strings for Hurricane 2 are:
"brcm,hr2-armpll"
The following table defines the set of PLL/clock for Hurricane 2:
Clock Source Index ID
--- ----- ----- ---------
crystal N/A N/A N/A
armpll crystal N/A N/A
Northstar and Northstar Plus
------
PLL and leaf clock compatible strings for Northstar and Northstar Plus are:

2
Documentation/devicetree/bindings/display/bridge/renesas,dw-hdmi.txt
View File

@ -37,7 +37,7 @@ Optional properties:
Example:
hdmi0: hdmi0@fead0000 {
hdmi0: hdmi@fead0000 {
compatible = "renesas,r8a7795-dw-hdmi";
reg = <0 0xfead0000 0 0x10000>;
interrupts = <0 389 IRQ_TYPE_LEVEL_HIGH>;

2
Documentation/devicetree/bindings/dma/sun6i-dma.txt
View File

@ -18,7 +18,7 @@ Required properties:
- #dma-cells : Should be 1, a single cell holding a line request number
Example:
dma: dma-controller@01c02000 {
dma: dma-controller@1c02000 {
compatible = "allwinner,sun6i-a31-dma";
reg = <0x01c02000 0x1000>;
interrupts = <0 50 4>;

16
Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt
View File

@ -13,6 +13,10 @@ Required properties:
+ allwinner,sun50i-h5-mali
+ amlogic,meson-gxbb-mali
+ amlogic,meson-gxl-mali
+ rockchip,rk3036-mali
+ rockchip,rk3066-mali
+ rockchip,rk3188-mali
+ rockchip,rk3228-mali
+ stericsson,db8500-mali
- reg: Physical base address and length of the GPU registers
@ -40,10 +44,18 @@ Optional properties:
Memory region to allocate from, as defined in
Documentation/devicetree/bindi/reserved-memory/reserved-memory.txt
- mali-supply:
Phandle to regulator for the Mali device, as defined in
Documentation/devicetree/bindings/regulator/regulator.txt for details.
- operating-points-v2:
Operating Points for the GPU, as defined in
Documentation/devicetree/bindings/opp/opp.txt
- power-domains:
A power domain consumer specifier as defined in
Documentation/devicetree/bindings/power/power_domain.txt
Vendor-specific bindings
------------------------
@ -63,6 +75,10 @@ to specify one more vendor-specific compatible, among:
Required properties:
* resets: phandle to the reset line for the GPU
- Rockchip variants:
Required properties:
* resets: phandle to the reset line for the GPU
- stericsson,db8500-mali
Required properties:
* interrupt-names and interrupts:

26
Documentation/devicetree/bindings/misc/ge-achc.txt Normal file
View File

@ -0,0 +1,26 @@
* GE Healthcare USB Management Controller
A device which handles data aquisition from compatible USB based peripherals.
SPI is used for device management.
Note: This device does not expose the peripherals as USB devices.
Required properties:
- compatible : Should be "ge,achc"
Required SPI properties:
- reg : Should be address of the device chip select within
the controller.
- spi-max-frequency : Maximum SPI clocking speed of device in Hz, should be
1MHz for the GE ACHC.
Example:
spidev0: spi@0 {
compatible = "ge,achc";
reg = <0>;
spi-max-frequency = <1000000>;
};

2
Documentation/devicetree/bindings/mtd/jedec,spi-nor.txt
View File

@ -13,6 +13,7 @@ Required properties:
at25df321a
at25df641
at26df081a
en25s64
mr25h256
mr25h10
mr25h40
@ -31,6 +32,7 @@ Required properties:
s25fl008k
s25fl064k
sst25vf040b
sst25wf040b
m25p40
m25p80
m25p16

207
Documentation/devicetree/bindings/net/dwmac-sun8i.txt Normal file
View File

@ -0,0 +1,207 @@
* Allwinner sun8i GMAC ethernet controller
This device is a platform glue layer for stmmac.
Please see stmmac.txt for the other unchanged properties.
Required properties:
- compatible: must be one of the following string:
"allwinner,sun8i-a83t-emac"
"allwinner,sun8i-h3-emac"
"allwinner,sun8i-v3s-emac"
"allwinner,sun50i-a64-emac"
- reg: address and length of the register for the device.
- interrupts: interrupt for the device
- interrupt-names: must be "macirq"
- clocks: A phandle to the reference clock for this device
- clock-names: must be "stmmaceth"
- resets: A phandle to the reset control for this device
- reset-names: must be "stmmaceth"
- phy-mode: See ethernet.txt
- phy-handle: See ethernet.txt
- #address-cells: shall be 1
- #size-cells: shall be 0
- syscon: A phandle to the syscon of the SoC with one of the following
compatible string:
- allwinner,sun8i-h3-system-controller
- allwinner,sun8i-v3s-system-controller
- allwinner,sun50i-a64-system-controller
- allwinner,sun8i-a83t-system-controller
Optional properties:
- allwinner,tx-delay-ps: TX clock delay chain value in ps. Range value is 0-700. Default is 0)
- allwinner,rx-delay-ps: RX clock delay chain value in ps. Range value is 0-3100. Default is 0)
Both delay properties need to be a multiple of 100. They control the delay for
external PHY.
Optional properties for the following compatibles:
- "allwinner,sun8i-h3-emac",
- "allwinner,sun8i-v3s-emac":
- allwinner,leds-active-low: EPHY LEDs are active low
Required child node of emac:
- mdio bus node: should be named mdio with compatible "snps,dwmac-mdio"
Required properties of the mdio node:
- #address-cells: shall be 1
- #size-cells: shall be 0
The device node referenced by "phy" or "phy-handle" must be a child node
of the mdio node. See phy.txt for the generic PHY bindings.
The following compatibles require that the emac node have a mdio-mux child
node called "mdio-mux":
- "allwinner,sun8i-h3-emac"
- "allwinner,sun8i-v3s-emac":
Required properties for the mdio-mux node:
- compatible = "allwinner,sun8i-h3-mdio-mux"
- mdio-parent-bus: a phandle to EMAC mdio
- one child mdio for the integrated mdio with the compatible
"allwinner,sun8i-h3-mdio-internal"
- one child mdio for the external mdio if present (V3s have none)
Required properties for the mdio-mux children node:
- reg: 1 for internal MDIO bus, 2 for external MDIO bus
The following compatibles require a PHY node representing the integrated
PHY, under the integrated MDIO bus node if an mdio-mux node is used:
- "allwinner,sun8i-h3-emac",
- "allwinner,sun8i-v3s-emac":
Additional information regarding generic multiplexer properties can be found
at Documentation/devicetree/bindings/net/mdio-mux.txt
Required properties of the integrated phy node:
- clocks: a phandle to the reference clock for the EPHY
- resets: a phandle to the reset control for the EPHY
- Must be a child of the integrated mdio
Example with integrated PHY:
emac: ethernet@1c0b000 {
compatible = "allwinner,sun8i-h3-emac";
syscon = <&syscon>;
reg = <0x01c0b000 0x104>;
interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq";
resets = <&ccu RST_BUS_EMAC>;
reset-names = "stmmaceth";
clocks = <&ccu CLK_BUS_EMAC>;
clock-names = "stmmaceth";
#address-cells = <1>;
#size-cells = <0>;
phy-handle = <&int_mii_phy>;
phy-mode = "mii";
allwinner,leds-active-low;
mdio: mdio {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,dwmac-mdio";
};
mdio-mux {
compatible = "mdio-mux", "allwinner,sun8i-h3-mdio-mux";
#address-cells = <1>;
#size-cells = <0>;
mdio-parent-bus = <&mdio>;
int_mdio: mdio@1 {
compatible = "allwinner,sun8i-h3-mdio-internal";
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
int_mii_phy: ethernet-phy@1 {
reg = <1>;
clocks = <&ccu CLK_BUS_EPHY>;
resets = <&ccu RST_BUS_EPHY>;
phy-is-integrated;
};
};
ext_mdio: mdio@2 {
reg = <2>;
#address-cells = <1>;
#size-cells = <0>;
};
};
};
Example with external PHY:
emac: ethernet@1c0b000 {
compatible = "allwinner,sun8i-h3-emac";
syscon = <&syscon>;
reg = <0x01c0b000 0x104>;
interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq";
resets = <&ccu RST_BUS_EMAC>;
reset-names = "stmmaceth";
clocks = <&ccu CLK_BUS_EMAC>;
clock-names = "stmmaceth";
#address-cells = <1>;
#size-cells = <0>;
phy-handle = <&ext_rgmii_phy>;
phy-mode = "rgmii";
allwinner,leds-active-low;
mdio: mdio {
#address-cells = <1>;
#size-cells = <0>;
compatible = "snps,dwmac-mdio";
};
mdio-mux {
compatible = "allwinner,sun8i-h3-mdio-mux";
#address-cells = <1>;
#size-cells = <0>;
mdio-parent-bus = <&mdio>;
int_mdio: mdio@1 {
compatible = "allwinner,sun8i-h3-mdio-internal";
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;
int_mii_phy: ethernet-phy@1 {
reg = <1>;
clocks = <&ccu CLK_BUS_EPHY>;
resets = <&ccu RST_BUS_EPHY>;
};
};
ext_mdio: mdio@2 {
reg = <2>;
#address-cells = <1>;
#size-cells = <0>;
ext_rgmii_phy: ethernet-phy@1 {
reg = <1>;
};
}:
};
};
Example with SoC without integrated PHY
emac: ethernet@1c0b000 {
compatible = "allwinner,sun8i-a83t-emac";
syscon = <&syscon>;
reg = <0x01c0b000 0x104>;
interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq";
resets = <&ccu RST_BUS_EMAC>;
reset-names = "stmmaceth";
clocks = <&ccu CLK_BUS_EMAC>;
clock-names = "stmmaceth";
#address-cells = <1>;
#size-cells = <0>;
phy-handle = <&ext_rgmii_phy>;
phy-mode = "rgmii";
mdio: mdio {
compatible = "snps,dwmac-mdio";
#address-cells = <1>;
#size-cells = <0>;
ext_rgmii_phy: ethernet-phy@1 {
reg = <1>;
};
};
};

22
Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.txt
View File

@ -143,6 +143,24 @@ Required properties:
* 16 : Alternate Function 15
* 17 : Analog
To simplify the usage, macro is available to generate "pinmux" field.
This macro is available here:
- include/dt-bindings/pinctrl/stm32-pinfunc.h
Some examples of using macro:
/* GPIO A9 set as alernate function 2 */
... {
pinmux = <STM32_PINMUX('A', 9, AF2)>;
};
/* GPIO A9 set as GPIO */
... {
pinmux = <STM32_PINMUX('A', 9, GPIO)>;
};
/* GPIO A9 set as analog */
... {
pinmux = <STM32_PINMUX('A', 9, ANALOG)>;
};
Optional properties:
- GENERIC_PINCONFIG: is the generic pinconfig options to use.
Available options are:
@ -165,13 +183,13 @@ pin-controller {
...
usart1_pins_a: usart1@0 {
pins1 {
pinmux = <STM32F429_PA9_FUNC_USART1_TX>;
pinmux = <STM32_PINMUX('A', 9, AF7)>;
bias-disable;
drive-push-pull;
slew-rate = <0>;
};
pins2 {
pinmux = <STM32F429_PA10_FUNC_USART1_RX>;
pinmux = <STM32_PINMUX('A', 10, AF7)>;
bias-disable;
};
};

1
Documentation/devicetree/bindings/power/renesas,apmu.txt
View File

@ -8,6 +8,7 @@ Required properties:
- compatible: Should be "renesas,<soctype>-apmu", "renesas,apmu" as fallback.
Examples with soctypes are:
- "renesas,r8a7743-apmu" (RZ/G1M)
- "renesas,r8a7745-apmu" (RZ/G1E)
- "renesas,r8a7790-apmu" (R-Car H2)
- "renesas,r8a7791-apmu" (R-Car M2-W)
- "renesas,r8a7792-apmu" (R-Car V2H)

2
Documentation/devicetree/bindings/serial/mvebu-uart.txt
View File

@ -8,6 +8,6 @@ Required properties:
Example:
serial@12000 {
compatible = "marvell,armada-3700-uart";
reg = <0x12000 0x400>;
reg = <0x12000 0x200>;
interrupts = <43>;
};

1
Documentation/devicetree/bindings/spi/spi-fsl-dspi.txt
View File

@ -5,6 +5,7 @@ Required properties:
"fsl,ls2085a-dspi"
or
"fsl,ls2080a-dspi" followed by "fsl,ls2085a-dspi"
"fsl,ls1012a-dspi" followed by "fsl,ls1021a-v1.0-dspi"
- reg : Offset and length of the register set for the device
- interrupts : Should contain SPI controller interrupt
- clocks: from common clock binding: handle to dspi clock.

9
Documentation/devicetree/bindings/thermal/hisilicon-thermal.txt
View File

@ -13,6 +13,7 @@
Example :
for Hi6220:
tsensor: tsensor@0,f7030700 {
compatible = "hisilicon,tsensor";
reg = <0x0 0xf7030700 0x0 0x1000>;
@ -21,3 +22,11 @@ Example :
clock-names = "thermal_clk";
#thermal-sensor-cells = <1>;
}
for Hi3660:
tsensor: tsensor@fff30000 {
compatible = "hisilicon,hi3660-tsensor";
reg = <0x0 0xfff30000 0x0 0x1000>;
interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
#thermal-sensor-cells = <1>;
};

32
Documentation/devicetree/bindings/thermal/nvidia,tegra186-bpmp-thermal.txt Normal file
View File

@ -0,0 +1,32 @@
NVIDIA Tegra186 BPMP thermal sensor
In Tegra186, the BPMP (Boot and Power Management Processor) implements an
interface that is used to read system temperatures, including CPU cluster
and GPU temperatures. This binding describes the thermal sensor that is
exposed by BPMP.
The BPMP thermal node must be located directly inside the main BPMP node. See
../firmware/nvidia,tegra186-bpmp.txt for details of the BPMP binding.
This node represents a thermal sensor. See thermal.txt for details of the
core thermal binding.
Required properties:
- compatible:
Array of strings.
One of:
- "nvidia,tegra186-bpmp-thermal".
- #thermal-sensor-cells: Cell for sensor index.
Single-cell integer.
Must be <1>.
Example:
bpmp {
...
bpmp_thermal: thermal {
compatible = "nvidia,tegra186-bpmp-thermal";
#thermal-sensor-cells = <1>;
};
};

6
Documentation/devicetree/bindings/vendor-prefixes.txt
View File

@ -18,6 +18,7 @@ al Annapurna Labs
allwinner Allwinner Technology Co., Ltd.
alphascale AlphaScale Integrated Circuits Systems, Inc.
altr Altera Corp.
amarula Amarula Solutions
amazon Amazon.com, Inc.
amcc Applied Micro Circuits Corporation (APM, formally AMCC)
amd Advanced Micro Devices (AMD), Inc.
@ -114,6 +115,7 @@ everspin Everspin Technologies, Inc.
exar Exar Corporation
excito Excito
ezchip EZchip Semiconductor
fairphone Fairphone B.V.
faraday Faraday Technology Corporation
fcs Fairchild Semiconductor
firefly Firefly
@ -199,6 +201,7 @@ mcube mCube
meas Measurement Specialties
mediatek MediaTek Inc.
megachips MegaChips
mele Shenzhen MeLE Digital Technology Ltd.
melexis Melexis N.V.
melfas MELFAS Inc.
mellanox Mellanox Technologies
@ -270,6 +273,7 @@ plathome Plat'Home Co., Ltd.
plda PLDA
poslab Poslab Technology Co., Ltd.
powervr PowerVR (deprecated, use img)
probox2 PROBOX2 (by W2COMP Co., Ltd.)
pulsedlight PulsedLight, Inc
qca Qualcomm Atheros, Inc.
qcom Qualcomm Technologies, Inc
@ -338,6 +342,7 @@ swir Sierra Wireless
syna Synaptics Inc.
synology Synology, Inc.
tbs TBS Technologies
tbs-biometrics Touchless Biometric Systems AG
tcg Trusted Computing Group
tcl Toby Churchill Ltd.
technexion TechNexion
@ -361,6 +366,7 @@ truly Truly Semiconductors Limited
tsd Theobroma Systems Design und Consulting GmbH
tyan Tyan Computer Corporation
ucrobotics uCRobotics
ubnt Ubiquiti Networks
udoo Udoo
uniwest United Western Technologies Corp (UniWest)
upisemi uPI Semiconductor Corp.

2
MAINTAINERS
View File

@ -1761,6 +1761,7 @@ Q: http://patchwork.kernel.org/project/linux-renesas-soc/list/
T: git git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas.git next
S: Supported
F: arch/arm64/boot/dts/renesas/
F: Documentation/devicetree/bindings/arm/shmobile.txt
F: drivers/soc/renesas/
F: include/linux/soc/renesas/
@ -1880,6 +1881,7 @@ F: arch/arm/boot/dts/sh*
F: arch/arm/configs/shmobile_defconfig
F: arch/arm/include/debug/renesas-scif.S
F: arch/arm/mach-shmobile/
F: Documentation/devicetree/bindings/arm/shmobile.txt
F: drivers/soc/renesas/
F: include/linux/soc/renesas/

41
arch/arm/boot/dts/Makefile
View File

@ -101,6 +101,8 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \
bcm4709-tplink-archer-c9-v1.dtb \
bcm47094-dlink-dir-885l.dtb \
bcm47094-linksys-panamera.dtb \
bcm47094-luxul-abr-4500.dtb \
bcm47094-luxul-xbr-4500.dtb \
bcm47094-luxul-xwr-3100.dtb \
bcm47094-netgear-r8500.dtb \
bcm94708.dtb \
@ -109,6 +111,8 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \
bcm953012hr.dtb \
bcm953012k.dtb
dtb-$(CONFIG_ARCH_BCM_53573) += \
bcm47189-luxul-xap-1440.dtb \
bcm47189-luxul-xap-810.dtb \
bcm47189-tenda-ac9.dtb \
bcm947189acdbmr.dtb
dtb-$(CONFIG_ARCH_BCM_63XX) += \
@ -118,6 +122,8 @@ dtb-$(CONFIG_ARCH_BCM_CYGNUS) += \
bcm911360k.dtb \
bcm958300k.dtb \
bcm958305k.dtb
dtb-$(CONFIG_ARCH_BCM_HR2) += \
bcm53340-ubnt-unifi-switch8.dtb
dtb-$(CONFIG_ARCH_BCM_MOBILE) += \
bcm28155-ap.dtb \
bcm21664-garnet.dtb \
@ -177,6 +183,7 @@ dtb-$(CONFIG_ARCH_EXYNOS5) += \
exynos5420-arndale-octa.dtb \
exynos5420-peach-pit.dtb \
exynos5420-smdk5420.dtb \
exynos5422-odroidhc1.dtb \
exynos5422-odroidxu3.dtb \
exynos5422-odroidxu3-lite.dtb \
exynos5422-odroidxu4.dtb \
@ -342,12 +349,14 @@ dtb-$(CONFIG_SOC_IMX51) += \
imx51-babbage.dtb \
imx51-digi-connectcore-jsk.dtb \
imx51-eukrea-mbimxsd51-baseboard.dtb \
imx51-ts4800.dtb
imx51-ts4800.dtb \
imx51-zii-rdu1.dtb
dtb-$(CONFIG_SOC_IMX53) += \
imx53-ard.dtb \
imx53-cx9020.dtb \
imx53-m53evk.dtb \
imx53-mba53.dtb \
imx53-ppd.dtb \
imx53-qsb.dtb \
imx53-qsrb.dtb \
imx53-smd.dtb \
@ -389,14 +398,19 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6dl-ts4900.dtb \
imx6dl-tx6dl-comtft.dtb \
imx6dl-tx6s-8034.dtb \
imx6dl-tx6s-8034-mb7.dtb \
imx6dl-tx6s-8035.dtb \
imx6dl-tx6s-8035-mb7.dtb \
imx6dl-tx6u-801x.dtb \
imx6dl-tx6u-80xx-mb7.dtb \
imx6dl-tx6u-8033.dtb \
imx6dl-tx6u-8033-mb7.dtb \
imx6dl-tx6u-811x.dtb \
imx6dl-tx6u-81xx-mb7.dtb \
imx6dl-udoo.dtb \
imx6dl-wandboard.dtb \
imx6dl-wandboard-revb1.dtb \
imx6dl-wandboard-revd1.dtb \
imx6q-apalis-eval.dtb \
imx6q-apalis-ixora.dtb \
imx6q-apalis-ixora-v1.1.dtb \
@ -408,6 +422,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6q-cm-fx6.dtb \
imx6q-cubox-i.dtb \
imx6q-dfi-fs700-m60.dtb \
imx6q-display5-tianma-tm070-1280x768.dtb \
imx6q-dmo-edmqmx6.dtb \
imx6q-evi.dtb \
imx6q-gk802.dtb \
@ -435,6 +450,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6q-nitrogen6_som2.dtb \
imx6q-novena.dtb \
imx6q-phytec-pbab01.dtb \
imx6q-pistachio.dtb \
imx6q-rex-pro.dtb \
imx6q-sabreauto.dtb \
imx6q-sabrelite.dtb \
@ -448,17 +464,25 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
imx6q-tx6q-1020.dtb \
imx6q-tx6q-1020-comtft.dtb \
imx6q-tx6q-1036.dtb \
imx6q-tx6q-1036-mb7.dtb \
imx6q-tx6q-10x0-mb7.dtb \
imx6q-tx6q-1110.dtb \
imx6q-tx6q-11x0-mb7.dtb \
imx6q-udoo.dtb \
imx6q-utilite-pro.dtb \
imx6q-wandboard.dtb \
imx6q-wandboard-revb1.dtb \
imx6q-wandboard-revd1.dtb \
imx6q-zii-rdu2.dtb \
imx6qp-nitrogen6_max.dtb \
imx6qp-nitrogen6_som2.dtb \
imx6qp-sabreauto.dtb \
imx6qp-sabresd.dtb \
imx6qp-tx6qp-8037.dtb \
imx6qp-tx6qp-8037-mb7.dtb \
imx6qp-tx6qp-8137.dtb \
imx6qp-tx6qp-8137-mb7.dtb \
imx6qp-wandboard-revd1.dtb \
imx6qp-zii-rdu2.dtb
dtb-$(CONFIG_SOC_IMX6SL) += \
imx6sl-evk.dtb \
@ -469,6 +493,7 @@ dtb-$(CONFIG_SOC_IMX6SX) += \
imx6sx-sdb-reva.dtb \
imx6sx-sdb-sai.dtb \
imx6sx-sdb.dtb \
imx6sx-softing-vining-2000.dtb \
imx6sx-udoo-neo-basic.dtb \
imx6sx-udoo-neo-extended.dtb \
imx6sx-udoo-neo-full.dtb
@ -681,6 +706,7 @@ dtb-$(CONFIG_ARCH_ORION5X) += \
orion5x-netgear-wnr854t.dtb \
orion5x-rd88f5182-nas.dtb
dtb-$(CONFIG_ARCH_ACTIONS) += \
owl-s500-cubieboard6.dtb \
owl-s500-guitar-bb-rev-b.dtb
dtb-$(CONFIG_ARCH_PRIMA2) += \
prima2-evb.dtb
@ -701,7 +727,9 @@ dtb-$(CONFIG_ARCH_QCOM) += \
qcom-ipq8064-ap148.dtb \
qcom-msm8660-surf.dtb \
qcom-msm8960-cdp.dtb \
qcom-msm8974-fairphone-fp2.dtb \
qcom-msm8974-lge-nexus5-hammerhead.dtb \
qcom-msm8974-sony-xperia-castor.dtb \
qcom-msm8974-sony-xperia-honami.dtb \
qcom-mdm9615-wp8548-mangoh-green.dtb
dtb-$(CONFIG_ARCH_REALVIEW) += \
@ -725,7 +753,9 @@ dtb-$(CONFIG_ARCH_RENESAS) += \
r8a73a4-ape6evm.dtb \
r8a7740-armadillo800eva.dtb \
r8a7743-iwg20d-q7.dtb \
r8a7743-iwg20d-q7-dbcm-ca.dtb \
r8a7743-sk-rzg1m.dtb \
r8a7745-iwg22d-sodimm.dtb \
r8a7745-sk-rzg1e.dtb \
r8a7778-bockw.dtb \
r8a7779-marzen.dtb \
@ -768,7 +798,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
rk3288-veyron-mickey.dtb \
rk3288-veyron-minnie.dtb \
rk3288-veyron-pinky.dtb \
rk3288-veyron-speedy.dtb
rk3288-veyron-speedy.dtb \
rk3288-vyasa.dtb
dtb-$(CONFIG_ARCH_S3C24XX) += \
s3c2416-smdk2416.dtb
dtb-$(CONFIG_ARCH_S3C64XX) += \
@ -891,6 +922,7 @@ dtb-$(CONFIG_MACH_SUN7I) += \
sun7i-a20-olinuxino-lime2.dtb \
sun7i-a20-olinuxino-lime2-emmc.dtb \
sun7i-a20-olinuxino-micro.dtb \
sun7i-a20-olinuxino-micro-emmc.dtb \
sun7i-a20-orangepi.dtb \
sun7i-a20-orangepi-mini.dtb \
sun7i-a20-pcduino3.dtb \
@ -916,6 +948,7 @@ dtb-$(CONFIG_MACH_SUN8I) += \
sun8i-a83t-allwinner-h8homlet-v2.dtb \
sun8i-a83t-bananapi-m3.dtb \
sun8i-a83t-cubietruck-plus.dtb \
sun8i-a83t-tbs-a711.dtb \
sun8i-h2-plus-orangepi-zero.dtb \
sun8i-h3-bananapi-m2-plus.dtb \
sun8i-h3-beelink-x2.dtb \
@ -932,8 +965,10 @@ dtb-$(CONFIG_MACH_SUN8I) += \
sun8i-h3-orangepi-plus2e.dtb \
sun8i-r16-bananapi-m2m.dtb \
sun8i-r16-parrot.dtb \
sun8i-r40-bananapi-m2-ultra.dtb \
sun8i-v3s-licheepi-zero.dtb \
sun8i-v3s-licheepi-zero-dock.dtb
sun8i-v3s-licheepi-zero-dock.dtb \
sun8i-v40-bananapi-m2-berry.dtb
dtb-$(CONFIG_MACH_SUN9I) += \
sun9i-a80-optimus.dtb \
sun9i-a80-cubieboard4.dtb

239
arch/arm/boot/dts/am43x-epos-evm.dts
View File

@ -75,6 +75,9 @@ matrix_keypad: matrix_keypad0 {
compatible = "gpio-matrix-keypad";
debounce-delay-ms = <5>;
col-scan-delay-us = <2>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&matrix_keypad_default>;
pinctrl-1 = <&matrix_keypad_sleep>;
row-gpios = <&gpio0 12 GPIO_ACTIVE_HIGH /* Bank0, pin12 */
&gpio0 13 GPIO_ACTIVE_HIGH /* Bank0, pin13 */
@ -145,6 +148,43 @@ sound0_master: simple-audio-card,codec {
};
&am43xx_pinmux {
pinctrl-names = "default";
pinctrl-0 = <&unused_pins>;
unused_pins: unused_pins {
pinctrl-single,pins = <
AM4372_IOPAD(0x848, DS0_PIN_OUTPUT_PULLUP | PIN_OUTPUT_PULLUP | MUX_MODE7)
AM4372_IOPAD(0x850, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0x858, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0x860, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0x864, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0x868, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0x86c, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0x878, DS0_PIN_OUTPUT_PULLUP | PIN_OUTPUT_PULLUP | MUX_MODE7)
AM4372_IOPAD(0x908, DS0_PIN_INPUT_PULLDOWN | PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0x91c, DS0_PIN_OUTPUT_PULLDOWN | PIN_OUTPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0x920, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0x9e0, DS0_PIN_INPUT_PULLDOWN | PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0xA0c, DS0_PIN_OUTPUT_PULLDOWN | PIN_OUTPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0xA38, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0xA3c, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0xA40, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0xA44, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0xA48, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0xA4c, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0xA50, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0xA54, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0xA58, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0xA5c, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0xA60, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0xA64, DS0_PIN_OUTPUT_PULLUP | PIN_OUTPUT_PULLUP | MUX_MODE7)
AM4372_IOPAD(0xA68, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0xA6C, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0xA74, DS0_PIN_INPUT_PULLDOWN | PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0xA78, DS0_PIN_INPUT | PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
cpsw_default: cpsw_default {
pinctrl-single,pins = <
/* Slave 1 */
@ -198,7 +238,7 @@ AM4372_IOPAD(0x98c, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2
>;
};
nand_flash_x8: nand_flash_x8 {
nand_flash_x8_default: nand_flash_x8_default {
pinctrl-single,pins = <
AM4372_IOPAD(0x840, PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpmc_a0.SELQSPIorNAND/GPIO */
AM4372_IOPAD(0x800, PIN_INPUT_PULLDOWN | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
@ -219,12 +259,39 @@ AM4372_IOPAD(0x89c, PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle.gpmc_be0n_cle */
>;
};
ecap0_pins: backlight_pins {
nand_flash_x8_sleep: nand_flash_x8_sleep {
pinctrl-single,pins = <
AM4372_IOPAD(0x840, DS0_PIN_OUTPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0x800, DS0_PIN_OUTPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0x804, DS0_PIN_OUTPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0x808, DS0_PIN_OUTPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0x80c, DS0_PIN_OUTPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0x810, DS0_PIN_OUTPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0x814, DS0_PIN_OUTPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0x818, DS0_PIN_OUTPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0x81c, DS0_PIN_OUTPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0x870, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
AM4372_IOPAD(0x874, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
AM4372_IOPAD(0x87c, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
AM4372_IOPAD(0x890, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
AM4372_IOPAD(0x894, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
AM4372_IOPAD(0x898, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
AM4372_IOPAD(0x89c, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
>;
};
ecap0_pins_default: backlight_pins_default {
pinctrl-single,pins = <
AM4372_IOPAD(0x964, MUX_MODE0) /* eCAP0_in_PWM0_out.eCAP0_in_PWM0_out MODE0 */
>;
};
ecap0_pins_sleep: backlight_pins_sleep {
pinctrl-single,pins = <
AM4372_IOPAD(0x964, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
>;
};
i2c2_pins: pinmux_i2c2_pins {
pinctrl-single,pins = <
AM4372_IOPAD(0x9c0, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE8) /* i2c2_sda.i2c2_sda */
@ -232,7 +299,7 @@ AM4372_IOPAD(0x9c4, PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE8) /* i2c2_scl
>;
};
spi0_pins: pinmux_spi0_pins {
spi0_pins_default: pinmux_spi0_pins_default {
pinctrl-single,pins = <
AM4372_IOPAD(0x950, PIN_INPUT | MUX_MODE0) /* spi0_clk.spi0_clk */
AM4372_IOPAD(0x954, PIN_OUTPUT | MUX_MODE0) /* spi0_d0.spi0_d0 */
@ -241,7 +308,16 @@ AM4372_IOPAD(0x95c, PIN_OUTPUT | MUX_MODE0) /* spi0_cs0.spi0_cs0 */
>;
};
spi1_pins: pinmux_spi1_pins {
spi0_pins_sleep: pinmux_spi0_pins_sleep {
pinctrl-single,pins = <
AM4372_IOPAD(0x950, DS0_PIN_OUTPUT_PULLUP | PIN_OUTPUT_PULLUP | MUX_MODE7)
AM4372_IOPAD(0x954, DS0_PIN_OUTPUT_PULLUP | PIN_OUTPUT_PULLUP | MUX_MODE7)
AM4372_IOPAD(0x958, DS0_PIN_OUTPUT_PULLUP | PIN_OUTPUT_PULLUP | MUX_MODE7)
AM4372_IOPAD(0x95c, DS0_PIN_OUTPUT_PULLUP | PIN_OUTPUT_PULLUP | MUX_MODE7)
>;
};
spi1_pins_default: pinmux_spi1_pins_default {
pinctrl-single,pins = <
AM4372_IOPAD(0x990, PIN_INPUT | MUX_MODE3) /* mcasp0_aclkx.spi1_clk */
AM4372_IOPAD(0x994, PIN_OUTPUT | MUX_MODE3) /* mcasp0_fsx.spi1_d0 */
@ -250,13 +326,54 @@ AM4372_IOPAD(0x99c, PIN_OUTPUT | MUX_MODE3) /* mcasp0_ahclkr.spi1_cs0 *
>;
};
mmc1_pins: pinmux_mmc1_pins {
spi1_pins_sleep: pinmux_spi1_pins_sleep {
pinctrl-single,pins = <
AM4372_IOPAD(0x990, DS0_PIN_OUTPUT_PULLDOWN | PIN_OUTPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0x994, DS0_PIN_OUTPUT_PULLDOWN | PIN_OUTPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0x998, DS0_PIN_OUTPUT_PULLDOWN | PIN_OUTPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0x99c, DS0_PIN_OUTPUT_PULLDOWN | PIN_OUTPUT_PULLDOWN | MUX_MODE7)
>;
};
mmc1_pins_default: pinmux_mmc1_pins_default {
pinctrl-single,pins = <
AM4372_IOPAD(0x960, PIN_INPUT | MUX_MODE7) /* spi0_cs1.gpio0_6 */
>;
};
qspi1_default: qspi1_default {
mmc1_pins_sleep: pinmux_mmc1_pins_sleep {
pinctrl-single,pins = <
AM4372_IOPAD(0x960, DS0_PIN_OUTPUT_PULLUP | PIN_INPUT | MUX_MODE7)
>;
};
matrix_keypad_default: matrix_keypad_default {
pinctrl-single,pins = <
AM4372_IOPAD(0x92c, PIN_OUTPUT | MUX_MODE7) /* mii1_tx_clk.gpio3_9 */
AM4372_IOPAD(0x930, PIN_OUTPUT | MUX_MODE7) /* mii1_rx_clk.gpio3_10 */
AM4372_IOPAD(0x934, PIN_OUTPUT | MUX_MODE7) /* mii1_rxd3.gpio2_18 */
AM4372_IOPAD(0x938, PIN_OUTPUT | MUX_MODE7) /* mii1_rxd2.gpio2_19 */
AM4372_IOPAD(0x978, PIN_INPUT_PULLDOWN | MUX_MODE7) /* uart1_ctsn.gpio0_12 */
AM4372_IOPAD(0x97C, PIN_INPUT_PULLDOWN | MUX_MODE7) /* uart1_rtsn.gpio0_13 */
AM4372_IOPAD(0x980, PIN_INPUT_PULLDOWN | MUX_MODE7) /* uart1_rxd.gpio0_14 */
AM4372_IOPAD(0x984, PIN_INPUT_PULLDOWN | MUX_MODE7) /* uart1_txd.gpio0_15 */
>;
};
matrix_keypad_sleep: matrix_keypad_sleep {
pinctrl-single,pins = <
AM4372_IOPAD(0x92c, PIN_INPUT_PULLUP | MUX_MODE7)
AM4372_IOPAD(0x930, PIN_INPUT_PULLUP | MUX_MODE7)
AM4372_IOPAD(0x934, PIN_INPUT_PULLUP | MUX_MODE7)
AM4372_IOPAD(0x938, PIN_INPUT_PULLUP | MUX_MODE7)
AM4372_IOPAD(0x978, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0x97C, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0x980, PIN_INPUT_PULLDOWN | MUX_MODE7)
AM4372_IOPAD(0x984, PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
qspi1_pins_default: qspi1_pins_default {
pinctrl-single,pins = <
AM4372_IOPAD(0x87c, PIN_INPUT_PULLUP | MUX_MODE3)
AM4372_IOPAD(0x888, PIN_INPUT_PULLUP | MUX_MODE2)
@ -267,12 +384,29 @@ AM4372_IOPAD(0x89c, PIN_INPUT_PULLUP | MUX_MODE3)
>;
};
pixcir_ts_pins: pixcir_ts_pins {
qspi1_pins_sleep: qspi1_pins_sleep {
pinctrl-single,pins = <
AM4372_IOPAD(0x87c, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
AM4372_IOPAD(0x888, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
AM4372_IOPAD(0x890, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
AM4372_IOPAD(0x894, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
AM4372_IOPAD(0x898, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
AM4372_IOPAD(0x89c, DS0_PIN_OUTPUT_PULLUP | MUX_MODE7)
>;
};
pixcir_ts_pins_default: pixcir_ts_pins_default {
pinctrl-single,pins = <
AM4372_IOPAD(0x844, PIN_INPUT_PULLUP | MUX_MODE7) /* gpmc_a1.gpio1_17 */
>;
};
pixcir_ts_pins_sleep: pixcir_ts_pins_sleep {
pinctrl-single,pins = <
AM4372_IOPAD(0x844, DS0_PIN_OUTPUT_PULLUP | PIN_OUTPUT_PULLUP | MUX_MODE7) /* gpmc_a1.gpio1_17 */
>;
};
hdq_pins: pinmux_hdq_pins {
pinctrl-single,pins = <
AM4372_IOPAD(0xa34, PIN_INPUT_PULLUP | MUX_MODE1) /* cam1_wen.hdq_gpio */
@ -355,6 +489,48 @@ AM4372_IOPAD(0xa04, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
>;
};
uart0_pins_default: uart0_pins_default {
pinctrl-single,pins = <
AM4372_IOPAD(0x968, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE0) /* uart0_ctsn.uart0_ctsn */
AM4372_IOPAD(0x96C, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE0) /* uart0_rtsn.uart0_rtsn */
AM4372_IOPAD(0x970, PIN_INPUT_PULLUP | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0) /* uart0_rxd.uart0_rxd */
AM4372_IOPAD(0x974, PIN_INPUT | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0) /* uart0_txd.uart0_txd */
>;
};
uart0_pins_sleep: uart0_pins_sleep {
pinctrl-single,pins = <
AM4372_IOPAD(0x968, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
AM4372_IOPAD(0x96C, DS0_PULL_UP_DOWN_EN | INPUT_EN | MUX_MODE7)
AM4372_IOPAD(0x970, PIN_INPUT_PULLUP | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0)
AM4372_IOPAD(0x974, PIN_INPUT | SLEWCTRL_FAST | DS0_PULL_UP_DOWN_EN | MUX_MODE0)
>;
};
usb2_phy1_default: usb2_phy1_default {
pinctrl-single,pins = <
AM4372_IOPAD(0xac0, PIN_INPUT_PULLDOWN | MUX_MODE0)
>;
};
usb2_phy1_sleep: usb2_phy1_sleep {
pinctrl-single,pins = <
AM4372_IOPAD(0xac0, DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
usb2_phy2_default: usb2_phy2_default {
pinctrl-single,pins = <
AM4372_IOPAD(0xac4, PIN_INPUT_PULLDOWN | MUX_MODE0)
>;
};
usb2_phy2_sleep: usb2_phy2_sleep {
pinctrl-single,pins = <
AM4372_IOPAD(0xac4, DS0_PULL_UP_DOWN_EN | PIN_INPUT_PULLDOWN | MUX_MODE7)
>;
};
mcasp1_pins: mcasp1_pins {
pinctrl-single,pins = <
AM4372_IOPAD(0x9a0, PIN_INPUT_PULLDOWN | MUX_MODE3) /* MCASP0_ACLKR/MCASP1_ACLKX */
@ -378,8 +554,9 @@ &mmc1 {
status = "okay";
vmmc-supply = <&vmmcsd_fixed>;
bus-width = <4>;
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&mmc1_pins_default>;
pinctrl-1 = <&mmc1_pins_sleep>;
cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
};
@ -478,8 +655,10 @@ at24@50 {
pixcir_ts@5c {
compatible = "pixcir,pixcir_tangoc";
pinctrl-names = "default";
pinctrl-0 = <&pixcir_ts_pins>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&pixcir_ts_pins_default>;
pinctrl-1 = <&pixcir_ts_pins_sleep>;
reg = <0x5c>;
interrupt-parent = <&gpio1>;
interrupts = <17 IRQ_TYPE_EDGE_FALLING>;
@ -550,8 +729,9 @@ &elm {
&gpmc {
status = "okay"; /* Disable QSPI when enabling GPMC (NAND) */
pinctrl-names = "default";
pinctrl-0 = <&nand_flash_x8>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&nand_flash_x8_default>;
pinctrl-1 = <&nand_flash_x8_sleep>;
ranges = <0 0 0x08000000 0x01000000>; /* CS0 space. Min partition = 16MB */
nand@0,0 {
compatible = "ti,omap2-nand";
@ -647,24 +827,30 @@ adc {
&ecap0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&ecap0_pins>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&ecap0_pins_default>;
pinctrl-1 = <&ecap0_pins_sleep>;
};
&spi0 {
pinctrl-names = "default";
pinctrl-0 = <&spi0_pins>;
status = "okay";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&spi0_pins_default>;
pinctrl-1 = <&spi0_pins_sleep>;
};
&spi1 {
pinctrl-names = "default";
pinctrl-0 = <&spi1_pins>;
status = "okay";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&spi1_pins_default>;
pinctrl-1 = <&spi1_pins_sleep>;
};
&usb2_phy1 {
status = "okay";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&usb2_phy1_default>;
pinctrl-1 = <&usb2_phy1_sleep>;
};
&usb1 {
@ -674,6 +860,9 @@ &usb1 {
&usb2_phy2 {
status = "okay";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&usb2_phy2_default>;
pinctrl-1 = <&usb2_phy2_sleep>;
};
&usb2 {
@ -683,8 +872,9 @@ &usb2 {
&qspi {
status = "disabled"; /* Disable GPMC (NAND) when enabling QSPI */
pinctrl-names = "default";
pinctrl-0 = <&qspi1_default>;
pinctrl-names = "default", "sleep";
pinctrl-0 = <&qspi1_pins_default>;
pinctrl-1 = <&qspi1_pins_sleep>;
spi-max-frequency = <48000000>;
m25p80@0 {
@ -770,6 +960,13 @@ vpfe1_ep: endpoint {
};
};
&uart0 {
status = "okay";
pinctrl-names = "default", "sleep";
pinctrl-0 = <&uart0_pins_default>;
pinctrl-1 = <&uart0_pins_sleep>;
};
&mcasp1 {
#sound-dai-cells = <0>;
pinctrl-names = "default", "sleep";

12
arch/arm/boot/dts/armada-370-synology-ds213j.dts
View File

@ -316,32 +316,32 @@ spi-flash@0 {
* change the default environment, unless you know
* what you are doing.
*/
partition@00000000 { /* u-boot */
partition@0 { /* u-boot */
label = "RedBoot";
reg = <0x00000000 0x000c0000>; /* 768KB */
};
partition@000c0000 { /* uImage */
partition@c0000 { /* uImage */
label = "zImage";
reg = <0x000c0000 0x002d0000>; /* 2880KB */
};
partition@00390000 { /* uInitramfs */
partition@390000 { /* uInitramfs */
label = "rd.gz";
reg = <0x00390000 0x00440000>; /* 4250KB */
};
partition@007d0000 { /* MAC address and serial number */
partition@7d0000 { /* MAC address and serial number */
label = "vendor";
reg = <0x007d0000 0x00010000>; /* 64KB */
};
partition@007e0000 {
partition@7e0000 {
label = "RedBoot config";
reg = <0x007e0000 0x00010000>; /* 64KB */
};
partition@007f0000 {
partition@7f0000 {
label = "FIS directory";
reg = <0x007f0000 0x00010000>; /* 64KB */
};

12
arch/arm/boot/dts/armada-385-synology-ds116.dts
View File

@ -267,35 +267,35 @@ spi-flash@0 {
* enumerated. The MAC address and the serial number are listed
* in the "vendor" partition.
*/
partition@00000000 {
partition@0 {
label = "RedBoot";
reg = <0x00000000 0x000f0000>;
read-only;
};
partition@000c0000 {
partition@c0000 {
label = "zImage";
reg = <0x000f0000 0x002d0000>;
};
partition@00390000 {
partition@390000 {
label = "rd.gz";
reg = <0x003c0000 0x00410000>;
};
partition@007d0000 {
partition@7d0000 {
label = "vendor";
reg = <0x007d0000 0x00010000>;
read-only;
};
partition@007e0000 {
partition@7e0000 {
label = "RedBoot config";
reg = <0x007e0000 0x00010000>;
read-only;
};
partition@007f0000 {
partition@7f0000 {
label = "FIS directory";
reg = <0x007f0000 0x00010000>;
read-only;

12
arch/arm/boot/dts/armada-xp-synology-ds414.dts
View File

@ -332,32 +332,32 @@ spi-flash@0 {
* change the default environment, unless you know
* what you are doing.
*/
partition@00000000 { /* u-boot */
partition@0 { /* u-boot */
label = "RedBoot";
reg = <0x00000000 0x000d0000>; /* 832KB */
};
partition@000c0000 { /* uImage */
partition@c0000 { /* uImage */
label = "zImage";
reg = <0x000d0000 0x002d0000>; /* 2880KB */
};
partition@003a0000 { /* uInitramfs */
partition@3a0000 { /* uInitramfs */
label = "rd.gz";
reg = <0x003a0000 0x00430000>; /* 4250KB */
};
partition@007d0000 { /* MAC address and serial number */
partition@7d0000 { /* MAC address and serial number */
label = "vendor";
reg = <0x007d0000 0x00010000>; /* 64KB */
};
partition@007e0000 {
partition@7e0000 {
label = "RedBoot config";
reg = <0x007e0000 0x00010000>; /* 64KB */
};
partition@007f0000 {
partition@7f0000 {
label = "FIS directory";
reg = <0x007f0000 0x00010000>; /* 64KB */
};

3
arch/arm/boot/dts/artpec6.dtsi
View File

@ -151,7 +151,6 @@ pmu {
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&cpu0>, <&cpu1>;
interrupt-parent = <&intc>;
};
pcie: pcie@f8050000 {
@ -185,7 +184,6 @@ amba@0 {
compatible = "simple-bus";
#address-cells = <0x1>;
#size-cells = <0x1>;
interrupt-parent = <&intc>;
ranges;
dma-ranges = <0x80000000 0x00000000 0x40000000>;
dma-coherent;
@ -195,7 +193,6 @@ ethernet: ethernet@f8010000 {
clocks = <&eth_phy_ref_clk>,
<&clkctrl ARTPEC6_CLK_ETH_ACLK>;
compatible = "snps,dwc-qos-ethernet-4.10";
interrupt-parent = <&intc>;
interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
reg = <0xf8010000 0x4000>;

19
arch/arm/boot/dts/aspeed-ast2500-evb.dts
View File

@ -60,3 +60,22 @@ &mac1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
};
&i2c3 {
status = "okay";
eeprom@50 {
compatible = "atmel,24c08";
reg = <0x50>;
pagesize = <16>;
};
};
&i2c7 {
status = "okay";
lm75@4d {
compatible = "national,lm75";
reg = <0x4d>;
};
};

56
arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts
View File

@ -7,10 +7,6 @@ / {
model = "Palmetto BMC";
compatible = "tyan,palmetto-bmc", "aspeed,ast2400";
aliases {
serial4 = &uart5;
};
chosen {
stdout-path = &uart5;
bootargs = "console=ttyS4,115200 earlyprintk";
@ -62,3 +58,55 @@ &mac0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rmii1_default>;
};
&i2c0 {
status = "okay";
eeprom@50 {
compatible = "atmel,24c256";
reg = <0x50>;
pagesize = <64>;
};
rtc@68 {
compatible = "dallas,ds3231";
reg = <0x68>;
};
};
&i2c1 {
status = "okay";
};
&i2c2 {
status = "okay";
tmp423@4c {
compatible = "ti,tmp423";
reg = <0x4c>;
};
};
&i2c3 {
status = "okay";
};
&i2c4 {
status = "okay";
};
&i2c5 {
status = "okay";
};
&i2c6 {
status = "okay";
};
&i2c7 {
status = "okay";
};
&vuart {
status = "okay";
};

58
arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts
View File

@ -80,3 +80,61 @@ &mac0 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rmii1_default>;
};
&i2c2 {
status = "okay";
};
&i2c3 {
status = "okay";
};
&i2c4 {
status = "okay";
};
&i2c5 {
status = "okay";
};
&i2c6 {
/* PCIe slot 1 (x8) */
status = "okay";
};
&i2c7 {
/* PCIe slot 2 (x16) */
status = "okay";
};
&i2c8 {
/* PCIe slot 3 (x16) */
status = "okay";
};
&i2c9 {
/* PCIe slot 4 (x16) */
status = "okay";
};
&i2c10 {
/* PCIe slot 5 (x8) */
status = "okay";
};
&i2c11 {
status = "okay";
rtc@32 {
compatible = "epson,rx8900";
reg = <0x32>;
};
};
&i2c12 {
status = "okay";
};
&vuart {
status = "okay";
};

1832
arch/arm/boot/dts/aspeed-g4.dtsi
View File

File diff suppressed because it is too large Load Diff

1972
arch/arm/boot/dts/aspeed-g5.dtsi
View File

File diff suppressed because it is too large Load Diff

4
arch/arm/boot/dts/at91-ariag25.dts
View File

@ -147,12 +147,12 @@ rtc@fffffeb0 {
};
};
usb0: ohci@00600000 {
usb0: ohci@600000 {
status = "okay";
num-ports = <3>;
};
usb1: ehci@00700000 {
usb1: ehci@700000 {
status = "okay";
};
};

4
arch/arm/boot/dts/at91-ariettag25.dts
View File

@ -59,12 +59,12 @@ rtc@fffffeb0 {
};
};
usb0: ohci@00600000 {
usb0: ohci@600000 {
status = "okay";
num-ports = <3>;
};
usb1: ehci@00700000 {
usb1: ehci@700000 {
status = "okay";
};
};

4
arch/arm/boot/dts/at91-cosino_mega2560.dts
View File

@ -62,7 +62,7 @@ slot@0 {
};
};
usb0: ohci@00600000 {
usb0: ohci@600000 {
status = "okay";
num-ports = <3>;
atmel,vbus-gpio = <0 /* &pioD 18 GPIO_ACTIVE_LOW */
@ -71,7 +71,7 @@ &pioD 20 GPIO_ACTIVE_LOW
>;
};
usb1: ehci@00700000 {
usb1: ehci@700000 {
status = "okay";
};
};

4
arch/arm/boot/dts/at91-kizbox2.dts
View File

@ -133,11 +133,11 @@ watchdog@fffffe40 {
};
};
usb1: ohci@00600000 {
usb1: ohci@600000 {
status = "okay";
};
usb2: ehci@00700000 {
usb2: ehci@700000 {
status = "okay";
};

4
arch/arm/boot/dts/at91-kizboxmini.dts
View File

@ -59,12 +59,12 @@ watchdog@fffffe40 {
};
};
usb0: ohci@00600000 {
usb0: ohci@600000 {
num-ports = <1>;
status = "okay";
};
usb1: ehci@00700000 {
usb1: ehci@700000 {
status = "okay";
};

52
arch/arm/boot/dts/at91-sama5d27_som1_ek.dts
View File

@ -53,19 +53,27 @@ / {
model = "Atmel SAMA5D27 SOM1 EK";
compatible = "atmel,sama5d27-som1-ek", "atmel,sama5d27-som1", "atmel,sama5d27", "atmel,sama5d2", "atmel,sama5";
aliases {
serial0 = &uart1; /* DBGU */
serial1 = &uart4; /* mikro BUS 1 */
serial2 = &uart2; /* mikro BUS 2 */
i2c1 = &i2c1;
i2c2 = &i2c2;
};
chosen {
stdout-path = "serial0:115200n8";
};
ahb {
usb0: gadget@00300000 {
usb0: gadget@300000 {
atmel,vbus-gpio = <&pioA PIN_PD20 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usba_vbus>;
status = "okay";
};
usb1: ohci@00400000 {
usb1: ohci@400000 {
num-ports = <3>;
atmel,vbus-gpio = <0 /* &pioA PIN_PD20 GPIO_ACTIVE_HIGH */
&pioA PIN_PA27 GPIO_ACTIVE_HIGH
@ -76,7 +84,7 @@ &pioA PIN_PA27 GPIO_ACTIVE_HIGH
status = "okay";
};
usb2: ehci@00500000 {
usb2: ehci@500000 {
status = "okay";
};
@ -128,12 +136,14 @@ uart2: serial@f8024000 {
};
pwm0: pwm@f802c000 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mikrobus1_pwm &pinctrl_mikrobus2_pwm>;
status = "disabled"; /* Conflict with leds. */
};
flx1: flexcom@f8038000 {
atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>;
status = "disabled";
status = "okay";
i2c2: i2c@600 {
compatible = "atmel,sama5d2-i2c";
@ -147,7 +157,7 @@ i2c2: i2c@600 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mikrobus_i2c>;
atmel,fifo-size = <16>;
status = "disabled";
status = "okay";
};
};
@ -165,17 +175,12 @@ watchdog@f8048040 {
status = "okay";
};
can0: can@f8054000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_can0_default>;
};
uart3: serial@fc008000 {
atmel,use-dma-rx;
atmel,use-dma-tx;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3_default>;
status = "disabled";
status = "disabled"; /* Conflict with isc. */
};
uart4: serial@fc00c000 {
@ -199,7 +204,7 @@ uart7: serial@200 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flx3_default>;
atmel,fifo-size = <32>;
status = "disabled";
status = "disabled"; /* Conflict with isc. */
};
spi2: spi@400 {
@ -211,7 +216,7 @@ spi2: spi@400 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flx3_default>;
atmel,fifo-size = <16>;
status = "disabled";
status = "disabled"; /* Conflict with isc. */
};
};
@ -228,7 +233,7 @@ uart6: serial@200 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flx4_default>;
atmel,fifo-size = <32>;
status = "disabled";
status = "disabled"; /* Conflict with spi3 and i2c3. */
};
spi3: spi@400 {
@ -240,7 +245,7 @@ spi3: spi@400 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mikrobus_spi &pinctrl_mikrobus1_spi_cs &pinctrl_mikrobus2_spi_cs>;
atmel,fifo-size = <16>;
status = "okay";
status = "okay"; /* Conflict with uart6 and i2c3. */
};
i2c3: i2c@600 {
@ -255,7 +260,7 @@ i2c3: i2c@600 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_flx4_default>;
atmel,fifo-size = <16>;
status = "disabled";
status = "disabled"; /* Conflict with uart6 and spi3. */
};
};
@ -268,12 +273,6 @@ i2c1: i2c@fc028000 {
pinctrl@fc038000 {
pinctrl_can0_default: can0_default {
pinmux = <PIN_PC10__CANTX0>,
<PIN_PC11__CANRX0>;
bias-disable;
};
pinctrl_can1_default: can1_default {
pinmux = <PIN_PC26__CANTX1>,
<PIN_PC27__CANRX1>;
@ -350,7 +349,7 @@ cmd_data {
<PIN_PA7__SDMMC0_DAT5>,
<PIN_PA8__SDMMC0_DAT6>,
<PIN_PA9__SDMMC0_DAT7>;
bias-pull-up;
bias-disable;
};
ck_cd_vddsel {
@ -368,7 +367,7 @@ cmd_data {
<PIN_PA19__SDMMC1_DAT1>,
<PIN_PA20__SDMMC1_DAT2>,
<PIN_PA21__SDMMC1_DAT3>;
bias-pull-up;
bias-disable;
};
conf-ck_cd {
@ -512,6 +511,7 @@ pb4 {
label = "USER";
gpios = <&pioA PIN_PA29 GPIO_ACTIVE_LOW>;
linux,code = <0x104>;
wakeup-source;
};
};
@ -519,7 +519,7 @@ leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_led_gpio_default>;
status = "okay";
status = "okay"; /* Conflict with pwm0. */
red {
label = "red";

47
arch/arm/boot/dts/at91-sama5d2_xplained.dts
View File

@ -67,14 +67,14 @@ main_xtal {
};
ahb {
usb0: gadget@00300000 {
usb0: gadget@300000 {
atmel,vbus-gpio = <&pioA PIN_PA31 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usba_vbus>;
status = "okay";
};
usb1: ohci@00400000 {
usb1: ohci@400000 {
num-ports = <3>;
atmel,vbus-gpio = <0 /* &pioA PIN_PB9 GPIO_ACTIVE_HIGH */
&pioA PIN_PB10 GPIO_ACTIVE_HIGH
@ -85,7 +85,7 @@ &pioA PIN_PB10 GPIO_ACTIVE_HIGH
status = "okay";
};
usb2: ehci@00500000 {
usb2: ehci@500000 {
status = "okay";
};
@ -103,6 +103,8 @@ sdmmc1: sdio-host@b0000000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_sdmmc1_default>;
status = "okay"; /* conflict with qspi0 */
vqmmc-supply = <&vdd_3v3_reg>;
vmmc-supply = <&vdd_3v3_reg>;
};
apb {
@ -160,14 +162,6 @@ pmic@5b {
compatible = "active-semi,act8945a";
reg = <0x5b>;
active-semi,vsel-high;
active-semi,chglev-gpios = <&pioA PIN_PA12 GPIO_ACTIVE_HIGH>;
active-semi,lbo-gpios = <&pioA PIN_PC8 GPIO_ACTIVE_LOW>;
active-semi,irq_gpios = <&pioA PIN_PB13 GPIO_ACTIVE_LOW>;
active-semi,input-voltage-threshold-microvolt = <6600>;
active-semi,precondition-timeout = <40>;
active-semi,total-timeout = <3>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_charger_chglev &pinctrl_charger_lbo &pinctrl_charger_irq>;
status = "okay";
regulators {
@ -220,11 +214,28 @@ vdd_sdhc_1v8_reg: REG_LDO4 {
regulator-always-on;
};
};
charger {
compatible = "active-semi,act8945a-charger";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_charger_chglev &pinctrl_charger_lbo &pinctrl_charger_irq>;
interrupt-parent = <&pioA>;
interrupts = <PIN_PB13 GPIO_ACTIVE_LOW>;
active-semi,chglev-gpios = <&pioA PIN_PA12 GPIO_ACTIVE_HIGH>;
active-semi,lbo-gpios = <&pioA PIN_PC8 GPIO_ACTIVE_LOW>;
active-semi,input-voltage-threshold-microvolt = <6600>;
active-semi,precondition-timeout = <40>;
active-semi,total-timeout = <3>;
status = "okay";
};
};
};
pwm0: pwm@f802c000 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm0_pwm2_default>;
status = "disabled"; /* conflict with leds */
};
flx0: flexcom@f8034000 {
@ -449,7 +460,7 @@ cmd_data {
<PIN_PA7__SDMMC0_DAT5>,
<PIN_PA8__SDMMC0_DAT6>,
<PIN_PA9__SDMMC0_DAT7>;
bias-pull-up;
bias-disable;
};
ck_cd_rstn_vddsel {
@ -468,7 +479,7 @@ cmd_data {
<PIN_PA19__SDMMC1_DAT1>,
<PIN_PA20__SDMMC1_DAT2>,
<PIN_PA21__SDMMC1_DAT3>;
bias-pull-up;
bias-disable;
};
conf-ck_cd {
@ -508,6 +519,11 @@ pinctrl_usba_vbus: usba_vbus {
bias-disable;
};
pinctrl_pwm0_pwm2_default: pwm0_pwm2_default {
pinmux = <PIN_PB5__PWMH2>,
<PIN_PB6__PWML2>;
bias-pull-up;
};
};
classd: classd@fc048000 {
@ -536,6 +552,7 @@ bp1 {
label = "PB_USER";
gpios = <&pioA PIN_PB9 GPIO_ACTIVE_LOW>;
linux,code = <0x104>;
wakeup-source;
};
};
@ -543,7 +560,7 @@ leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_led_gpio_default>;
status = "okay";
status = "okay"; /* conflict with pwm0 */
red {
label = "red";

6
arch/arm/boot/dts/at91-sama5d3_xplained.dts
View File

@ -235,14 +235,14 @@ pinctrl_usba_vbus: usba_vbus {
};
};
usb0: gadget@00500000 {
usb0: gadget@500000 {
atmel,vbus-gpio = <&pioE 9 GPIO_ACTIVE_HIGH>; /* PE9, conflicts with A9 */
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usba_vbus>;
status = "okay";
};
usb1: ohci@00600000 {
usb1: ohci@600000 {
num-ports = <3>;
atmel,vbus-gpio = <0
&pioE 3 GPIO_ACTIVE_LOW
@ -251,7 +251,7 @@ &pioE 4 GPIO_ACTIVE_LOW
status = "okay";
};
usb2: ehci@00700000 {
usb2: ehci@700000 {
status = "okay";
};

6
arch/arm/boot/dts/at91-sama5d4_ma5d4evk.dts
View File

@ -21,14 +21,14 @@ chosen {
};
ahb {
usb0: gadget@00400000 {
usb0: gadget@400000 {
atmel,vbus-gpio = <&pioE 31 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usba_vbus>;
status = "okay";
};
usb1: ohci@00500000 {
usb1: ohci@500000 {
num-ports = <3>;
atmel,vbus-gpio = <0
&pioE 11 GPIO_ACTIVE_LOW
@ -37,7 +37,7 @@ &pioE 14 GPIO_ACTIVE_LOW
status = "okay";
};
usb2: ehci@00600000 {
usb2: ehci@600000 {
status = "okay";
};

6
arch/arm/boot/dts/at91-sama5d4_xplained.dts
View File

@ -170,14 +170,14 @@ pinctrl_macb0_phy_irq: macb0_phy_irq_0 {
};
};
usb0: gadget@00400000 {
usb0: gadget@400000 {
atmel,vbus-gpio = <&pioE 31 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usba_vbus>;
status = "okay";
};
usb1: ohci@00500000 {
usb1: ohci@500000 {
num-ports = <3>;
atmel,vbus-gpio = <0
&pioE 11 GPIO_ACTIVE_HIGH
@ -186,7 +186,7 @@ &pioE 14 GPIO_ACTIVE_HIGH
status = "okay";
};
usb2: ehci@00600000 {
usb2: ehci@600000 {
status = "okay";
};

6
arch/arm/boot/dts/at91-sama5d4ek.dts
View File

@ -216,14 +216,14 @@ pinctrl_mxt_ts: mxt_irq {
};
};
usb0: gadget@00400000 {
usb0: gadget@400000 {
atmel,vbus-gpio = <&pioE 31 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usba_vbus>;
status = "okay";
};
usb1: ohci@00500000 {
usb1: ohci@500000 {
num-ports = <3>;
atmel,vbus-gpio = <0 /* &pioE 10 GPIO_ACTIVE_LOW */
&pioE 11 GPIO_ACTIVE_LOW
@ -232,7 +232,7 @@ &pioE 12 GPIO_ACTIVE_LOW
status = "okay";
};
usb2: ehci@00600000 {
usb2: ehci@600000 {
status = "okay";
};

6
arch/arm/boot/dts/at91-vinco.dts
View File

@ -180,14 +180,14 @@ pinctrl_usba_vbus: usba_vbus {
};
};
usb0: gadget@00400000 {
usb0: gadget@400000 {
atmel,vbus-gpio = <&pioE 31 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usba_vbus>;
status = "disable";
};
usb1: ohci@00500000 {
usb1: ohci@500000 {
num-ports = <3>;
atmel,vbus-gpio = <0
&pioE 11 GPIO_ACTIVE_LOW
@ -196,7 +196,7 @@ &pioE 12 GPIO_ACTIVE_LOW
status = "disable";
};
usb2: ehci@00600000 {
usb2: ehci@600000 {
/* 4G Modem */
status = "okay";
};

4
arch/arm/boot/dts/at91rm9200.dtsi
View File

@ -66,7 +66,7 @@ main_xtal: main_xtal {
};
};
sram: sram@00200000 {
sram: sram@200000 {
compatible = "mmio-sram";
reg = <0x00200000 0x4000>;
};
@ -938,7 +938,7 @@ &pioB 1 GPIO_ACTIVE_HIGH
status = "disabled";
};
usb0: ohci@00300000 {
usb0: ohci@300000 {
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
reg = <0x00300000 0x100000>;
interrupts = <23 IRQ_TYPE_LEVEL_HIGH 2>;

2
arch/arm/boot/dts/at91rm9200ek.dts
View File

@ -78,7 +78,7 @@ rtc: rtc@fffffe00 {
};
};
usb0: ohci@00300000 {
usb0: ohci@300000 {
num-ports = <2>;
status = "okay";
};

2
arch/arm/boot/dts/at91sam9260.dtsi
View File

@ -69,7 +69,7 @@ adc_op_clk: adc_op_clk{
};
};
sram0: sram@002ff000 {
sram0: sram@2ff000 {
compatible = "mmio-sram";
reg = <0x002ff000 0x2000>;
};

4
arch/arm/boot/dts/at91sam9261.dtsi
View File

@ -60,7 +60,7 @@ slow_xtal: slow_xtal {
};
};
sram: sram@00300000 {
sram: sram@300000 {
compatible = "mmio-sram";
reg = <0x00300000 0x28000>;
};
@ -71,7 +71,7 @@ ahb {
#size-cells = <1>;
ranges;
usb0: ohci@00500000 {
usb0: ohci@500000 {
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
reg = <0x00500000 0x100000>;
interrupts = <20 IRQ_TYPE_LEVEL_HIGH 2>;

2
arch/arm/boot/dts/at91sam9261ek.dts
View File

@ -32,7 +32,7 @@ main_xtal {
};
ahb {
usb0: ohci@00500000 {
usb0: ohci@500000 {
status = "okay";
};

6
arch/arm/boot/dts/at91sam9263.dtsi
View File

@ -62,12 +62,12 @@ slow_xtal: slow_xtal {
};
};
sram0: sram@00300000 {
sram0: sram@300000 {
compatible = "mmio-sram";
reg = <0x00300000 0x14000>;
};
sram1: sram@00500000 {
sram1: sram@500000 {
compatible = "mmio-sram";
reg = <0x00500000 0x4000>;
};
@ -1010,7 +1010,7 @@ fb0: fb@0x00700000 {
status = "disabled";
};
usb0: ohci@00a00000 {
usb0: ohci@a00000 {
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
reg = <0x00a00000 0x100000>;
interrupts = <29 IRQ_TYPE_LEVEL_HIGH 2>;

2
arch/arm/boot/dts/at91sam9263ek.dts
View File

@ -191,7 +191,7 @@ data@7ca0000 {
};
};
usb0: ohci@00a00000 {
usb0: ohci@a00000 {
num-ports = <2>;
status = "okay";
atmel,vbus-gpio = <&pioA 24 GPIO_ACTIVE_HIGH

4
arch/arm/boot/dts/at91sam9g20.dtsi
View File

@ -16,11 +16,11 @@ memory {
reg = <0x20000000 0x08000000>;
};
sram0: sram@002ff000 {
sram0: sram@2ff000 {
status = "disabled";
};
sram1: sram@002fc000 {
sram1: sram@2fc000 {
compatible = "mmio-sram";
reg = <0x002fc000 0x8000>;
};

6
arch/arm/boot/dts/at91sam9g45.dtsi
View File

@ -74,7 +74,7 @@ adc_op_clk: adc_op_clk{
};
};
sram: sram@00300000 {
sram: sram@300000 {
compatible = "mmio-sram";
reg = <0x00300000 0x10000>;
};
@ -1313,7 +1313,7 @@ fb0: fb@0x00500000 {
status = "disabled";
};
usb0: ohci@00700000 {
usb0: ohci@700000 {
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
reg = <0x00700000 0x100000>;
interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
@ -1322,7 +1322,7 @@ usb0: ohci@00700000 {
status = "disabled";
};
usb1: ehci@00800000 {
usb1: ehci@800000 {
compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
reg = <0x00800000 0x100000>;
interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;

4
arch/arm/boot/dts/at91sam9m10g45ek.dts
View File

@ -290,14 +290,14 @@ data@4000000 {
};
};
usb0: ohci@00700000 {
usb0: ohci@700000 {
status = "okay";
num-ports = <2>;
atmel,vbus-gpio = <&pioD 1 GPIO_ACTIVE_LOW
&pioD 3 GPIO_ACTIVE_LOW>;
};
usb1: ehci@00800000 {
usb1: ehci@800000 {
status = "okay";
};
};

4
arch/arm/boot/dts/at91sam9n12.dtsi
View File

@ -64,7 +64,7 @@ main_xtal: main_xtal {
};
};
sram: sram@00300000 {
sram: sram@300000 {
compatible = "mmio-sram";
reg = <0x00300000 0x8000>;
};
@ -1018,7 +1018,7 @@ usb1: gadget@f803c000 {
};
};
usb0: ohci@00500000 {
usb0: ohci@500000 {
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
reg = <0x00500000 0x00100000>;
interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;

2
arch/arm/boot/dts/at91sam9n12ek.dts
View File

@ -169,7 +169,7 @@ nand@3 {
};
};
usb0: ohci@00500000 {
usb0: ohci@500000 {
num-ports = <1>;
atmel,vbus-gpio = <&pioB 7 GPIO_ACTIVE_LOW>;
status = "okay";

4
arch/arm/boot/dts/at91sam9rl.dtsi
View File

@ -70,7 +70,7 @@ adc_op_clk: adc_op_clk{
};
};
sram: sram@00300000 {
sram: sram@300000 {
compatible = "mmio-sram";
reg = <0x00300000 0x10000>;
};
@ -81,7 +81,7 @@ ahb {
#size-cells = <1>;
ranges;
fb0: fb@00500000 {
fb0: fb@500000 {
compatible = "atmel,at91sam9rl-lcdc";
reg = <0x00500000 0x1000>;
interrupts = <23 IRQ_TYPE_LEVEL_HIGH 3>;

2
arch/arm/boot/dts/at91sam9rlek.dts
View File

@ -32,7 +32,7 @@ main_xtal {
};
ahb {
fb0: fb@00500000 {
fb0: fb@500000 {
display = <&display0>;
status = "okay";

10
arch/arm/boot/dts/at91sam9x25ek.dts
View File

@ -16,6 +16,10 @@ / {
ahb {
apb {
can1: can@f8004000 {
status = "okay";
};
macb0: ethernet@f802c000 {
phy-mode = "rmii";
status = "okay";
@ -25,6 +29,12 @@ macb1: ethernet@f8030000 {
phy-mode = "rmii";
status = "okay";
};
pwm0: pwm@f8034000 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm0_pwm0_1>;
status = "okay";
};
};
};
};

6
arch/arm/boot/dts/at91sam9x5.dtsi
View File

@ -72,7 +72,7 @@ adc_op_clk: adc_op_clk{
};
};
sram: sram@00300000 {
sram: sram@300000 {
compatible = "mmio-sram";
reg = <0x00300000 0x8000>;
};
@ -1231,7 +1231,7 @@ pwm0: pwm@f8034000 {
};
};
usb0: ohci@00600000 {
usb0: ohci@600000 {
compatible = "atmel,at91rm9200-ohci", "usb-ohci";
reg = <0x00600000 0x100000>;
interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
@ -1240,7 +1240,7 @@ usb0: ohci@00600000 {
status = "disabled";
};
usb1: ehci@00700000 {
usb1: ehci@700000 {
compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
reg = <0x00700000 0x100000>;
interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;

6
arch/arm/boot/dts/at91sam9x5ek.dtsi
View File

@ -50,6 +50,8 @@ dbgu: serial@fffff200 {
};
usart0: serial@f801c000 {
atmel,use-dma-rx;
atmel,use-dma-tx;
status = "okay";
};
@ -134,7 +136,7 @@ ssc0: ssc@f0010000 {
};
};
usb0: ohci@00600000 {
usb0: ohci@600000 {
status = "okay";
num-ports = <3>;
atmel,vbus-gpio = <0 /* &pioD 18 GPIO_ACTIVE_LOW *//* Activate to have access to port A */
@ -143,7 +145,7 @@ &pioD 20 GPIO_ACTIVE_LOW
>;
};
usb1: ehci@00700000 {
usb1: ehci@700000 {
status = "okay";
};
};

4
arch/arm/boot/dts/at91sam9xe.dtsi
View File

@ -49,11 +49,11 @@ / {
model = "Atmel AT91SAM9XE family SoC";
compatible = "atmel,at91sam9xe", "atmel,at91sam9260";
sram0: sram@002ff000 {
sram0: sram@2ff000 {
status = "disabled";
};
sram1: sram@00300000 {
sram1: sram@300000 {
compatible = "mmio-sram";
reg = <0x00300000 0x4000>;
};

2
arch/arm/boot/dts/axp209.dtsi
View File

@ -107,7 +107,7 @@ reg_ldo5: ldo5 {
};
};
usb_power_supply: usb_power_supply {
usb_power_supply: usb-power-supply {
compatible = "x-powers,axp202-usb-power-supply";
status = "disabled";
};

139
arch/arm/boot/dts/axp81x.dtsi Normal file
View File

@ -0,0 +1,139 @@
/*
* Copyright 2017 Chen-Yu Tsai
*
* Chen-Yu Tsai <wens@csie.org>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
*/
/* AXP813/818 Integrated Power Management Chip */
&axp81x {
interrupt-controller;
#interrupt-cells = <1>;
regulators {
/* Default work frequency for buck regulators */
x-powers,dcdc-freq = <3000>;
reg_dcdc1: dcdc1 {
};
reg_dcdc2: dcdc2 {
};
reg_dcdc3: dcdc3 {
};
reg_dcdc4: dcdc4 {
};
reg_dcdc5: dcdc5 {
};
reg_dcdc6: dcdc6 {
};
reg_dcdc7: dcdc7 {
};
reg_aldo1: aldo1 {
};
reg_aldo2: aldo2 {
};
reg_aldo3: aldo3 {
};
reg_dldo1: dldo1 {
};
reg_dldo2: dldo2 {
};
reg_dldo3: dldo3 {
};
reg_dldo4: dldo4 {
};
reg_eldo1: eldo1 {
};
reg_eldo2: eldo2 {
};
reg_eldo3: eldo3 {
};
reg_fldo1: fldo1 {
};
reg_fldo2: fldo2 {
};
reg_fldo3: fldo3 {
};
reg_ldo_io0: ldo-io0 {
/* Disable by default to avoid conflicts with GPIO */
status = "disabled";
};
reg_ldo_io1: ldo-io1 {
/* Disable by default to avoid conflicts with GPIO */
status = "disabled";
};
reg_rtc_ldo: rtc-ldo {
/* RTC_LDO is a fixed, always-on regulator */
regulator-always-on;
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
};
reg_sw: sw {
};
reg_drivevbus: drivevbus {
status = "disabled";
};
};
};

28
arch/arm/boot/dts/bcm-cygnus.dtsi
View File

@ -96,14 +96,14 @@ axi {
#address-cells = <1>;
#size-cells = <1>;
otp: otp@0301c800 {
otp: otp@301c800 {
compatible = "brcm,ocotp";
reg = <0x0301c800 0x2c>;
brcm,ocotp-size = <2048>;
status = "disabled";
};
pcie_phy: phy@0301d0a0 {
pcie_phy: phy@301d0a0 {
compatible = "brcm,cygnus-pcie-phy";
reg = <0x0301d0a0 0x14>;
#address-cells = <1>;
@ -120,7 +120,7 @@ pcie1_phy: phy@1 {
};
};
pinctrl: pinctrl@0301d0c8 {
pinctrl: pinctrl@301d0c8 {
compatible = "brcm,cygnus-pinmux";
reg = <0x0301d0c8 0x30>,
<0x0301d24c 0x2c>;
@ -141,7 +141,7 @@ spi_2: spi_2 {
};
};
mailbox: mailbox@03024024 {
mailbox: mailbox@3024024 {
compatible = "brcm,iproc-mailbox";
reg = <0x03024024 0x40>;
interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
@ -150,7 +150,7 @@ mailbox: mailbox@03024024 {
#mbox-cells = <1>;
};
gpio_crmu: gpio@03024800 {
gpio_crmu: gpio@3024800 {
compatible = "brcm,cygnus-crmu-gpio";
reg = <0x03024800 0x50>,
<0x03024008 0x18>;
@ -473,6 +473,16 @@ ohci0: usb@18048800 {
status = "disabled";
};
clcd: clcd@180a0000 {
compatible = "arm,pl111", "arm,primecell";
reg = <0x180a0000 0x1000>;
interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "combined";
clocks = <&axi41_clk>, <&apb_clk>;
clock-names = "clcdclk", "apb_pclk";
status = "disabled";
};
v3d: v3d@180a2000 {
compatible = "brcm,cygnus-v3d";
reg = <0x180a2000 0x1000>;
@ -575,6 +585,14 @@ adc: adc@180a6000 {
status = "disabled";
};
pwm: pwm@180aa500 {
compatible = "brcm,kona-pwm";
reg = <0x180aa500 0xc4>;
#pwm-cells = <3>;
clocks = <&asiu_clks BCM_CYGNUS_ASIU_PWM_CLK>;
status = "disabled";
};
keypad: keypad@180ac000 {
compatible = "brcm,bcm-keypad";
reg = <0x180ac000 0x14c>;

368
arch/arm/boot/dts/bcm-hr2.dtsi Normal file
View File

@ -0,0 +1,368 @@
/*
* BSD LICENSE
*
* Copyright(c) 2017 Broadcom. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* * Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* * Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* * Neither the name of Broadcom Corporation nor the names of its
* contributors may be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
/ {
compatible = "brcm,hr2";
model = "Broadcom Hurricane 2 SoC";
interrupt-parent = <&gic>;
#address-cells = <1>;
#size-cells = <1>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a9";
next-level-cache = <&L2>;
reg = <0x0>;
};
};
pmu {
compatible = "arm,cortex-a9-pmu";
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH
GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&cpu0>;
};
mpcore@19000000 {
compatible = "simple-bus";
ranges = <0x00000000 0x19000000 0x00023000>;
#address-cells = <1>;
#size-cells = <1>;
a9pll: arm_clk@0 {
#clock-cells = <0>;
compatible = "brcm,hr2-armpll";
clocks = <&osc>;
reg = <0x0 0x1000>;
};
timer@20200 {
compatible = "arm,cortex-a9-global-timer";
reg = <0x20200 0x100>;
interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&periph_clk>;
};
twd-timer@20600 {
compatible = "arm,cortex-a9-twd-timer";
reg = <0x20600 0x20>;
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) |
IRQ_TYPE_LEVEL_HIGH)>;
clocks = <&periph_clk>;
};
twd-watchdog@20620 {
compatible = "arm,cortex-a9-twd-wdt";
reg = <0x20620 0x20>;
interrupts = <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) |
IRQ_TYPE_LEVEL_HIGH)>;
clocks = <&periph_clk>;
};
gic: interrupt-controller@21000 {
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>;
#address-cells = <0>;
interrupt-controller;
reg = <0x21000 0x1000>,
<0x20100 0x100>;
};
L2: l2-cache@22000 {
compatible = "arm,pl310-cache";
reg = <0x22000 0x1000>;
cache-unified;
cache-level = <2>;
};
};
clocks {
#address-cells = <1>;
#size-cells = <1>;
ranges;
osc: oscillator {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <25000000>;
};
periph_clk: periph_clk {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clocks = <&a9pll>;
clock-div = <2>;
clock-mult = <1>;
};
};
axi@18000000 {
compatible = "simple-bus";
ranges = <0x00000000 0x18000000 0x0011c40c>;
#address-cells = <1>;
#size-cells = <1>;
uart0: serial@300 {
compatible = "ns16550a";
reg = <0x0300 0x100>;
interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&osc>;
status = "disabled";
};
uart1: serial@400 {
compatible = "ns16550a";
reg = <0x0400 0x100>;
interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&osc>;
status = "disabled";
};
dma@20000 {
compatible = "arm,pl330", "arm,primecell";
reg = <0x20000 0x1000>;
interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>;
status = "disabled";
};
amac0: ethernet@22000 {
compatible = "brcm,nsp-amac";
reg = <0x22000 0x1000>,
<0x110000 0x1000>;
reg-names = "amac_base", "idm_base";
interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
nand: nand@26000 {
compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1";
reg = <0x26000 0x600>,
<0x11b408 0x600>,
<0x026f00 0x20>;
reg-names = "nand", "iproc-idm", "iproc-ext";
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
brcm,nand-has-wp;
};
gpiob: gpio@30000 {
compatible = "brcm,iproc-hr2-gpio", "brcm,iproc-gpio";
reg = <0x30000 0x50>;
#gpio-cells = <2>;
gpio-controller;
ngpios = <4>;
interrupt-controller;
interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
};
pwm: pwm@31000 {
compatible = "brcm,iproc-pwm";
reg = <0x31000 0x28>;
clocks = <&osc>;
#pwm-cells = <3>;
status = "disabled";
};
rng: rng@33000 {
compatible = "brcm,bcm-nsp-rng";
reg = <0x33000 0x14>;
};
qspi: qspi@27200 {
compatible = "brcm,spi-bcm-qspi", "brcm,spi-nsp-qspi";
reg = <0x027200 0x184>,
<0x027000 0x124>,
<0x11c408 0x004>,
<0x0273a0 0x01c>;
reg-names = "mspi", "bspi", "intr_regs",
"intr_status_reg";
interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "spi_lr_fullness_reached",
"spi_lr_session_aborted",
"spi_lr_impatient",
"spi_lr_session_done",
"spi_lr_overhead",
"mspi_done",
"mspi_halted";
num-cs = <2>;
#address-cells = <1>;
#size-cells = <0>;
/* partitions defined in board DTS */
};
ccbtimer0: timer@34000 {
compatible = "arm,sp804";
reg = <0x34000 0x1000>;
interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
};
ccbtimer1: timer@35000 {
compatible = "arm,sp804";
reg = <0x35000 0x1000>;
interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
};
i2c0: i2c@38000 {
compatible = "brcm,iproc-i2c";
reg = <0x38000 0x50>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <GIC_SPI 95 IRQ_TYPE_NONE>;
clock-frequency = <100000>;
};
watchdog@39000 {
compatible = "arm,sp805", "arm,primecell";
reg = <0x39000 0x1000>;
interrupts = <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>;
};
i2c1: i2c@3b000 {
compatible = "brcm,iproc-i2c";
reg = <0x3b000 0x50>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <GIC_SPI 96 IRQ_TYPE_NONE>;
clock-frequency = <100000>;
};
};
pflash: nor@20000000 {
compatible = "cfi-flash", "jedec-flash";
reg = <0x20000000 0x04000000>;
status = "disabled";
#address-cells = <1>;
#size-cells = <1>;
/* partitions defined in board DTS */
};
pcie0: pcie@18012000 {
compatible = "brcm,iproc-pcie";
reg = <0x18012000 0x1000>;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &gic GIC_SPI 186 IRQ_TYPE_NONE>;
linux,pci-domain = <0>;
bus-range = <0x00 0xff>;
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
/* Note: The HW does not support I/O resources. So,
* only the memory resource range is being specified.
*/
ranges = <0x82000000 0 0x08000000 0x08000000 0 0x8000000>;
status = "disabled";
msi-parent = <&msi0>;
msi0: msi-controller {
compatible = "brcm,iproc-msi";
msi-controller;
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 182 IRQ_TYPE_NONE>,
<GIC_SPI 183 IRQ_TYPE_NONE>,
<GIC_SPI 184 IRQ_TYPE_NONE>,
<GIC_SPI 185 IRQ_TYPE_NONE>;
brcm,pcie-msi-inten;
};
};
pcie1: pcie@18013000 {
compatible = "brcm,iproc-pcie";
reg = <0x18013000 0x1000>;
#interrupt-cells = <1>;
interrupt-map-mask = <0 0 0 0>;
interrupt-map = <0 0 0 0 &gic GIC_SPI 192 IRQ_TYPE_NONE>;
linux,pci-domain = <1>;
bus-range = <0x00 0xff>;
#address-cells = <3>;
#size-cells = <2>;
device_type = "pci";
/* Note: The HW does not support I/O resources. So,
* only the memory resource range is being specified.
*/
ranges = <0x82000000 0 0x40000000 0x40000000 0 0x8000000>;
status = "disabled";
msi-parent = <&msi1>;
msi1: msi-controller {
compatible = "brcm,iproc-msi";
msi-controller;
interrupt-parent = <&gic>;
interrupts = <GIC_SPI 188 IRQ_TYPE_NONE>,
<GIC_SPI 189 IRQ_TYPE_NONE>,
<GIC_SPI 190 IRQ_TYPE_NONE>,
<GIC_SPI 191 IRQ_TYPE_NONE>;
brcm,pcie-msi-inten;
};
};
};

8
arch/arm/boot/dts/bcm-nsp.dtsi
View File

@ -75,7 +75,7 @@ mpcore {
#address-cells = <1>;
#size-cells = <1>;
a9pll: arm_clk@00000 {
a9pll: arm_clk@0 {
#clock-cells = <0>;
compatible = "brcm,nsp-armpll";
clocks = <&osc>;
@ -164,7 +164,7 @@ axi {
#address-cells = <1>;
#size-cells = <1>;
gpioa: gpio@0020 {
gpioa: gpio@20 {
compatible = "brcm,nsp-gpio-a";
reg = <0x0020 0x70>,
<0x3f1c4 0x1c>;
@ -176,7 +176,7 @@ gpioa: gpio@0020 {
gpio-ranges = <&pinctrl 0 0 32>;
};
uart0: serial@0300 {
uart0: serial@300 {
compatible = "ns16550a";
reg = <0x0300 0x100>;
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
@ -184,7 +184,7 @@ uart0: serial@0300 {
status = "disabled";
};
uart1: serial@0400 {
uart1: serial@400 {
compatible = "ns16550a";
reg = <0x0400 0x100>;
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;

5
arch/arm/boot/dts/bcm2837-rpi-3-b.dts
View File

@ -30,6 +30,11 @@ &uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_gpio32 &gpclk2_gpio43>;
status = "okay";
bluetooth {
compatible = "brcm,bcm43438-bt";
max-speed = <2000000>;
};
};
/* uart1 is mapped to the pin header */

3
arch/arm/boot/dts/bcm47081-luxul-xwr-1200.dts
View File

@ -57,7 +57,8 @@ lan2 {
usb {
label = "bcm53xx:green:usb";
gpios = <&chipcommon 8 GPIO_ACTIVE_LOW>;
linux,default-trigger = "none";
trigger-sources = <&ohci_port2>, <&ehci_port2>;
linux,default-trigger = "usbport";
};
status {

63
arch/arm/boot/dts/bcm47094-luxul-abr-4500.dts Normal file
View File

@ -0,0 +1,63 @@
/*
* Copyright (C) 2017 Luxul Inc.
*
* Licensed under the ISC license.
*/
/dts-v1/;
#include "bcm4708.dtsi"
#include "bcm5301x-nand-cs0-bch8.dtsi"
/ {
compatible = "luxul,abr-4500-v1", "brcm,bcm47094", "brcm,bcm4708";
model = "Luxul ABR-4500 V1";
chosen {
bootargs = "earlycon";
};
memory {
reg = <0x00000000 0x08000000
0x88000000 0x18000000>;
};
leds {
compatible = "gpio-leds";
status {
label = "bcm53xx:green:status";
gpios = <&chipcommon 20 GPIO_ACTIVE_LOW>;
linux,default-trigger = "timer";
};
usb3 {
label = "bcm53xx:green:usb3";
gpios = <&chipcommon 19 GPIO_ACTIVE_LOW>;
trigger-sources = <&ohci_port1>, <&ehci_port1>,
<&xhci_port1>;
linux,default-trigger = "usbport";
};
};
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
restart {
label = "Reset";
linux,code = <KEY_RESTART>;
gpios = <&chipcommon 17 GPIO_ACTIVE_LOW>;
};
};
};
&usb3 {
vcc-gpio = <&chipcommon 18 GPIO_ACTIVE_HIGH>;
};
&spi_nor {
status = "okay";
};

63
arch/arm/boot/dts/bcm47094-luxul-xbr-4500.dts Normal file
View File

@ -0,0 +1,63 @@
/*
* Copyright (C) 2017 Luxul Inc.
*
* Licensed under the ISC license.
*/
/dts-v1/;
#include "bcm4708.dtsi"
#include "bcm5301x-nand-cs0-bch8.dtsi"
/ {
compatible = "luxul,xbr-4500-v1", "brcm,bcm47094", "brcm,bcm4708";
model = "Luxul XBR-4500 V1";
chosen {
bootargs = "earlycon";
};
memory {
reg = <0x00000000 0x08000000
0x88000000 0x18000000>;
};
leds {
compatible = "gpio-leds";
status {
label = "bcm53xx:green:status";
gpios = <&chipcommon 20 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "timer";
};
usb3 {
label = "bcm53xx:green:usb3";
gpios = <&chipcommon 19 GPIO_ACTIVE_HIGH>;
trigger-sources = <&ohci_port1>, <&ehci_port1>,
<&xhci_port1>;
linux,default-trigger = "usbport";
};
};
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
restart {
label = "Reset";
linux,code = <KEY_RESTART>;
gpios = <&chipcommon 17 GPIO_ACTIVE_LOW>;
};
};
};
&usb3 {
vcc-gpio = <&chipcommon 18 GPIO_ACTIVE_HIGH>;
};
&spi_nor {
status = "okay";
};

50
arch/arm/boot/dts/bcm47189-luxul-xap-1440.dts Normal file
View File

@ -0,0 +1,50 @@
/*
* Copyright 2017 Luxul Inc.
*
* Licensed under the ISC license.
*/
/dts-v1/;
#include "bcm53573.dtsi"
/ {
compatible = "luxul,xap-1440-v1", "brcm,bcm47189", "brcm,bcm53573";
model = "Luxul XAP-1440 V1";
chosen {
bootargs = "earlycon";
};
memory {
reg = <0x00000000 0x08000000>;
};
leds {
compatible = "gpio-leds";
wlan {
label = "bcm53xx:blue:wlan";
gpios = <&chipcommon 10 GPIO_ACTIVE_LOW>;
linux,default-trigger = "default-off";
};
system {
label = "bcm53xx:green:system";
gpios = <&chipcommon 11 GPIO_ACTIVE_LOW>;
linux,default-trigger = "timer";
};
};
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
restart {
label = "Reset";
linux,code = <KEY_RESTART>;
gpios = <&chipcommon 7 GPIO_ACTIVE_LOW>;
};
};
};

87
arch/arm/boot/dts/bcm47189-luxul-xap-810.dts Normal file
View File

@ -0,0 +1,87 @@
/*
* Copyright 2017 Luxul Inc.
*
* Licensed under the ISC license.
*/
/dts-v1/;
#include "bcm53573.dtsi"
/ {
compatible = "luxul,xap-810-v1", "brcm,bcm47189", "brcm,bcm53573";
model = "Luxul XAP-810 V1";
chosen {
bootargs = "earlycon";
};
memory {
reg = <0x00000000 0x08000000>;
};
leds {
compatible = "gpio-leds";
5ghz {
label = "bcm53xx:blue:5ghz";
gpios = <&chipcommon 11 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-off";
};
system {
label = "bcm53xx:green:system";
gpios = <&chipcommon 15 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "timer";
};
};
pcie0_leds {
compatible = "gpio-leds";
2ghz {
label = "bcm53xx:blue:2ghz";
gpios = <&pcie0_chipcommon 3 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "default-off";
};
};
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
restart {
label = "Reset";
linux,code = <KEY_RESTART>;
gpios = <&chipcommon 7 GPIO_ACTIVE_LOW>;
};
};
};
&pcie0 {
ranges = <0x00000000 0 0 0 0 0x00100000>;
#address-cells = <3>;
#size-cells = <2>;
bridge@0,0,0 {
reg = <0x0000 0 0 0 0>;
ranges = <0x00000000 0 0 0 0 0 0 0x00100000>;
#address-cells = <3>;
#size-cells = <2>;
wifi@0,1,0 {
reg = <0x0000 0 0 0 0>;
ranges = <0x00000000 0 0 0 0x00100000>;
#address-cells = <1>;
#size-cells = <1>;
pcie0_chipcommon: chipcommon@0 {
reg = <0 0x1000>;
gpio-controller;
#gpio-cells = <2>;
};
};
};
};

6
arch/arm/boot/dts/bcm5301x.dtsi
View File

@ -24,7 +24,7 @@ chipcommonA {
#address-cells = <1>;
#size-cells = <1>;
uart0: serial@0300 {
uart0: serial@300 {
compatible = "ns16550";
reg = <0x0300 0x100>;
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
@ -32,7 +32,7 @@ uart0: serial@0300 {
status = "disabled";
};
uart1: serial@0400 {
uart1: serial@400 {
compatible = "ns16550";
reg = <0x0400 0x100>;
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
@ -47,7 +47,7 @@ mpcore {
#address-cells = <1>;
#size-cells = <1>;
a9pll: arm_clk@00000 {
a9pll: arm_clk@0 {
#clock-cells = <0>;
compatible = "brcm,nsp-armpll";
clocks = <&osc>;

85
arch/arm/boot/dts/bcm53340-ubnt-unifi-switch8.dts Normal file
View File

@ -0,0 +1,85 @@
/*
* DTS for Unifi Switch 8 port
*
* Copyright (C) 2017 Florian Fainelli <f.fainelli@gmail.com>
*
* Licensed under the GNU/GPL. See COPYING for details.
*/
/dts-v1/;
#include "bcm-hr2.dtsi"
/ {
compatible = "ubnt,unifi-switch8", "brcm,bcm53342", "brcm,hr2";
model = "Ubiquiti UniFi Switch 8 (BCM53342)";
/* Hurricane 2 designs use the second UART */
chosen {
bootargs = "console=ttyS1,115200 earlyprintk";
};
memory@0 {
reg = <0x00000000 0x08000000>,
<0x68000000 0x08000000>;
};
};
&uart1 {
status = "okay";
};
&qspi {
status = "okay";
bspi-sel = <0>;
flash: m25p80@0 {
compatible = "m25p80";
reg = <0>;
#address-cells = <1>;
#size-cells = <1>;
spi-max-frequency = <12500000>;
spi-cpol;
spi-cpha;
partition@0 {
label = "u-boot";
reg = <0x0 0xc0000>;
};
partition@c0000 {
label = "u-boot-env";
reg = <0xc0000 0x10000>;
};
partition@d0000 {
label = "shmoo";
reg = <0xd0000 0x10000>;
};
partition@e0000 {
label = "kernel0";
reg = <0xe0000 0xf00000>;
};
partition@fe0000 {
label = "kernel1";
reg = <0xfe0000 0xf10000>;
};
partition@1ef0000 {
label = "cfg";
reg = <0x1ef0000 0x100000>;
};
partition@1ff0000 {
label = "EEPROM";
reg = <0x1ff0000 0x10000>;
};
};
};
&pcie0 {
/* Attaches to the internal switch */
status = "okay";
};

2
arch/arm/boot/dts/bcm53573.dtsi
View File

@ -107,7 +107,7 @@ chipcommon: chipcommon@0 {
gpio-controller;
#gpio-cells = <2>;
uart0: serial@0300 {
uart0: serial@300 {
compatible = "ns16550a";
reg = <0x0300 0x100>;
interrupt-parent = <&gic>;

6
arch/arm/boot/dts/berlin2.dtsi
View File

@ -202,7 +202,7 @@ apb@e80000 {
ranges = <0 0xe80000 0x10000>;
interrupt-parent = <&aic>;
gpio0: gpio@0400 {
gpio0: gpio@400 {
compatible = "snps,dw-apb-gpio";
reg = <0x0400 0x400>;
#address-cells = <1>;
@ -220,7 +220,7 @@ porta: gpio-port@0 {
};
};
gpio1: gpio@0800 {
gpio1: gpio@800 {
compatible = "snps,dw-apb-gpio";
reg = <0x0800 0x400>;
#address-cells = <1>;
@ -238,7 +238,7 @@ portb: gpio-port@1 {
};
};
gpio2: gpio@0c00 {
gpio2: gpio@c00 {
compatible = "snps,dw-apb-gpio";
reg = <0x0c00 0x400>;
#address-cells = <1>;

6
arch/arm/boot/dts/berlin2cd.dtsi
View File

@ -182,7 +182,7 @@ apb@e80000 {
ranges = <0 0xe80000 0x10000>;
interrupt-parent = <&aic>;
gpio0: gpio@0400 {
gpio0: gpio@400 {
compatible = "snps,dw-apb-gpio";
reg = <0x0400 0x400>;
#address-cells = <1>;
@ -200,7 +200,7 @@ porta: gpio-port@0 {
};
};
gpio1: gpio@0800 {
gpio1: gpio@800 {
compatible = "snps,dw-apb-gpio";
reg = <0x0800 0x400>;
#address-cells = <1>;
@ -218,7 +218,7 @@ portb: gpio-port@1 {
};
};
gpio2: gpio@0c00 {
gpio2: gpio@c00 {
compatible = "snps,dw-apb-gpio";
reg = <0x0c00 0x400>;
#address-cells = <1>;

6
arch/arm/boot/dts/berlin2q.dtsi
View File

@ -234,7 +234,7 @@ apb@e80000 {
ranges = <0 0xe80000 0x10000>;
interrupt-parent = <&aic>;
gpio0: gpio@0400 {
gpio0: gpio@400 {
compatible = "snps,dw-apb-gpio";
reg = <0x0400 0x400>;
#address-cells = <1>;
@ -252,7 +252,7 @@ porta: gpio-port@0 {
};
};
gpio1: gpio@0800 {
gpio1: gpio@800 {
compatible = "snps,dw-apb-gpio";
reg = <0x0800 0x400>;
#address-cells = <1>;
@ -270,7 +270,7 @@ portb: gpio-port@1 {
};
};
gpio2: gpio@0c00 {
gpio2: gpio@c00 {
compatible = "snps,dw-apb-gpio";
reg = <0x0c00 0x400>;
#address-cells = <1>;

18
arch/arm/boot/dts/da850-lcdk.dts
View File

@ -26,6 +26,19 @@ memory {
reg = <0xc0000000 0x08000000>;
};
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;
dsp_memory_region: dsp-memory@c3000000 {
compatible = "shared-dma-pool";
reg = <0xc3000000 0x1000000>;
reusable;
status = "okay";
};
};
sound {
compatible = "simple-audio-card";
simple-audio-card,name = "DA850/OMAP-L138 LCDK";
@ -319,3 +332,8 @@ &vpif {
pinctrl-0 = <&vpif_capture_pins>;
status = "okay";
};
&dsp {
memory-region = <&dsp_memory_region>;
status = "okay";
};

12
arch/arm/boot/dts/da850.dtsi
View File

@ -23,6 +23,18 @@ intc: interrupt-controller@fffee000 {
reg = <0xfffee000 0x2000>;
};
};
dsp: dsp@11800000 {
compatible = "ti,da850-dsp";
reg = <0x11800000 0x40000>,
<0x11e00000 0x8000>,
<0x11f00000 0x8000>,
<0x01c14044 0x4>,
<0x01c14174 0x8>;
reg-names = "l2sram", "l1pram", "l1dram", "host1cfg", "chipsig";
interrupt-parent = <&intc>;
interrupts = <28>;
status = "disabled";
};
soc@1c00000 {
compatible = "simple-bus";
model = "da850";

14
arch/arm/boot/dts/dove.dtsi
View File

@ -457,25 +457,25 @@ gpu_domain: gpu-domain {
};
};
thermal: thermal-diode@001c {
thermal: thermal-diode@1c {
compatible = "marvell,dove-thermal";
reg = <0x001c 0x0c>, <0x005c 0x08>;
};
gate_clk: clock-gating-ctrl@0038 {
gate_clk: clock-gating-ctrl@38 {
compatible = "marvell,dove-gating-clock";
reg = <0x0038 0x4>;
clocks = <&core_clk 0>;
#clock-cells = <1>;
};
divider_clk: core-clock@0064 {
divider_clk: core-clock@64 {
compatible = "marvell,dove-divider-clock";
reg = <0x0064 0x8>;
#clock-cells = <1>;
};
pinctrl: pin-ctrl@0200 {
pinctrl: pin-ctrl@200 {
compatible = "marvell,dove-pinctrl";
reg = <0x0200 0x14>,
<0x0440 0x04>;
@ -719,13 +719,13 @@ pmx_i2cmux_2: pmx-i2cmux-2 {
};
};
core_clk: core-clocks@0214 {
core_clk: core-clocks@214 {
compatible = "marvell,dove-core-clock";
reg = <0x0214 0x4>;
#clock-cells = <1>;
};
gpio0: gpio-ctrl@0400 {
gpio0: gpio-ctrl@400 {
compatible = "marvell,orion-gpio";
#gpio-cells = <2>;
gpio-controller;
@ -737,7 +737,7 @@ gpio0: gpio-ctrl@0400 {
interrupts = <12>, <13>, <14>, <60>;
};
gpio1: gpio-ctrl@0420 {
gpio1: gpio-ctrl@420 {
compatible = "marvell,orion-gpio";
#gpio-cells = <2>;
gpio-controller;

4
arch/arm/boot/dts/dra7-evm-common.dtsi
View File

@ -256,3 +256,7 @@ mbox_dsp2_ipc3x: mbox_dsp2_ipc3x {
status = "okay";
};
};
&pcie1_rc {
status = "okay";
};

4
arch/arm/boot/dts/dra7-evm.dts
View File

@ -497,7 +497,3 @@ &dcan1 {
pinctrl-1 = <&dcan1_pins_sleep>;
pinctrl-2 = <&dcan1_pins_default>;
};
&pcie1_rc {
status = "okay";
};

2
arch/arm/boot/dts/dra7.dtsi
View File

@ -170,7 +170,7 @@ pbias_regulator: pbias_regulator@e00 {
pbias_mmc_reg: pbias_mmc_omap5 {
regulator-name = "pbias_mmc_omap5";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <3000000>;
regulator-max-microvolt = <3300000>;
};
};

2
arch/arm/boot/dts/ep7211-edb7211.dts
View File

@ -75,7 +75,7 @@ blen: blen {
};
&bus {
flash: nor@00000000 {
flash: nor@0 {
compatible = "cfi-flash";
reg = <0 0x00000000 0x02000000>;
bank-width = <2>;

2
arch/arm/boot/dts/exynos3250-artik5.dtsi
View File

@ -29,7 +29,7 @@ memory@40000000 {
reg = <0x40000000 0x1ff00000>;
};
firmware@0205f000 {
firmware@205f000 {
compatible = "samsung,secure-firmware";
reg = <0x0205f000 0x1000>;
};

2
arch/arm/boot/dts/exynos3250-monk.dts
View File

@ -32,7 +32,7 @@ memory@40000000 {
reg = <0x40000000 0x1ff00000>;
};
firmware@0205F000 {
firmware@205f000 {
compatible = "samsung,secure-firmware";
reg = <0x0205F000 0x1000>;
};

24
arch/arm/boot/dts/exynos3250-rinato.dts
View File

@ -32,7 +32,7 @@ memory@40000000 {
reg = <0x40000000 0x1ff00000>;
};
firmware@0205F000 {
firmware@205f000 {
compatible = "samsung,secure-firmware";
reg = <0x0205F000 0x1000>;
};
@ -227,28 +227,6 @@ panel@0 {
vci-supply = <&ldo20_reg>;
reset-gpios = <&gpe0 1 GPIO_ACTIVE_LOW>;
te-gpios = <&gpx0 6 GPIO_ACTIVE_HIGH>;
power-on-delay= <30>;
power-off-delay= <120>;
reset-delay = <5>;
init-delay = <100>;
flip-horizontal;
flip-vertical;
panel-width-mm = <29>;
panel-height-mm = <29>;
display-timings {
timing-0 {
clock-frequency = <4600000>;
hactive = <320>;
vactive = <320>;
hfront-porch = <1>;
hback-porch = <1>;
hsync-len = <1>;
vfront-porch = <150>;
vback-porch = <1>;
vsync-len = <2>;
};
};
};
};

2
arch/arm/boot/dts/exynos3250.dtsi
View File

@ -122,7 +122,7 @@ xtcxo: clock@2 {
};
};
sysram@02020000 {
sysram@2020000 {
compatible = "mmio-sram";
reg = <0x02020000 0x40000>;
#address-cells = <1>;

4
arch/arm/boot/dts/exynos4.dtsi
View File

@ -55,7 +55,7 @@ aliases {
serial3 = &serial_3;
};
clock_audss: clock-controller@03810000 {
clock_audss: clock-controller@3810000 {
compatible = "samsung,exynos4210-audss-clock";
reg = <0x03810000 0x0C>;
#clock-cells = <1>;
@ -64,7 +64,7 @@ clock_audss: clock-controller@03810000 {
clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in";
};
i2s0: i2s@03830000 {
i2s0: i2s@3830000 {
compatible = "samsung,s5pv210-i2s";
reg = <0x03830000 0x100>;
clocks = <&clock_audss EXYNOS_I2S_BUS>,

2
arch/arm/boot/dts/exynos4210-pinctrl.dtsi
View File

@ -843,7 +843,7 @@ hdmi_cec: hdmi-cec {
};
};
pinctrl@03860000 {
pinctrl@3860000 {
gpz: gpz {
gpio-controller;
#gpio-cells = <2>;

2
arch/arm/boot/dts/exynos4210-universal_c210.dts
View File

@ -31,7 +31,7 @@ chosen {
stdout-path = &serial_2;
};
sysram@02020000 {
sysram@2020000 {
smp-sysram@0 {
status = "disabled";
};

4
arch/arm/boot/dts/exynos4210.dtsi
View File

@ -64,7 +64,7 @@ cpu@901 {
};
};
sysram: sysram@02020000 {
sysram: sysram@2020000 {
compatible = "mmio-sram";
reg = <0x02020000 0x20000>;
#address-cells = <1>;
@ -151,7 +151,7 @@ wakup_eint: wakeup-interrupt-controller {
};
};
pinctrl_2: pinctrl@03860000 {
pinctrl_2: pinctrl@3860000 {
compatible = "samsung,exynos4210-pinctrl";
reg = <0x03860000 0x1000>;
};

2
arch/arm/boot/dts/exynos4412-itop-scp-core.dtsi
View File

@ -26,7 +26,7 @@ memory@40000000 {
reg = <0x40000000 0x40000000>;
};
firmware@0203F000 {
firmware@203f000 {
compatible = "samsung,secure-firmware";
reg = <0x0203F000 0x1000>;
};

Some files were not shown because too many files have changed in this diff Show More