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arm64: dts: ls1012a: Fix incorrect I2C clock divider 

Ls1012a platform, the i2c input clock is actually platform pll CLK / 4
(this is the hardware connection), other clock divider can not get the
correct i2c clock, resulting in the output of SCL pin clock is not
accurate.

Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com>
Acked-by: Li Yang <leoyang.li@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Chuanhua Han 2019-08-06 16:42:21 +08:00 committed by Shawn Guo
parent 86c457e399
commit 52d3406ec7
1 changed files with 2 additions and 2 deletions
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4
arch/arm64/boot/dts/freescale/fsl-ls1012a.dtsi
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@ -323,7 +323,7 @@ i2c0: i2c@2180000 {
#size-cells = <0>; #size-cells = <0>;
reg = <0x0 0x2180000 0x0 0x10000>; reg = <0x0 0x2180000 0x0 0x10000>;
interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>; interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clockgen 4 0>; clocks = <&clockgen 4 3>;
status = "disabled"; status = "disabled";
}; };
@ -333,7 +333,7 @@ i2c1: i2c@2190000 {
#size-cells = <0>; #size-cells = <0>;
reg = <0x0 0x2190000 0x0 0x10000>; reg = <0x0 0x2190000 0x0 0x10000>;
interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>; interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clockgen 4 0>; clocks = <&clockgen 4 3>;
status = "disabled"; status = "disabled";
}; };