sfc: set interrupt moderation via MCDI
SFN8000-series NICs require a new method of setting interrupt moderation, via MCDI. This is indicated by a workaround flag. This new MCDI command takes an explicit time value rather than a number of ticks. It therefore makes sense to also store the moderation values in terms of time, since that is what the ethtool interface is interested in. Signed-off-by: Bert Kenward <bkenward@solarflare.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
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a995560a27
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539de7c524
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@ -1749,27 +1749,43 @@ static size_t efx_ef10_update_stats_vf(struct efx_nic *efx, u64 *full_stats,
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static void efx_ef10_push_irq_moderation(struct efx_channel *channel)
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{
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struct efx_nic *efx = channel->efx;
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unsigned int mode, value;
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unsigned int mode, usecs;
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efx_dword_t timer_cmd;
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if (channel->irq_moderation) {
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if (channel->irq_moderation_us) {
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mode = 3;
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value = channel->irq_moderation - 1;
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usecs = channel->irq_moderation_us;
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} else {
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mode = 0;
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value = 0;
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usecs = 0;
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}
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if (EFX_EF10_WORKAROUND_35388(efx)) {
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if (EFX_EF10_WORKAROUND_61265(efx)) {
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MCDI_DECLARE_BUF(inbuf, MC_CMD_SET_EVQ_TMR_IN_LEN);
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unsigned int ns = usecs * 1000;
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MCDI_SET_DWORD(inbuf, SET_EVQ_TMR_IN_INSTANCE,
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channel->channel);
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MCDI_SET_DWORD(inbuf, SET_EVQ_TMR_IN_TMR_LOAD_REQ_NS, ns);
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MCDI_SET_DWORD(inbuf, SET_EVQ_TMR_IN_TMR_RELOAD_REQ_NS, ns);
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MCDI_SET_DWORD(inbuf, SET_EVQ_TMR_IN_TMR_MODE, mode);
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efx_mcdi_rpc_async(efx, MC_CMD_SET_EVQ_TMR,
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inbuf, sizeof(inbuf), 0, NULL, 0);
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} else if (EFX_EF10_WORKAROUND_35388(efx)) {
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unsigned int ticks = efx_usecs_to_ticks(efx, usecs);
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EFX_POPULATE_DWORD_3(timer_cmd, ERF_DD_EVQ_IND_TIMER_FLAGS,
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EFE_DD_EVQ_IND_TIMER_FLAGS,
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ERF_DD_EVQ_IND_TIMER_MODE, mode,
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ERF_DD_EVQ_IND_TIMER_VAL, value);
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ERF_DD_EVQ_IND_TIMER_VAL, ticks);
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efx_writed_page(efx, &timer_cmd, ER_DD_EVQ_INDIRECT,
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channel->channel);
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} else {
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unsigned int ticks = efx_usecs_to_ticks(efx, usecs);
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EFX_POPULATE_DWORD_2(timer_cmd, ERF_DZ_TC_TIMER_MODE, mode,
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ERF_DZ_TC_TIMER_VAL, value);
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ERF_DZ_TC_TIMER_VAL, ticks);
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efx_writed_page(efx, &timer_cmd, ER_DZ_EVQ_TMR,
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channel->channel);
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}
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@ -2615,10 +2631,11 @@ static int efx_ef10_ev_init(struct efx_channel *channel)
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/* Successfully created event queue on channel 0 */
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rc = efx_mcdi_get_workarounds(efx, &implemented, &enabled);
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if (rc == -ENOSYS) {
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/* GET_WORKAROUNDS was implemented before the bug26807
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* workaround, thus the latter must be unavailable in this fw
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/* GET_WORKAROUNDS was implemented before these workarounds,
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* thus they must be unavailable in this firmware.
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*/
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nic_data->workaround_26807 = false;
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nic_data->workaround_61265 = false;
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rc = 0;
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} else if (rc) {
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goto fail;
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@ -2658,6 +2675,9 @@ static int efx_ef10_ev_init(struct efx_channel *channel)
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rc = 0;
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}
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}
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nic_data->workaround_61265 =
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!!(implemented & MC_CMD_GET_WORKAROUNDS_OUT_BUG61265);
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}
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if (!rc)
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@ -281,6 +281,27 @@ static int efx_process_channel(struct efx_channel *channel, int budget)
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* NAPI guarantees serialisation of polls of the same device, which
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* provides the guarantee required by efx_process_channel().
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*/
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static void efx_update_irq_mod(struct efx_nic *efx, struct efx_channel *channel)
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{
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int step = efx->irq_mod_step_us;
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if (channel->irq_mod_score < irq_adapt_low_thresh) {
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if (channel->irq_moderation_us > step) {
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channel->irq_moderation_us -= step;
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efx->type->push_irq_moderation(channel);
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}
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} else if (channel->irq_mod_score > irq_adapt_high_thresh) {
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if (channel->irq_moderation_us <
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efx->irq_rx_moderation_us) {
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channel->irq_moderation_us += step;
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efx->type->push_irq_moderation(channel);
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}
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}
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channel->irq_count = 0;
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channel->irq_mod_score = 0;
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}
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static int efx_poll(struct napi_struct *napi, int budget)
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{
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struct efx_channel *channel =
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@ -301,22 +322,7 @@ static int efx_poll(struct napi_struct *napi, int budget)
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if (efx_channel_has_rx_queue(channel) &&
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efx->irq_rx_adaptive &&
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unlikely(++channel->irq_count == 1000)) {
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if (unlikely(channel->irq_mod_score <
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irq_adapt_low_thresh)) {
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if (channel->irq_moderation > 1) {
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channel->irq_moderation -= 1;
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efx->type->push_irq_moderation(channel);
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}
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} else if (unlikely(channel->irq_mod_score >
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irq_adapt_high_thresh)) {
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if (channel->irq_moderation <
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efx->irq_rx_moderation) {
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channel->irq_moderation += 1;
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efx->type->push_irq_moderation(channel);
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}
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}
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channel->irq_count = 0;
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channel->irq_mod_score = 0;
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efx_update_irq_mod(efx, channel);
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}
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efx_filter_rfs_expire(channel);
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@ -1703,6 +1709,7 @@ static int efx_probe_nic(struct efx_nic *efx)
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netif_set_real_num_rx_queues(efx->net_dev, efx->n_rx_channels);
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/* Initialise the interrupt moderation settings */
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efx->irq_mod_step_us = DIV_ROUND_UP(efx->timer_quantum_ns, 1000);
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efx_init_irq_moderation(efx, tx_irq_mod_usec, rx_irq_mod_usec, true,
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true);
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@ -1949,14 +1956,21 @@ static void efx_remove_all(struct efx_nic *efx)
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* Interrupt moderation
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*
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**************************************************************************/
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static unsigned int irq_mod_ticks(unsigned int usecs, unsigned int quantum_ns)
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unsigned int efx_usecs_to_ticks(struct efx_nic *efx, unsigned int usecs)
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{
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if (usecs == 0)
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return 0;
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if (usecs * 1000 < quantum_ns)
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if (usecs * 1000 < efx->timer_quantum_ns)
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return 1; /* never round down to 0 */
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return usecs * 1000 / quantum_ns;
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return usecs * 1000 / efx->timer_quantum_ns;
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}
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unsigned int efx_ticks_to_usecs(struct efx_nic *efx, unsigned int ticks)
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{
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/* We must round up when converting ticks to microseconds
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* because we round down when converting the other way.
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*/
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return DIV_ROUND_UP(ticks * efx->timer_quantum_ns, 1000);
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}
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/* Set interrupt moderation parameters */
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@ -1968,18 +1982,12 @@ int efx_init_irq_moderation(struct efx_nic *efx, unsigned int tx_usecs,
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unsigned int irq_mod_max = DIV_ROUND_UP(efx->type->timer_period_max *
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efx->timer_quantum_ns,
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1000);
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unsigned int tx_ticks;
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unsigned int rx_ticks;
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EFX_ASSERT_RESET_SERIALISED(efx);
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if (tx_usecs > irq_mod_max || rx_usecs > irq_mod_max)
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return -EINVAL;
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tx_ticks = irq_mod_ticks(tx_usecs, efx->timer_quantum_ns);
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rx_ticks = irq_mod_ticks(rx_usecs, efx->timer_quantum_ns);
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if (tx_ticks != rx_ticks && efx->tx_channel_offset == 0 &&
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if (tx_usecs != rx_usecs && efx->tx_channel_offset == 0 &&
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!rx_may_override_tx) {
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netif_err(efx, drv, efx->net_dev, "Channels are shared. "
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"RX and TX IRQ moderation must be equal\n");
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@ -1987,12 +1995,12 @@ int efx_init_irq_moderation(struct efx_nic *efx, unsigned int tx_usecs,
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}
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efx->irq_rx_adaptive = rx_adaptive;
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efx->irq_rx_moderation = rx_ticks;
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efx->irq_rx_moderation_us = rx_usecs;
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efx_for_each_channel(channel, efx) {
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if (efx_channel_has_rx_queue(channel))
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channel->irq_moderation = rx_ticks;
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channel->irq_moderation_us = rx_usecs;
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else if (efx_channel_has_tx_queues(channel))
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channel->irq_moderation = tx_ticks;
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channel->irq_moderation_us = tx_usecs;
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}
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return 0;
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@ -2001,26 +2009,21 @@ int efx_init_irq_moderation(struct efx_nic *efx, unsigned int tx_usecs,
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void efx_get_irq_moderation(struct efx_nic *efx, unsigned int *tx_usecs,
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unsigned int *rx_usecs, bool *rx_adaptive)
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{
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/* We must round up when converting ticks to microseconds
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* because we round down when converting the other way.
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*/
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*rx_adaptive = efx->irq_rx_adaptive;
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*rx_usecs = DIV_ROUND_UP(efx->irq_rx_moderation *
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efx->timer_quantum_ns,
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1000);
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*rx_usecs = efx->irq_rx_moderation_us;
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/* If channels are shared between RX and TX, so is IRQ
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* moderation. Otherwise, IRQ moderation is the same for all
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* TX channels and is not adaptive.
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*/
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if (efx->tx_channel_offset == 0)
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if (efx->tx_channel_offset == 0) {
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*tx_usecs = *rx_usecs;
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else
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*tx_usecs = DIV_ROUND_UP(
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efx->channel[efx->tx_channel_offset]->irq_moderation *
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efx->timer_quantum_ns,
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1000);
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} else {
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struct efx_channel *tx_channel;
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tx_channel = efx->channel[efx->tx_channel_offset];
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*tx_usecs = tx_channel->irq_moderation_us;
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}
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}
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/**************************************************************************
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@ -204,6 +204,8 @@ int efx_try_recovery(struct efx_nic *efx);
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/* Global */
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void efx_schedule_reset(struct efx_nic *efx, enum reset_type type);
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unsigned int efx_usecs_to_ticks(struct efx_nic *efx, unsigned int usecs);
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unsigned int efx_ticks_to_usecs(struct efx_nic *efx, unsigned int ticks);
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int efx_init_irq_moderation(struct efx_nic *efx, unsigned int tx_usecs,
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unsigned int rx_usecs, bool rx_adaptive,
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bool rx_may_override_tx);
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@ -378,12 +378,15 @@ static void falcon_push_irq_moderation(struct efx_channel *channel)
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struct efx_nic *efx = channel->efx;
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/* Set timer register */
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if (channel->irq_moderation) {
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if (channel->irq_moderation_us) {
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unsigned int ticks;
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ticks = efx_usecs_to_ticks(efx, channel->irq_moderation_us);
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EFX_POPULATE_DWORD_2(timer_cmd,
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FRF_AB_TC_TIMER_MODE,
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FFE_BB_TIMER_MODE_INT_HLDOFF,
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FRF_AB_TC_TIMER_VAL,
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channel->irq_moderation - 1);
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ticks - 1);
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} else {
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EFX_POPULATE_DWORD_2(timer_cmd,
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FRF_AB_TC_TIMER_MODE,
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@ -392,7 +392,7 @@ enum efx_sync_events_state {
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* @eventq_init: Event queue initialised flag
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* @enabled: Channel enabled indicator
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* @irq: IRQ number (MSI and MSI-X only)
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* @irq_moderation: IRQ moderation value (in hardware ticks)
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* @irq_moderation_us: IRQ moderation value (in microseconds)
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* @napi_dev: Net device used with NAPI
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* @napi_str: NAPI control structure
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* @state: state for NAPI vs busy polling
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@ -433,7 +433,7 @@ struct efx_channel {
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bool eventq_init;
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bool enabled;
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int irq;
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unsigned int irq_moderation;
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unsigned int irq_moderation_us;
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struct net_device *napi_dev;
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struct napi_struct napi_str;
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#ifdef CONFIG_NET_RX_BUSY_POLL
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@ -811,7 +811,8 @@ struct vfdi_status;
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* @interrupt_mode: Interrupt mode
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* @timer_quantum_ns: Interrupt timer quantum, in nanoseconds
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* @irq_rx_adaptive: Adaptive IRQ moderation enabled for RX event queues
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* @irq_rx_moderation: IRQ moderation time for RX event queues
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* @irq_rx_mod_step_us: Step size for IRQ moderation for RX event queues
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* @irq_rx_moderation_us: IRQ moderation time for RX event queues
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* @msg_enable: Log message enable flags
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* @state: Device state number (%STATE_*). Serialised by the rtnl_lock.
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* @reset_pending: Bitmask for pending resets
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@ -941,7 +942,8 @@ struct efx_nic {
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enum efx_int_mode interrupt_mode;
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unsigned int timer_quantum_ns;
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bool irq_rx_adaptive;
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unsigned int irq_rx_moderation;
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unsigned int irq_mod_step_us;
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unsigned int irq_rx_moderation_us;
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u32 msg_enable;
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enum nic_state state;
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@ -507,6 +507,7 @@ enum {
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* @stats: Hardware statistics
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* @workaround_35388: Flag: firmware supports workaround for bug 35388
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* @workaround_26807: Flag: firmware supports workaround for bug 26807
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* @workaround_61265: Flag: firmware supports workaround for bug 61265
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* @must_check_datapath_caps: Flag: @datapath_caps needs to be revalidated
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* after MC reboot
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* @datapath_caps: Capabilities of datapath firmware (FLAGS1 field of
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@ -542,6 +543,7 @@ struct efx_ef10_nic_data {
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u64 stats[EF10_STAT_COUNT];
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bool workaround_35388;
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bool workaround_26807;
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bool workaround_61265;
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bool must_check_datapath_caps;
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u32 datapath_caps;
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u32 datapath_caps2;
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@ -1306,7 +1306,7 @@ static int efx_ptp_probe_channel(struct efx_channel *channel)
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{
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struct efx_nic *efx = channel->efx;
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channel->irq_moderation = 0;
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channel->irq_moderation_us = 0;
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channel->rx_queue.core_index = 0;
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return efx_ptp_probe(efx, channel);
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@ -34,19 +34,24 @@ static void siena_init_wol(struct efx_nic *efx);
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static void siena_push_irq_moderation(struct efx_channel *channel)
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{
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struct efx_nic *efx = channel->efx;
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efx_dword_t timer_cmd;
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if (channel->irq_moderation)
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if (channel->irq_moderation_us) {
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unsigned int ticks;
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ticks = efx_usecs_to_ticks(efx, channel->irq_moderation_us);
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EFX_POPULATE_DWORD_2(timer_cmd,
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FRF_CZ_TC_TIMER_MODE,
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FFE_CZ_TIMER_MODE_INT_HLDOFF,
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FRF_CZ_TC_TIMER_VAL,
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channel->irq_moderation - 1);
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else
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ticks - 1);
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} else {
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EFX_POPULATE_DWORD_2(timer_cmd,
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FRF_CZ_TC_TIMER_MODE,
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FFE_CZ_TIMER_MODE_DIS,
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FRF_CZ_TC_TIMER_VAL, 0);
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}
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efx_writed_page_locked(channel->efx, &timer_cmd, FR_BZ_TIMER_COMMAND_P0,
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channel->channel);
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}
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@ -50,4 +50,8 @@
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#define EFX_WORKAROUND_35388(efx) \
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(efx_nic_rev(efx) == EFX_REV_HUNT_A0 && EFX_EF10_WORKAROUND_35388(efx))
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/* Moderation timer access must go through MCDI */
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#define EFX_EF10_WORKAROUND_61265(efx) \
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(((struct efx_ef10_nic_data *)efx->nic_data)->workaround_61265)
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#endif /* EFX_WORKAROUNDS_H */
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