USB/PHY fixes for 4.14-rc6
Here are a small number of USB and PHY driver fixes for 4.14-rc6 There is the usual musb and xhci fixes in here, as well as some needed phy patches. Also is a nasty regression fix for usbfs that has started to hit a lot of people using virtual machines. All of these have been in linux-next with no reported problems. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> -----BEGIN PGP SIGNATURE----- iG0EABECAC0WIQT0tgzFv3jCIUoxPcsxR9QN2y37KQUCWe2XgA8cZ3JlZ0Brcm9h aC5jb20ACgkQMUfUDdst+ynFUwCeNkG6DErmFmdpRkz38rjqLDpK6kAAoIT14/S8 rmDxu0VfFBY2TWIPqyDA =7MDm -----END PGP SIGNATURE----- Merge tag 'usb-4.14-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb Pull USB/PHY fixes from Greg KH: "Here are a small number of USB and PHY driver fixes for 4.14-rc6 There is the usual musb and xhci fixes in here, as well as some needed phy patches. Also is a nasty regression fix for usbfs that has started to hit a lot of people using virtual machines. All of these have been in linux-next with no reported problems" * tag 'usb-4.14-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (26 commits) usb: hub: Allow reset retry for USB2 devices on connect bounce USB: core: fix out-of-bounds access bug in usb_get_bos_descriptor() MAINTAINERS: fix git tree url for musb module usb: quirks: add quirk for WORLDE MINI MIDI keyboard usb: musb: sunxi: Explicitly release USB PHY on exit usb: musb: Check for host-mode using is_host_active() on reset interrupt usb: musb: musb_cppi41: Configure the number of channels for DA8xx usb: musb: musb_cppi41: Fix cppi41_set_dma_mode() for DA8xx usb: musb: musb_cppi41: Fix the address of teardown and autoreq registers USB: musb: fix late external abort on suspend USB: musb: fix session-bit runtime-PM quirk usb: cdc_acm: Add quirk for Elatec TWN3 USB: devio: Revert "USB: devio: Don't corrupt user memory" usb: xhci: Handle error condition in xhci_stop_device() usb: xhci: Reset halted endpoint if trb is noop xhci: Cleanup current_cmd in xhci_cleanup_command_queue() xhci: Identify USB 3.1 capable hosts by their port protocol capability USB: serial: metro-usb: add MS7820 device id phy: rockchip-typec: Check for errors from tcphy_phy_init() phy: rockchip-typec: Don't set the aux voltage swing to 400 mV ...
This commit is contained in:
Linus Torvalds
commit
5805992184
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@ -9213,7 +9213,6 @@ F: include/linux/isicom.h
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MUSB MULTIPOINT HIGH SPEED DUAL-ROLE CONTROLLER
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M: Bin Liu <b-liu@ti.com>
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L: linux-usb@vger.kernel.org
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T: git git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb.git
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S: Maintained
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F: drivers/usb/musb/
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@ -111,6 +111,8 @@
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#define MVEBU_COMPHY_CONF6_40B BIT(18)
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#define MVEBU_COMPHY_SELECTOR 0x1140
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#define MVEBU_COMPHY_SELECTOR_PHY(n) ((n) * 0x4)
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#define MVEBU_COMPHY_PIPE_SELECTOR 0x1144
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#define MVEBU_COMPHY_PIPE_SELECTOR_PIPE(n) ((n) * 0x4)
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#define MVEBU_COMPHY_LANES 6
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#define MVEBU_COMPHY_PORTS 3
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@ -468,13 +470,17 @@ static int mvebu_comphy_power_on(struct phy *phy)
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{
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struct mvebu_comphy_lane *lane = phy_get_drvdata(phy);
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struct mvebu_comphy_priv *priv = lane->priv;
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int ret;
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u32 mux, val;
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int ret, mux;
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u32 val;
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mux = mvebu_comphy_get_mux(lane->id, lane->port, lane->mode);
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if (mux < 0)
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return -ENOTSUPP;
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regmap_read(priv->regmap, MVEBU_COMPHY_PIPE_SELECTOR, &val);
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val &= ~(0xf << MVEBU_COMPHY_PIPE_SELECTOR_PIPE(lane->id));
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regmap_write(priv->regmap, MVEBU_COMPHY_PIPE_SELECTOR, val);
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regmap_read(priv->regmap, MVEBU_COMPHY_SELECTOR, &val);
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val &= ~(0xf << MVEBU_COMPHY_SELECTOR_PHY(lane->id));
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val |= mux << MVEBU_COMPHY_SELECTOR_PHY(lane->id);
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@ -526,6 +532,10 @@ static int mvebu_comphy_power_off(struct phy *phy)
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val &= ~(0xf << MVEBU_COMPHY_SELECTOR_PHY(lane->id));
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regmap_write(priv->regmap, MVEBU_COMPHY_SELECTOR, val);
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regmap_read(priv->regmap, MVEBU_COMPHY_PIPE_SELECTOR, &val);
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val &= ~(0xf << MVEBU_COMPHY_PIPE_SELECTOR_PIPE(lane->id));
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regmap_write(priv->regmap, MVEBU_COMPHY_PIPE_SELECTOR, val);
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return 0;
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}
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@ -576,8 +586,8 @@ static int mvebu_comphy_probe(struct platform_device *pdev)
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return PTR_ERR(priv->regmap);
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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priv->base = devm_ioremap_resource(&pdev->dev, res);
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if (!priv->base)
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return -ENOMEM;
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if (IS_ERR(priv->base))
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return PTR_ERR(priv->base);
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for_each_available_child_of_node(pdev->dev.of_node, child) {
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struct mvebu_comphy_lane *lane;
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@ -27,6 +27,7 @@
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/* banks shared by multiple phys */
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#define SSUSB_SIFSLV_V1_SPLLC 0x000 /* shared by u3 phys */
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#define SSUSB_SIFSLV_V1_U2FREQ 0x100 /* shared by u2 phys */
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#define SSUSB_SIFSLV_V1_CHIP 0x300 /* shared by u3 phys */
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/* u2 phy bank */
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#define SSUSB_SIFSLV_V1_U2PHY_COM 0x000
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/* u3/pcie/sata phy banks */
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@ -762,7 +763,7 @@ static void phy_v1_banks_init(struct mtk_tphy *tphy,
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case PHY_TYPE_USB3:
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case PHY_TYPE_PCIE:
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u3_banks->spllc = tphy->sif_base + SSUSB_SIFSLV_V1_SPLLC;
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u3_banks->chip = NULL;
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u3_banks->chip = tphy->sif_base + SSUSB_SIFSLV_V1_CHIP;
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u3_banks->phyd = instance->port_base + SSUSB_SIFSLV_V1_U3PHYD;
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u3_banks->phya = instance->port_base + SSUSB_SIFSLV_V1_U3PHYA;
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break;
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@ -443,14 +443,34 @@ static inline int property_enable(struct rockchip_typec_phy *tcphy,
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return regmap_write(tcphy->grf_regs, reg->offset, val | mask);
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}
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static void tcphy_dp_aux_set_flip(struct rockchip_typec_phy *tcphy)
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{
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u16 tx_ana_ctrl_reg_1;
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/*
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* Select the polarity of the xcvr:
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* 1, Reverses the polarity (If TYPEC, Pulls ups aux_p and pull
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* down aux_m)
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* 0, Normal polarity (if TYPEC, pulls up aux_m and pulls down
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* aux_p)
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*/
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tx_ana_ctrl_reg_1 = readl(tcphy->base + TX_ANA_CTRL_REG_1);
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if (!tcphy->flip)
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tx_ana_ctrl_reg_1 |= BIT(12);
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else
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tx_ana_ctrl_reg_1 &= ~BIT(12);
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writel(tx_ana_ctrl_reg_1, tcphy->base + TX_ANA_CTRL_REG_1);
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}
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static void tcphy_dp_aux_calibration(struct rockchip_typec_phy *tcphy)
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{
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u16 tx_ana_ctrl_reg_1;
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u16 rdata, rdata2, val;
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/* disable txda_cal_latch_en for rewrite the calibration values */
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rdata = readl(tcphy->base + TX_ANA_CTRL_REG_1);
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val = rdata & 0xdfff;
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writel(val, tcphy->base + TX_ANA_CTRL_REG_1);
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tx_ana_ctrl_reg_1 = readl(tcphy->base + TX_ANA_CTRL_REG_1);
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tx_ana_ctrl_reg_1 &= ~BIT(13);
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writel(tx_ana_ctrl_reg_1, tcphy->base + TX_ANA_CTRL_REG_1);
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/*
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* read a resistor calibration code from CMN_TXPUCAL_CTRL[6:0] and
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@ -472,9 +492,8 @@ static void tcphy_dp_aux_calibration(struct rockchip_typec_phy *tcphy)
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* Activate this signal for 1 clock cycle to sample new calibration
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* values.
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*/
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rdata = readl(tcphy->base + TX_ANA_CTRL_REG_1);
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val = rdata | 0x2000;
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writel(val, tcphy->base + TX_ANA_CTRL_REG_1);
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tx_ana_ctrl_reg_1 |= BIT(13);
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writel(tx_ana_ctrl_reg_1, tcphy->base + TX_ANA_CTRL_REG_1);
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usleep_range(150, 200);
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/* set TX Voltage Level and TX Deemphasis to 0 */
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@ -482,8 +501,10 @@ static void tcphy_dp_aux_calibration(struct rockchip_typec_phy *tcphy)
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/* re-enable decap */
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writel(0x100, tcphy->base + TX_ANA_CTRL_REG_2);
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writel(0x300, tcphy->base + TX_ANA_CTRL_REG_2);
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writel(0x2008, tcphy->base + TX_ANA_CTRL_REG_1);
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writel(0x2018, tcphy->base + TX_ANA_CTRL_REG_1);
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tx_ana_ctrl_reg_1 |= BIT(3);
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writel(tx_ana_ctrl_reg_1, tcphy->base + TX_ANA_CTRL_REG_1);
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tx_ana_ctrl_reg_1 |= BIT(4);
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writel(tx_ana_ctrl_reg_1, tcphy->base + TX_ANA_CTRL_REG_1);
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writel(0, tcphy->base + TX_ANA_CTRL_REG_5);
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@ -494,8 +515,10 @@ static void tcphy_dp_aux_calibration(struct rockchip_typec_phy *tcphy)
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writel(0x1001, tcphy->base + TX_ANA_CTRL_REG_4);
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/* re-enables Bandgap reference for LDO */
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writel(0x2098, tcphy->base + TX_ANA_CTRL_REG_1);
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writel(0x2198, tcphy->base + TX_ANA_CTRL_REG_1);
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tx_ana_ctrl_reg_1 |= BIT(7);
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writel(tx_ana_ctrl_reg_1, tcphy->base + TX_ANA_CTRL_REG_1);
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tx_ana_ctrl_reg_1 |= BIT(8);
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writel(tx_ana_ctrl_reg_1, tcphy->base + TX_ANA_CTRL_REG_1);
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/*
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* re-enables the transmitter pre-driver, driver data selection MUX,
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@ -505,27 +528,26 @@ static void tcphy_dp_aux_calibration(struct rockchip_typec_phy *tcphy)
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writel(0x303, tcphy->base + TX_ANA_CTRL_REG_2);
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/*
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* BIT 12: Controls auxda_polarity, which selects the polarity of the
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* xcvr:
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* 1, Reverses the polarity (If TYPEC, Pulls ups aux_p and pull
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* down aux_m)
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* 0, Normal polarity (if TYPE_C, pulls up aux_m and pulls down
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* aux_p)
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* Do some magic undocumented stuff, some of which appears to
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* undo the "re-enables Bandgap reference for LDO" above.
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*/
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val = 0xa078;
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if (!tcphy->flip)
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val |= BIT(12);
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writel(val, tcphy->base + TX_ANA_CTRL_REG_1);
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tx_ana_ctrl_reg_1 |= BIT(15);
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tx_ana_ctrl_reg_1 &= ~BIT(8);
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tx_ana_ctrl_reg_1 &= ~BIT(7);
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tx_ana_ctrl_reg_1 |= BIT(6);
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tx_ana_ctrl_reg_1 |= BIT(5);
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writel(tx_ana_ctrl_reg_1, tcphy->base + TX_ANA_CTRL_REG_1);
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writel(0, tcphy->base + TX_ANA_CTRL_REG_3);
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writel(0, tcphy->base + TX_ANA_CTRL_REG_4);
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writel(0, tcphy->base + TX_ANA_CTRL_REG_5);
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/*
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* Controls low_power_swing_en, set the voltage swing of the driver
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* to 400mv. The values below are peak to peak (differential) values.
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* Controls low_power_swing_en, don't set the voltage swing of the
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* driver to 400mv. The values below are peak to peak (differential)
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* values.
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*/
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writel(4, tcphy->base + TXDA_COEFF_CALC_CTRL);
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writel(0, tcphy->base + TXDA_COEFF_CALC_CTRL);
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writel(0, tcphy->base + TXDA_CYA_AUXDA_CYA);
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/* Controls tx_high_z_tm_en */
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@ -555,6 +577,7 @@ static int tcphy_phy_init(struct rockchip_typec_phy *tcphy, u8 mode)
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reset_control_deassert(tcphy->tcphy_rst);
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property_enable(tcphy, &cfg->typec_conn_dir, tcphy->flip);
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tcphy_dp_aux_set_flip(tcphy);
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tcphy_cfg_24m(tcphy);
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@ -685,8 +708,11 @@ static int rockchip_usb3_phy_power_on(struct phy *phy)
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if (tcphy->mode == new_mode)
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goto unlock_ret;
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if (tcphy->mode == MODE_DISCONNECT)
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tcphy_phy_init(tcphy, new_mode);
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if (tcphy->mode == MODE_DISCONNECT) {
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ret = tcphy_phy_init(tcphy, new_mode);
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if (ret)
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goto unlock_ret;
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}
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/* wait TCPHY for pipe ready */
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for (timeout = 0; timeout < 100; timeout++) {
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@ -760,10 +786,12 @@ static int rockchip_dp_phy_power_on(struct phy *phy)
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*/
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if (new_mode == MODE_DFP_DP && tcphy->mode != MODE_DISCONNECT) {
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tcphy_phy_deinit(tcphy);
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tcphy_phy_init(tcphy, new_mode);
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ret = tcphy_phy_init(tcphy, new_mode);
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} else if (tcphy->mode == MODE_DISCONNECT) {
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tcphy_phy_init(tcphy, new_mode);
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ret = tcphy_phy_init(tcphy, new_mode);
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}
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if (ret)
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goto unlock_ret;
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ret = readx_poll_timeout(readl, tcphy->base + DP_MODE_CTL,
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val, val & DP_MODE_A2, 1000,
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|
|
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|||
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@ -454,6 +454,8 @@ tegra_xusb_find_port_node(struct tegra_xusb_padctl *padctl, const char *type,
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char *name;
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||||
name = kasprintf(GFP_KERNEL, "%s-%u", type, index);
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if (!name)
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return ERR_PTR(-ENOMEM);
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np = of_find_node_by_name(np, name);
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||||
kfree(name);
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||||
}
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|
|
|
|||
|
|
@ -1832,6 +1832,9 @@ static const struct usb_device_id acm_ids[] = {
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|||
{ USB_DEVICE(0xfff0, 0x0100), /* DATECS FP-2000 */
|
||||
.driver_info = NO_UNION_NORMAL, /* reports zero length descriptor */
|
||||
},
|
||||
{ USB_DEVICE(0x09d8, 0x0320), /* Elatec GmbH TWN3 */
|
||||
.driver_info = NO_UNION_NORMAL, /* has misplaced union descriptor */
|
||||
},
|
||||
|
||||
{ USB_DEVICE(0x2912, 0x0001), /* ATOL FPrint */
|
||||
.driver_info = CLEAR_HALT_CONDITIONS,
|
||||
|
|
|
|||
|
|
@ -960,10 +960,12 @@ int usb_get_bos_descriptor(struct usb_device *dev)
|
|||
for (i = 0; i < num; i++) {
|
||||
buffer += length;
|
||||
cap = (struct usb_dev_cap_header *)buffer;
|
||||
length = cap->bLength;
|
||||
|
||||
if (total_len < length)
|
||||
if (total_len < sizeof(*cap) || total_len < cap->bLength) {
|
||||
dev->bos->desc->bNumDeviceCaps = i;
|
||||
break;
|
||||
}
|
||||
length = cap->bLength;
|
||||
total_len -= length;
|
||||
|
||||
if (cap->bDescriptorType != USB_DT_DEVICE_CAPABILITY) {
|
||||
|
|
|
|||
|
|
@ -1576,11 +1576,7 @@ static int proc_do_submiturb(struct usb_dev_state *ps, struct usbdevfs_urb *uurb
|
|||
totlen += isopkt[u].length;
|
||||
}
|
||||
u *= sizeof(struct usb_iso_packet_descriptor);
|
||||
if (totlen <= uurb->buffer_length)
|
||||
uurb->buffer_length = totlen;
|
||||
else
|
||||
WARN_ONCE(1, "uurb->buffer_length is too short %d vs %d",
|
||||
totlen, uurb->buffer_length);
|
||||
break;
|
||||
|
||||
default:
|
||||
|
|
|
|||
|
|
@ -2710,13 +2710,16 @@ static int hub_port_wait_reset(struct usb_hub *hub, int port1,
|
|||
if (!(portstatus & USB_PORT_STAT_CONNECTION))
|
||||
return -ENOTCONN;
|
||||
|
||||
/* bomb out completely if the connection bounced. A USB 3.0
|
||||
* connection may bounce if multiple warm resets were issued,
|
||||
/* Retry if connect change is set but status is still connected.
|
||||
* A USB 3.0 connection may bounce if multiple warm resets were issued,
|
||||
* but the device may have successfully re-connected. Ignore it.
|
||||
*/
|
||||
if (!hub_is_superspeed(hub->hdev) &&
|
||||
(portchange & USB_PORT_STAT_C_CONNECTION))
|
||||
return -ENOTCONN;
|
||||
(portchange & USB_PORT_STAT_C_CONNECTION)) {
|
||||
usb_clear_port_feature(hub->hdev, port1,
|
||||
USB_PORT_FEAT_C_CONNECTION);
|
||||
return -EAGAIN;
|
||||
}
|
||||
|
||||
if (!(portstatus & USB_PORT_STAT_ENABLE))
|
||||
return -EBUSY;
|
||||
|
|
|
|||
|
|
@ -221,6 +221,10 @@ static const struct usb_device_id usb_quirk_list[] = {
|
|||
/* Corsair Strafe RGB */
|
||||
{ USB_DEVICE(0x1b1c, 0x1b20), .driver_info = USB_QUIRK_DELAY_INIT },
|
||||
|
||||
/* MIDI keyboard WORLDE MINI */
|
||||
{ USB_DEVICE(0x1c75, 0x0204), .driver_info =
|
||||
USB_QUIRK_CONFIG_INTF_STRINGS },
|
||||
|
||||
/* Acer C120 LED Projector */
|
||||
{ USB_DEVICE(0x1de1, 0xc102), .driver_info = USB_QUIRK_NO_LPM },
|
||||
|
||||
|
|
|
|||
|
|
@ -420,14 +420,25 @@ static int xhci_stop_device(struct xhci_hcd *xhci, int slot_id, int suspend)
|
|||
GFP_NOWAIT);
|
||||
if (!command) {
|
||||
spin_unlock_irqrestore(&xhci->lock, flags);
|
||||
xhci_free_command(xhci, cmd);
|
||||
return -ENOMEM;
|
||||
ret = -ENOMEM;
|
||||
goto cmd_cleanup;
|
||||
}
|
||||
xhci_queue_stop_endpoint(xhci, command, slot_id, i,
|
||||
suspend);
|
||||
|
||||
ret = xhci_queue_stop_endpoint(xhci, command, slot_id,
|
||||
i, suspend);
|
||||
if (ret) {
|
||||
spin_unlock_irqrestore(&xhci->lock, flags);
|
||||
xhci_free_command(xhci, command);
|
||||
goto cmd_cleanup;
|
||||
}
|
||||
}
|
||||
xhci_queue_stop_endpoint(xhci, cmd, slot_id, 0, suspend);
|
||||
}
|
||||
ret = xhci_queue_stop_endpoint(xhci, cmd, slot_id, 0, suspend);
|
||||
if (ret) {
|
||||
spin_unlock_irqrestore(&xhci->lock, flags);
|
||||
goto cmd_cleanup;
|
||||
}
|
||||
|
||||
xhci_ring_cmd_db(xhci);
|
||||
spin_unlock_irqrestore(&xhci->lock, flags);
|
||||
|
||||
|
|
@ -439,6 +450,8 @@ static int xhci_stop_device(struct xhci_hcd *xhci, int slot_id, int suspend)
|
|||
xhci_warn(xhci, "Timeout while waiting for stop endpoint command\n");
|
||||
ret = -ETIME;
|
||||
}
|
||||
|
||||
cmd_cleanup:
|
||||
xhci_free_command(xhci, cmd);
|
||||
return ret;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1309,6 +1309,7 @@ static void xhci_complete_del_and_free_cmd(struct xhci_command *cmd, u32 status)
|
|||
void xhci_cleanup_command_queue(struct xhci_hcd *xhci)
|
||||
{
|
||||
struct xhci_command *cur_cmd, *tmp_cmd;
|
||||
xhci->current_cmd = NULL;
|
||||
list_for_each_entry_safe(cur_cmd, tmp_cmd, &xhci->cmd_list, cmd_list)
|
||||
xhci_complete_del_and_free_cmd(cur_cmd, COMP_COMMAND_ABORTED);
|
||||
}
|
||||
|
|
@ -2579,15 +2580,21 @@ static int handle_tx_event(struct xhci_hcd *xhci,
|
|||
(struct xhci_generic_trb *) ep_trb);
|
||||
|
||||
/*
|
||||
* No-op TRB should not trigger interrupts.
|
||||
* If ep_trb is a no-op TRB, it means the
|
||||
* corresponding TD has been cancelled. Just ignore
|
||||
* the TD.
|
||||
* No-op TRB could trigger interrupts in a case where
|
||||
* a URB was killed and a STALL_ERROR happens right
|
||||
* after the endpoint ring stopped. Reset the halted
|
||||
* endpoint. Otherwise, the endpoint remains stalled
|
||||
* indefinitely.
|
||||
*/
|
||||
if (trb_is_noop(ep_trb)) {
|
||||
xhci_dbg(xhci,
|
||||
"ep_trb is a no-op TRB. Skip it for slot %u ep %u\n",
|
||||
slot_id, ep_index);
|
||||
if (trb_comp_code == COMP_STALL_ERROR ||
|
||||
xhci_requires_manual_halt_cleanup(xhci, ep_ctx,
|
||||
trb_comp_code))
|
||||
xhci_cleanup_halted_endpoint(xhci, slot_id,
|
||||
ep_index,
|
||||
ep_ring->stream_id,
|
||||
td, ep_trb,
|
||||
EP_HARD_RESET);
|
||||
goto cleanup;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -4805,7 +4805,8 @@ int xhci_gen_setup(struct usb_hcd *hcd, xhci_get_quirks_t get_quirks)
|
|||
*/
|
||||
hcd->has_tt = 1;
|
||||
} else {
|
||||
if (xhci->sbrn == 0x31) {
|
||||
/* Some 3.1 hosts return sbrn 0x30, can't rely on sbrn alone */
|
||||
if (xhci->sbrn == 0x31 || xhci->usb3_rhub.min_rev >= 1) {
|
||||
xhci_info(xhci, "Host supports USB 3.1 Enhanced SuperSpeed\n");
|
||||
hcd->speed = HCD_USB31;
|
||||
hcd->self.root_hub->speed = USB_SPEED_SUPER_PLUS;
|
||||
|
|
|
|||
|
|
@ -906,7 +906,7 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
|
|||
*/
|
||||
if (int_usb & MUSB_INTR_RESET) {
|
||||
handled = IRQ_HANDLED;
|
||||
if (devctl & MUSB_DEVCTL_HM) {
|
||||
if (is_host_active(musb)) {
|
||||
/*
|
||||
* When BABBLE happens what we can depends on which
|
||||
* platform MUSB is running, because some platforms
|
||||
|
|
@ -916,8 +916,6 @@ static irqreturn_t musb_stage0_irq(struct musb *musb, u8 int_usb,
|
|||
* drop the session.
|
||||
*/
|
||||
dev_err(musb->controller, "Babble\n");
|
||||
|
||||
if (is_host_active(musb))
|
||||
musb_recover_from_babble(musb);
|
||||
} else {
|
||||
musb_dbg(musb, "BUS RESET as %s",
|
||||
|
|
@ -1861,22 +1859,22 @@ static void musb_pm_runtime_check_session(struct musb *musb)
|
|||
MUSB_DEVCTL_HR;
|
||||
switch (devctl & ~s) {
|
||||
case MUSB_QUIRK_B_INVALID_VBUS_91:
|
||||
if (musb->quirk_retries--) {
|
||||
if (musb->quirk_retries && !musb->flush_irq_work) {
|
||||
musb_dbg(musb,
|
||||
"Poll devctl on invalid vbus, assume no session");
|
||||
schedule_delayed_work(&musb->irq_work,
|
||||
msecs_to_jiffies(1000));
|
||||
|
||||
musb->quirk_retries--;
|
||||
return;
|
||||
}
|
||||
/* fall through */
|
||||
case MUSB_QUIRK_A_DISCONNECT_19:
|
||||
if (musb->quirk_retries--) {
|
||||
if (musb->quirk_retries && !musb->flush_irq_work) {
|
||||
musb_dbg(musb,
|
||||
"Poll devctl on possible host mode disconnect");
|
||||
schedule_delayed_work(&musb->irq_work,
|
||||
msecs_to_jiffies(1000));
|
||||
|
||||
musb->quirk_retries--;
|
||||
return;
|
||||
}
|
||||
if (!musb->session)
|
||||
|
|
@ -2681,8 +2679,15 @@ static int musb_suspend(struct device *dev)
|
|||
|
||||
musb_platform_disable(musb);
|
||||
musb_disable_interrupts(musb);
|
||||
|
||||
musb->flush_irq_work = true;
|
||||
while (flush_delayed_work(&musb->irq_work))
|
||||
;
|
||||
musb->flush_irq_work = false;
|
||||
|
||||
if (!(musb->io.quirks & MUSB_PRESERVE_SESSION))
|
||||
musb_writeb(musb->mregs, MUSB_DEVCTL, 0);
|
||||
|
||||
WARN_ON(!list_empty(&musb->pending_list));
|
||||
|
||||
spin_lock_irqsave(&musb->lock, flags);
|
||||
|
|
|
|||
|
|
@ -428,6 +428,8 @@ struct musb {
|
|||
unsigned test_mode:1;
|
||||
unsigned softconnect:1;
|
||||
|
||||
unsigned flush_irq_work:1;
|
||||
|
||||
u8 address;
|
||||
u8 test_mode_nr;
|
||||
u16 ackpend; /* ep0 */
|
||||
|
|
|
|||
|
|
@ -26,15 +26,28 @@
|
|||
|
||||
#define MUSB_DMA_NUM_CHANNELS 15
|
||||
|
||||
#define DA8XX_USB_MODE 0x10
|
||||
#define DA8XX_USB_AUTOREQ 0x14
|
||||
#define DA8XX_USB_TEARDOWN 0x1c
|
||||
|
||||
#define DA8XX_DMA_NUM_CHANNELS 4
|
||||
|
||||
struct cppi41_dma_controller {
|
||||
struct dma_controller controller;
|
||||
struct cppi41_dma_channel rx_channel[MUSB_DMA_NUM_CHANNELS];
|
||||
struct cppi41_dma_channel tx_channel[MUSB_DMA_NUM_CHANNELS];
|
||||
struct cppi41_dma_channel *rx_channel;
|
||||
struct cppi41_dma_channel *tx_channel;
|
||||
struct hrtimer early_tx;
|
||||
struct list_head early_tx_list;
|
||||
u32 rx_mode;
|
||||
u32 tx_mode;
|
||||
u32 auto_req;
|
||||
|
||||
u32 tdown_reg;
|
||||
u32 autoreq_reg;
|
||||
|
||||
void (*set_dma_mode)(struct cppi41_dma_channel *cppi41_channel,
|
||||
unsigned int mode);
|
||||
u8 num_channels;
|
||||
};
|
||||
|
||||
static void save_rx_toggle(struct cppi41_dma_channel *cppi41_channel)
|
||||
|
|
@ -349,6 +362,32 @@ static void cppi41_set_dma_mode(struct cppi41_dma_channel *cppi41_channel,
|
|||
}
|
||||
}
|
||||
|
||||
static void da8xx_set_dma_mode(struct cppi41_dma_channel *cppi41_channel,
|
||||
unsigned int mode)
|
||||
{
|
||||
struct cppi41_dma_controller *controller = cppi41_channel->controller;
|
||||
struct musb *musb = controller->controller.musb;
|
||||
unsigned int shift;
|
||||
u32 port;
|
||||
u32 new_mode;
|
||||
u32 old_mode;
|
||||
|
||||
old_mode = controller->tx_mode;
|
||||
port = cppi41_channel->port_num;
|
||||
|
||||
shift = (port - 1) * 4;
|
||||
if (!cppi41_channel->is_tx)
|
||||
shift += 16;
|
||||
new_mode = old_mode & ~(3 << shift);
|
||||
new_mode |= mode << shift;
|
||||
|
||||
if (new_mode == old_mode)
|
||||
return;
|
||||
controller->tx_mode = new_mode;
|
||||
musb_writel(musb->ctrl_base, DA8XX_USB_MODE, new_mode);
|
||||
}
|
||||
|
||||
|
||||
static void cppi41_set_autoreq_mode(struct cppi41_dma_channel *cppi41_channel,
|
||||
unsigned mode)
|
||||
{
|
||||
|
|
@ -364,8 +403,8 @@ static void cppi41_set_autoreq_mode(struct cppi41_dma_channel *cppi41_channel,
|
|||
if (new_mode == old_mode)
|
||||
return;
|
||||
controller->auto_req = new_mode;
|
||||
musb_writel(controller->controller.musb->ctrl_base, USB_CTRL_AUTOREQ,
|
||||
new_mode);
|
||||
musb_writel(controller->controller.musb->ctrl_base,
|
||||
controller->autoreq_reg, new_mode);
|
||||
}
|
||||
|
||||
static bool cppi41_configure_channel(struct dma_channel *channel,
|
||||
|
|
@ -373,6 +412,7 @@ static bool cppi41_configure_channel(struct dma_channel *channel,
|
|||
dma_addr_t dma_addr, u32 len)
|
||||
{
|
||||
struct cppi41_dma_channel *cppi41_channel = channel->private_data;
|
||||
struct cppi41_dma_controller *controller = cppi41_channel->controller;
|
||||
struct dma_chan *dc = cppi41_channel->dc;
|
||||
struct dma_async_tx_descriptor *dma_desc;
|
||||
enum dma_transfer_direction direction;
|
||||
|
|
@ -398,7 +438,7 @@ static bool cppi41_configure_channel(struct dma_channel *channel,
|
|||
musb_writel(musb->ctrl_base,
|
||||
RNDIS_REG(cppi41_channel->port_num), len);
|
||||
/* gen rndis */
|
||||
cppi41_set_dma_mode(cppi41_channel,
|
||||
controller->set_dma_mode(cppi41_channel,
|
||||
EP_MODE_DMA_GEN_RNDIS);
|
||||
|
||||
/* auto req */
|
||||
|
|
@ -407,14 +447,15 @@ static bool cppi41_configure_channel(struct dma_channel *channel,
|
|||
} else {
|
||||
musb_writel(musb->ctrl_base,
|
||||
RNDIS_REG(cppi41_channel->port_num), 0);
|
||||
cppi41_set_dma_mode(cppi41_channel,
|
||||
controller->set_dma_mode(cppi41_channel,
|
||||
EP_MODE_DMA_TRANSPARENT);
|
||||
cppi41_set_autoreq_mode(cppi41_channel,
|
||||
EP_MODE_AUTOREQ_NONE);
|
||||
}
|
||||
} else {
|
||||
/* fallback mode */
|
||||
cppi41_set_dma_mode(cppi41_channel, EP_MODE_DMA_TRANSPARENT);
|
||||
controller->set_dma_mode(cppi41_channel,
|
||||
EP_MODE_DMA_TRANSPARENT);
|
||||
cppi41_set_autoreq_mode(cppi41_channel, EP_MODE_AUTOREQ_NONE);
|
||||
len = min_t(u32, packet_sz, len);
|
||||
}
|
||||
|
|
@ -445,7 +486,7 @@ static struct dma_channel *cppi41_dma_channel_allocate(struct dma_controller *c,
|
|||
struct cppi41_dma_channel *cppi41_channel = NULL;
|
||||
u8 ch_num = hw_ep->epnum - 1;
|
||||
|
||||
if (ch_num >= MUSB_DMA_NUM_CHANNELS)
|
||||
if (ch_num >= controller->num_channels)
|
||||
return NULL;
|
||||
|
||||
if (is_tx)
|
||||
|
|
@ -581,12 +622,13 @@ static int cppi41_dma_channel_abort(struct dma_channel *channel)
|
|||
|
||||
do {
|
||||
if (is_tx)
|
||||
musb_writel(musb->ctrl_base, USB_TDOWN, tdbit);
|
||||
musb_writel(musb->ctrl_base, controller->tdown_reg,
|
||||
tdbit);
|
||||
ret = dmaengine_terminate_all(cppi41_channel->dc);
|
||||
} while (ret == -EAGAIN);
|
||||
|
||||
if (is_tx) {
|
||||
musb_writel(musb->ctrl_base, USB_TDOWN, tdbit);
|
||||
musb_writel(musb->ctrl_base, controller->tdown_reg, tdbit);
|
||||
|
||||
csr = musb_readw(epio, MUSB_TXCSR);
|
||||
if (csr & MUSB_TXCSR_TXPKTRDY) {
|
||||
|
|
@ -604,7 +646,7 @@ static void cppi41_release_all_dma_chans(struct cppi41_dma_controller *ctrl)
|
|||
struct dma_chan *dc;
|
||||
int i;
|
||||
|
||||
for (i = 0; i < MUSB_DMA_NUM_CHANNELS; i++) {
|
||||
for (i = 0; i < ctrl->num_channels; i++) {
|
||||
dc = ctrl->tx_channel[i].dc;
|
||||
if (dc)
|
||||
dma_release_channel(dc);
|
||||
|
|
@ -656,7 +698,7 @@ static int cppi41_dma_controller_start(struct cppi41_dma_controller *controller)
|
|||
goto err;
|
||||
|
||||
ret = -EINVAL;
|
||||
if (port > MUSB_DMA_NUM_CHANNELS || !port)
|
||||
if (port > controller->num_channels || !port)
|
||||
goto err;
|
||||
if (is_tx)
|
||||
cppi41_channel = &controller->tx_channel[port - 1];
|
||||
|
|
@ -697,6 +739,8 @@ void cppi41_dma_controller_destroy(struct dma_controller *c)
|
|||
|
||||
hrtimer_cancel(&controller->early_tx);
|
||||
cppi41_dma_controller_stop(controller);
|
||||
kfree(controller->rx_channel);
|
||||
kfree(controller->tx_channel);
|
||||
kfree(controller);
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(cppi41_dma_controller_destroy);
|
||||
|
|
@ -705,6 +749,7 @@ struct dma_controller *
|
|||
cppi41_dma_controller_create(struct musb *musb, void __iomem *base)
|
||||
{
|
||||
struct cppi41_dma_controller *controller;
|
||||
int channel_size;
|
||||
int ret = 0;
|
||||
|
||||
if (!musb->controller->parent->of_node) {
|
||||
|
|
@ -727,12 +772,37 @@ cppi41_dma_controller_create(struct musb *musb, void __iomem *base)
|
|||
controller->controller.is_compatible = cppi41_is_compatible;
|
||||
controller->controller.musb = musb;
|
||||
|
||||
if (musb->io.quirks & MUSB_DA8XX) {
|
||||
controller->tdown_reg = DA8XX_USB_TEARDOWN;
|
||||
controller->autoreq_reg = DA8XX_USB_AUTOREQ;
|
||||
controller->set_dma_mode = da8xx_set_dma_mode;
|
||||
controller->num_channels = DA8XX_DMA_NUM_CHANNELS;
|
||||
} else {
|
||||
controller->tdown_reg = USB_TDOWN;
|
||||
controller->autoreq_reg = USB_CTRL_AUTOREQ;
|
||||
controller->set_dma_mode = cppi41_set_dma_mode;
|
||||
controller->num_channels = MUSB_DMA_NUM_CHANNELS;
|
||||
}
|
||||
|
||||
channel_size = controller->num_channels *
|
||||
sizeof(struct cppi41_dma_channel);
|
||||
controller->rx_channel = kzalloc(channel_size, GFP_KERNEL);
|
||||
if (!controller->rx_channel)
|
||||
goto rx_channel_alloc_fail;
|
||||
controller->tx_channel = kzalloc(channel_size, GFP_KERNEL);
|
||||
if (!controller->tx_channel)
|
||||
goto tx_channel_alloc_fail;
|
||||
|
||||
ret = cppi41_dma_controller_start(controller);
|
||||
if (ret)
|
||||
goto plat_get_fail;
|
||||
return &controller->controller;
|
||||
|
||||
plat_get_fail:
|
||||
kfree(controller->tx_channel);
|
||||
tx_channel_alloc_fail:
|
||||
kfree(controller->rx_channel);
|
||||
rx_channel_alloc_fail:
|
||||
kfree(controller);
|
||||
kzalloc_fail:
|
||||
if (ret == -EPROBE_DEFER)
|
||||
|
|
|
|||
|
|
@ -297,6 +297,8 @@ static int sunxi_musb_exit(struct musb *musb)
|
|||
if (test_bit(SUNXI_MUSB_FL_HAS_SRAM, &glue->flags))
|
||||
sunxi_sram_release(musb->controller->parent);
|
||||
|
||||
devm_usb_put_phy(glue->dev, glue->xceiv);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -45,6 +45,7 @@ struct metrousb_private {
|
|||
static const struct usb_device_id id_table[] = {
|
||||
{ USB_DEVICE(FOCUS_VENDOR_ID, FOCUS_PRODUCT_ID_BI) },
|
||||
{ USB_DEVICE(FOCUS_VENDOR_ID, FOCUS_PRODUCT_ID_UNI) },
|
||||
{ USB_DEVICE_INTERFACE_CLASS(0x0c2e, 0x0730, 0xff) }, /* MS7820 */
|
||||
{ }, /* Terminating entry. */
|
||||
};
|
||||
MODULE_DEVICE_TABLE(usb, id_table);
|
||||
|
|
|
|||
Loading…
Reference in New Issue