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ARM: mach-bcm dt updates for 3.15 

- add BCM4708 dt support
 - remove bcm11351-brt
 - bcm281xx common clock support
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Merge tag 'armsoc/for-3.15/dt' of git://github.com/broadcom/mach-bcm into next/dt

Merge "ARM: mach-bcm dt updates for 3.15" from Matt Porter:

- add BCM4708 dt support
- remove bcm11351-brt
- bcm281xx common clock support

* tag 'armsoc/for-3.15/dt' of git://github.com/broadcom/mach-bcm:
  ARM: dts: remove bcm11351-brt.dts
  ARM: dts: Leave sdio1 as disabled on bcm28155-ap
  ARM: dts: bcm281xx: define real clocks
  ARM: BCM5301X: add dts files for BCM4708 SoC

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2014-03-11 13:23:09 -07:00
parent 6e4b9bfd62 a33705ee8a
commit 59bb376f0e
7 changed files with 327 additions and 134 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
arch/arm/boot/dts/Makefile
View File

@ -47,9 +47,9 @@ dtb-$(CONFIG_ARCH_AT91) += sama5d36ek.dtb
dtb-$(CONFIG_ARCH_ATLAS6) += atlas6-evb.dtb
dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb
dtb-$(CONFIG_ARCH_BCM_MOBILE) += bcm11351-brt.dtb \
bcm28155-ap.dtb
dtb-$(CONFIG_ARCH_BCM_MOBILE) += bcm28155-ap.dtb
dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-b.dtb
dtb-$(CONFIG_ARCH_BCM_5301X) += bcm4708-netgear-r6250.dtb
dtb-$(CONFIG_ARCH_BERLIN) += \
berlin2-sony-nsz-gs7.dtb \
berlin2cd-google-chromecast.dtb

54
arch/arm/boot/dts/bcm11351-brt.dts
View File

@ -1,54 +0,0 @@
/*
* Copyright (C) 2012 Broadcom Corporation
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation version 2.
*
* This program is distributed "as is" WITHOUT ANY WARRANTY of any
* kind, whether express or implied; without even the implied warranty
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
/dts-v1/;
#include "bcm11351.dtsi"
/ {
model = "BCM11351 BRT board";
compatible = "brcm,bcm11351-brt", "brcm,bcm11351";
memory {
reg = <0x80000000 0x40000000>; /* 1 GB */
};
uart@3e000000 {
status = "okay";
};
sdio1: sdio@3f180000 {
max-frequency = <48000000>;
status = "okay";
};
sdio2: sdio@3f190000 {
non-removable;
max-frequency = <48000000>;
status = "okay";
};
sdio4: sdio@3f1b0000 {
max-frequency = <48000000>;
cd-gpios = <&gpio 14 0>;
status = "okay";
};
usbotg: usb@3f120000 {
status = "okay";
};
usbphy: usb-phy@3f130000 {
status = "okay";
};
};

234
arch/arm/boot/dts/bcm11351.dtsi
View File

@ -14,6 +14,8 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include "dt-bindings/clock/bcm281xx.h"
#include "skeleton.dtsi"
/ {
@ -43,7 +45,7 @@ uart@3e000000 {
compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
status = "disabled";
reg = <0x3e000000 0x1000>;
clocks = <&uartb_clk>;
clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB>;
interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
@ -53,7 +55,7 @@ uart@3e001000 {
compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
status = "disabled";
reg = <0x3e001000 0x1000>;
clocks = <&uartb2_clk>;
clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB2>;
interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
@ -63,7 +65,7 @@ uart@3e002000 {
compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
status = "disabled";
reg = <0x3e002000 0x1000>;
clocks = <&uartb3_clk>;
clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB3>;
interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
@ -73,7 +75,7 @@ uart@3e003000 {
compatible = "brcm,bcm11351-dw-apb-uart", "snps,dw-apb-uart";
status = "disabled";
reg = <0x3e003000 0x1000>;
clocks = <&uartb4_clk>;
clocks = <&slave_ccu BCM281XX_SLAVE_CCU_UARTB4>;
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
reg-shift = <2>;
reg-io-width = <4>;
@ -95,7 +97,7 @@ timer@35006000 {
compatible = "brcm,kona-timer";
reg = <0x35006000 0x1000>;
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&hub_timer_clk>;
clocks = <&aon_ccu BCM281XX_AON_CCU_HUB_TIMER>;
};
gpio: gpio@35003000 {
@ -118,7 +120,7 @@ sdio1: sdio@3f180000 {
compatible = "brcm,kona-sdhci";
reg = <0x3f180000 0x10000>;
interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&sdio1_clk>;
clocks = <&master_ccu BCM281XX_MASTER_CCU_SDIO1>;
status = "disabled";
};
@ -126,7 +128,7 @@ sdio2: sdio@3f190000 {
compatible = "brcm,kona-sdhci";
reg = <0x3f190000 0x10000>;
interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&sdio2_clk>;
clocks = <&master_ccu BCM281XX_MASTER_CCU_SDIO2>;
status = "disabled";
};
@ -134,7 +136,7 @@ sdio3: sdio@3f1a0000 {
compatible = "brcm,kona-sdhci";
reg = <0x3f1a0000 0x10000>;
interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&sdio3_clk>;
clocks = <&master_ccu BCM281XX_MASTER_CCU_SDIO3>;
status = "disabled";
};
@ -142,7 +144,7 @@ sdio4: sdio@3f1b0000 {
compatible = "brcm,kona-sdhci";
reg = <0x3f1b0000 0x10000>;
interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&sdio4_clk>;
clocks = <&master_ccu BCM281XX_MASTER_CCU_SDIO4>;
status = "disabled";
};
@ -157,7 +159,7 @@ i2c@3e016000 {
interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&bsc1_clk>;
clocks = <&slave_ccu BCM281XX_SLAVE_CCU_BSC1>;
status = "disabled";
};
@ -167,7 +169,7 @@ i2c@3e017000 {
interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&bsc2_clk>;
clocks = <&slave_ccu BCM281XX_SLAVE_CCU_BSC2>;
status = "disabled";
};
@ -177,7 +179,7 @@ i2c@3e018000 {
interrupts = <GIC_SPI 169 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&bsc3_clk>;
clocks = <&slave_ccu BCM281XX_SLAVE_CCU_BSC3>;
status = "disabled";
};
@ -187,99 +189,125 @@ i2c@3500d000 {
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&pmu_bsc_clk>;
clocks = <&aon_ccu BCM281XX_AON_CCU_PMU_BSC>;
status = "disabled";
};
clocks {
bsc1_clk: bsc1 {
compatible = "fixed-clock";
clock-frequency = <13000000>;
#clock-cells = <0>;
#address-cells = <1>;
#size-cells = <1>;
ranges;
root_ccu: root_ccu {
compatible = "brcm,bcm11351-root-ccu";
reg = <0x35001000 0x0f00>;
#clock-cells = <1>;
clock-output-names = "frac_1m";
};
bsc2_clk: bsc2 {
compatible = "fixed-clock";
clock-frequency = <13000000>;
#clock-cells = <0>;
hub_ccu: hub_ccu {
compatible = "brcm,bcm11351-hub-ccu";
reg = <0x34000000 0x0f00>;
#clock-cells = <1>;
clock-output-names = "tmon_1m";
};
bsc3_clk: bsc3 {
compatible = "fixed-clock";
clock-frequency = <13000000>;
#clock-cells = <0>;
aon_ccu: aon_ccu {
compatible = "brcm,bcm11351-aon-ccu";
reg = <0x35002000 0x0f00>;
#clock-cells = <1>;
clock-output-names = "hub_timer",
"pmu_bsc",
"pmu_bsc_var";
};
pmu_bsc_clk: pmu_bsc {
compatible = "fixed-clock";
clock-frequency = <13000000>;
#clock-cells = <0>;
master_ccu: master_ccu {
compatible = "brcm,bcm11351-master-ccu";
reg = <0x3f001000 0x0f00>;
#clock-cells = <1>;
clock-output-names = "sdio1",
"sdio2",
"sdio3",
"sdio4",
"usb_ic",
"hsic2_48m",
"hsic2_12m";
};
hub_timer_clk: hub_timer {
compatible = "fixed-clock";
clock-frequency = <32768>;
#clock-cells = <0>;
slave_ccu: slave_ccu {
compatible = "brcm,bcm11351-slave-ccu";
reg = <0x3e011000 0x0f00>;
#clock-cells = <1>;
clock-output-names = "uartb",
"uartb2",
"uartb3",
"uartb4",
"ssp0",
"ssp2",
"bsc1",
"bsc2",
"bsc3",
"pwm";
};
pwm_clk: pwm {
compatible = "fixed-clock";
clock-frequency = <26000000>;
ref_1m_clk: ref_1m {
#clock-cells = <0>;
};
sdio1_clk: sdio1 {
compatible = "fixed-clock";
clock-frequency = <48000000>;
#clock-cells = <0>;
};
sdio2_clk: sdio2 {
compatible = "fixed-clock";
clock-frequency = <48000000>;
#clock-cells = <0>;
};
sdio3_clk: sdio3 {
compatible = "fixed-clock";
clock-frequency = <48000000>;
#clock-cells = <0>;
};
sdio4_clk: sdio4 {
compatible = "fixed-clock";
clock-frequency = <48000000>;
#clock-cells = <0>;
};
tmon_1m_clk: tmon_1m {
compatible = "fixed-clock";
clock-frequency = <1000000>;
#clock-cells = <0>;
};
uartb_clk: uartb {
compatible = "fixed-clock";
clock-frequency = <13000000>;
ref_32k_clk: ref_32k {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <32768>;
};
uartb2_clk: uartb2 {
compatible = "fixed-clock";
clock-frequency = <13000000>;
bbl_32k_clk: bbl_32k {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <32768>;
};
uartb3_clk: uartb3 {
ref_13m_clk: ref_13m {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <13000000>;
#clock-cells = <0>;
};
uartb4_clk: uartb4 {
var_13m_clk: var_13m {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <13000000>;
};
dft_19_5m_clk: dft_19_5m {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <19500000>;
};
ref_crystal_clk: ref_crystal {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <26000000>;
};
ref_cx40_clk: ref_cx40 {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <40000000>;
};
ref_52m_clk: ref_52m {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <52000000>;
};
var_52m_clk: var_52m {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <52000000>;
};
usb_otg_ahb_clk: usb_otg_ahb {
@ -287,6 +315,66 @@ usb_otg_ahb_clk: usb_otg_ahb {
clock-frequency = <52000000>;
#clock-cells = <0>;
};
ref_96m_clk: ref_96m {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <96000000>;
};
var_96m_clk: var_96m {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <96000000>;
};
ref_104m_clk: ref_104m {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <104000000>;
};
var_104m_clk: var_104m {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <104000000>;
};
ref_156m_clk: ref_156m {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <156000000>;
};
var_156m_clk: var_156m {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <156000000>;
};
ref_208m_clk: ref_208m {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <208000000>;
};
var_208m_clk: var_208m {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <208000000>;
};
ref_312m_clk: ref_312m {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <312000000>;
};
var_312m_clk: var_312m {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <312000000>;
};
};
usbotg: usb@3f120000 {

5
arch/arm/boot/dts/bcm28155-ap.dts
View File

@ -49,11 +49,6 @@ i2c@3500d000 {
clock-frequency = <400000>;
};
sdio1: sdio@3f180000 {
max-frequency = <48000000>;
status = "okay";
};
sdio2: sdio@3f190000 {
non-removable;
max-frequency = <48000000>;

35
arch/arm/boot/dts/bcm4708-netgear-r6250.dts Normal file
View File

@ -0,0 +1,35 @@
/*
* Broadcom BCM470X / BCM5301X arm platform code.
* DTS for Netgear R6250 V1
*
* Copyright 2013 Hauke Mehrtens <hauke@hauke-m.de>
*
* Licensed under the GNU/GPL. See COPYING for details.
*/
/dts-v1/;
#include "bcm4708.dtsi"
/ {
compatible = "netgear,r6250v1", "brcm,bcm4708";
model = "Netgear R6250 V1 (BCM4708)";
chosen {
bootargs = "console=ttyS0,115200";
};
memory {
reg = <0x00000000 0x08000000>;
};
chipcommonA {
uart0: serial@0300 {
status = "okay";
};
uart1: serial@0400 {
status = "okay";
};
};
};

34
arch/arm/boot/dts/bcm4708.dtsi Normal file
View File

@ -0,0 +1,34 @@
/*
* Broadcom BCM470X / BCM5301X ARM platform code.
* DTS for BCM4708 SoC.
*
* Copyright 2013-2014 Hauke Mehrtens <hauke@hauke-m.de>
*
* Licensed under the GNU/GPL. See COPYING for details.
*/
#include "bcm5301x.dtsi"
/ {
compatible = "brcm,bcm4708";
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a9";
next-level-cache = <&L2>;
reg = <0x0>;
};
cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a9";
next-level-cache = <&L2>;
reg = <0x1>;
};
};
};

95
arch/arm/boot/dts/bcm5301x.dtsi Normal file
View File

@ -0,0 +1,95 @@
/*
* Broadcom BCM470X / BCM5301X ARM platform code.
* Generic DTS part for all BCM53010, BCM53011, BCM53012, BCM53014, BCM53015,
* BCM53016, BCM53017, BCM53018, BCM4707, BCM4708 and BCM4709 SoCs
*
* Copyright 2013-2014 Hauke Mehrtens <hauke@hauke-m.de>
*
* Licensed under the GNU/GPL. See COPYING for details.
*/
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "skeleton.dtsi"
/ {
interrupt-parent = <&gic>;
chipcommonA {
compatible = "simple-bus";
ranges = <0x00000000 0x18000000 0x00001000>;
#address-cells = <1>;
#size-cells = <1>;
uart0: serial@0300 {
compatible = "ns16550";
reg = <0x0300 0x100>;
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <100000000>;
status = "disabled";
};
uart1: serial@0400 {
compatible = "ns16550";
reg = <0x0400 0x100>;
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
clock-frequency = <100000000>;
status = "disabled";
};
};
mpcore {
compatible = "simple-bus";
ranges = <0x00000000 0x19020000 0x00003000>;
#address-cells = <1>;
#size-cells = <1>;
scu@0000 {
compatible = "arm,cortex-a9-scu";
reg = <0x0000 0x100>;
};
timer@0200 {
compatible = "arm,cortex-a9-global-timer";
reg = <0x0200 0x100>;
interrupts = <GIC_PPI 11 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_periph>;
};
local-timer@0600 {
compatible = "arm,cortex-a9-twd-timer";
reg = <0x0600 0x100>;
interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clk_periph>;
};
gic: interrupt-controller@1000 {
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>;
#address-cells = <0>;
interrupt-controller;
reg = <0x1000 0x1000>,
<0x0100 0x100>;
};
L2: cache-controller@2000 {
compatible = "arm,pl310-cache";
reg = <0x2000 0x1000>;
cache-unified;
cache-level = <2>;
};
};
clocks {
#address-cells = <1>;
#size-cells = <0>;
/* As long as we do not have a real clock driver us this
* fixed clock */
clk_periph: periph {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <400000000>;
};
};
};