ASoC: Intel: Skylake: Add D0iX callbacks
The driver needs two DSP callback, one to set D0i0 (active) and D0i3 (low-power) states. Add these callbacks in dsp ops and implement them for broxton platforms. Signed-off-by: Jayachandran B <jayachandran.b@intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -43,6 +43,9 @@
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#define BXT_ADSP_FW_BIN_HDR_OFFSET 0x2000
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/* Delay before scheduling D0i3 entry */
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#define BXT_D0I3_DELAY 5000
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static unsigned int bxt_get_errorcode(struct sst_dsp *ctx)
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{
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return sst_dsp_shim_read(ctx, BXT_ADSP_ERROR_CODE);
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@ -288,6 +291,141 @@ static int bxt_load_base_firmware(struct sst_dsp *ctx)
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return ret;
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}
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/*
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* Decide the D0i3 state that can be targeted based on the usecase
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* ref counts and DSP state
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*
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* Decision Matrix: (X= dont care; state = target state)
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*
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* DSP state != SKL_DSP_RUNNING ; state = no d0i3
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*
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* DSP state == SKL_DSP_RUNNING , the following matrix applies
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* non_d0i3 >0; streaming =X; non_streaming =X; state = no d0i3
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* non_d0i3 =X; streaming =0; non_streaming =0; state = no d0i3
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* non_d0i3 =0; streaming >0; non_streaming =X; state = streaming d0i3
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* non_d0i3 =0; streaming =0; non_streaming =X; state = non-streaming d0i3
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*/
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static int bxt_d0i3_target_state(struct sst_dsp *ctx)
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{
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struct skl_sst *skl = ctx->thread_context;
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struct skl_d0i3_data *d0i3 = &skl->d0i3;
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if (skl->cores.state[SKL_DSP_CORE0_ID] != SKL_DSP_RUNNING)
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return SKL_DSP_D0I3_NONE;
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if (d0i3->non_d0i3)
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return SKL_DSP_D0I3_NONE;
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else if (d0i3->streaming)
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return SKL_DSP_D0I3_STREAMING;
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else if (d0i3->non_streaming)
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return SKL_DSP_D0I3_NON_STREAMING;
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else
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return SKL_DSP_D0I3_NONE;
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}
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static void bxt_set_dsp_D0i3(struct work_struct *work)
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{
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int ret;
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struct skl_ipc_d0ix_msg msg;
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struct skl_sst *skl = container_of(work,
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struct skl_sst, d0i3.work.work);
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struct sst_dsp *ctx = skl->dsp;
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struct skl_d0i3_data *d0i3 = &skl->d0i3;
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int target_state;
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dev_dbg(ctx->dev, "In %s:\n", __func__);
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/* D0i3 entry allowed only if core 0 alone is running */
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if (skl_dsp_get_enabled_cores(ctx) != SKL_DSP_CORE0_MASK) {
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dev_warn(ctx->dev,
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"D0i3 allowed when only core0 running:Exit\n");
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return;
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}
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target_state = bxt_d0i3_target_state(ctx);
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if (target_state == SKL_DSP_D0I3_NONE)
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return;
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msg.instance_id = 0;
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msg.module_id = 0;
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msg.wake = 1;
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msg.streaming = 0;
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if (target_state == SKL_DSP_D0I3_STREAMING)
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msg.streaming = 1;
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ret = skl_ipc_set_d0ix(&skl->ipc, &msg);
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if (ret < 0) {
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dev_err(ctx->dev, "Failed to set DSP to D0i3 state\n");
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return;
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}
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/* Set Vendor specific register D0I3C.I3 to enable D0i3*/
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if (skl->update_d0i3c)
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skl->update_d0i3c(skl->dev, true);
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d0i3->state = target_state;
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skl->cores.state[SKL_DSP_CORE0_ID] = SKL_DSP_RUNNING_D0I3;
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}
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static int bxt_schedule_dsp_D0i3(struct sst_dsp *ctx)
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{
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struct skl_sst *skl = ctx->thread_context;
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struct skl_d0i3_data *d0i3 = &skl->d0i3;
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/* Schedule D0i3 only if the usecase ref counts are appropriate */
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if (bxt_d0i3_target_state(ctx) != SKL_DSP_D0I3_NONE) {
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dev_dbg(ctx->dev, "%s: Schedule D0i3\n", __func__);
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schedule_delayed_work(&d0i3->work,
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msecs_to_jiffies(BXT_D0I3_DELAY));
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}
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return 0;
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}
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static int bxt_set_dsp_D0i0(struct sst_dsp *ctx)
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{
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int ret;
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struct skl_ipc_d0ix_msg msg;
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struct skl_sst *skl = ctx->thread_context;
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dev_dbg(ctx->dev, "In %s:\n", __func__);
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/* First Cancel any pending attempt to put DSP to D0i3 */
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cancel_delayed_work_sync(&skl->d0i3.work);
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/* If DSP is currently in D0i3, bring it to D0i0 */
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if (skl->cores.state[SKL_DSP_CORE0_ID] != SKL_DSP_RUNNING_D0I3)
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return 0;
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dev_dbg(ctx->dev, "Set DSP to D0i0\n");
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msg.instance_id = 0;
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msg.module_id = 0;
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msg.streaming = 0;
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msg.wake = 0;
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if (skl->d0i3.state == SKL_DSP_D0I3_STREAMING)
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msg.streaming = 1;
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/* Clear Vendor specific register D0I3C.I3 to disable D0i3*/
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if (skl->update_d0i3c)
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skl->update_d0i3c(skl->dev, false);
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ret = skl_ipc_set_d0ix(&skl->ipc, &msg);
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if (ret < 0) {
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dev_err(ctx->dev, "Failed to set DSP to D0i0\n");
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return ret;
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}
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skl->cores.state[SKL_DSP_CORE0_ID] = SKL_DSP_RUNNING;
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skl->d0i3.state = SKL_DSP_D0I3_NONE;
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return 0;
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}
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static int bxt_set_dsp_D0(struct sst_dsp *ctx, unsigned int core_id)
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{
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struct skl_sst *skl = ctx->thread_context;
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@ -414,6 +552,8 @@ static int bxt_set_dsp_D3(struct sst_dsp *ctx, unsigned int core_id)
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static struct skl_dsp_fw_ops bxt_fw_ops = {
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.set_state_D0 = bxt_set_dsp_D0,
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.set_state_D3 = bxt_set_dsp_D3,
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.set_state_D0i3 = bxt_schedule_dsp_D0i3,
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.set_state_D0i0 = bxt_set_dsp_D0i0,
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.load_fw = bxt_load_base_firmware,
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.get_fw_errcode = bxt_get_errorcode,
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.load_library = bxt_load_library,
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@ -126,11 +126,21 @@ struct sst_dsp_device;
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#define SKL_ADSPCS_CPA_SHIFT 24
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#define SKL_ADSPCS_CPA_MASK(cm) ((cm) << SKL_ADSPCS_CPA_SHIFT)
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/* DSP Core state */
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enum skl_dsp_states {
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SKL_DSP_RUNNING = 1,
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/* Running in D0i3 state; can be in streaming or non-streaming D0i3 */
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SKL_DSP_RUNNING_D0I3, /* Running in D0i3 state*/
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SKL_DSP_RESET,
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};
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/* D0i3 substates */
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enum skl_dsp_d0i3_states {
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SKL_DSP_D0I3_NONE = -1, /* No D0i3 */
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SKL_DSP_D0I3_NON_STREAMING = 0,
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SKL_DSP_D0I3_STREAMING = 1,
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};
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struct skl_dsp_fw_ops {
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int (*load_fw)(struct sst_dsp *ctx);
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/* FW module parser/loader */
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@ -139,6 +149,8 @@ struct skl_dsp_fw_ops {
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int (*parse_fw)(struct sst_dsp *ctx);
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int (*set_state_D0)(struct sst_dsp *ctx, unsigned int core_id);
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int (*set_state_D3)(struct sst_dsp *ctx, unsigned int core_id);
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int (*set_state_D0i3)(struct sst_dsp *ctx);
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int (*set_state_D0i0)(struct sst_dsp *ctx);
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unsigned int (*get_fw_errcode)(struct sst_dsp *ctx);
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int (*load_mod)(struct sst_dsp *ctx, u16 mod_id, u8 *mod_name);
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int (*unload_mod)(struct sst_dsp *ctx, u16 mod_id);
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@ -53,6 +53,23 @@ struct skl_dsp_cores {
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int usage_count[SKL_DSP_CORES_MAX];
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};
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/**
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* skl_d0i3_data: skl D0i3 counters data struct
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*
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* @streaming: Count of usecases that can attempt streaming D0i3
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* @non_streaming: Count of usecases that can attempt non-streaming D0i3
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* @non_d0i3: Count of usecases that cannot attempt D0i3
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* @state: current state
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* @work: D0i3 worker thread
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*/
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struct skl_d0i3_data {
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int streaming;
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int non_streaming;
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int non_d0i3;
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enum skl_dsp_d0i3_states state;
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struct delayed_work work;
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};
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struct skl_sst {
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struct device *dev;
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struct sst_dsp *dsp;
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/* Callback to update D0i3C register */
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void (*update_d0i3c)(struct device *dev, bool enable);
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struct skl_d0i3_data d0i3;
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};
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struct skl_ipc_init_instance_msg {
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