sh_eth: fix 16-bit descriptor field access endianness too
Commit 1299653aff ("sh_eth: fix descriptor access endianness") only
addressed the 32-bit buffer address field byte-swapping but the driver
still accesses 16-bit frame/buffer length descriptor fields without the
necessary byte-swapping -- which should affect the big-endian kernels.
In order to be able to use {cpu|edmac}_to_{edmac|cpu}(), we need to declare
the RX/TX descriptor word 1 as a 32-bit field and use shifts/masking to
access the 16-bit subfields (which gets rid of the ugly #ifdef'ery too)...
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Sergei Shtylyov
David S. Miller
parent
ce8c839b74
commit
5cbf20c747
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@ -1167,6 +1167,7 @@ static void sh_eth_ring_format(struct net_device *ndev)
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int tx_ringsize = sizeof(*txdesc) * mdp->num_tx_ring;
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int skbuff_size = mdp->rx_buf_sz + SH_ETH_RX_ALIGN + 32 - 1;
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dma_addr_t dma_addr;
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u32 buf_len;
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mdp->cur_rx = 0;
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mdp->cur_tx = 0;
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@ -1187,9 +1188,9 @@ static void sh_eth_ring_format(struct net_device *ndev)
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/* RX descriptor */
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rxdesc = &mdp->rx_ring[i];
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/* The size of the buffer is a multiple of 32 bytes. */
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rxdesc->buffer_length = ALIGN(mdp->rx_buf_sz, 32);
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dma_addr = dma_map_single(&ndev->dev, skb->data,
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rxdesc->buffer_length,
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buf_len = ALIGN(mdp->rx_buf_sz, 32);
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rxdesc->len = cpu_to_edmac(mdp, buf_len << 16);
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dma_addr = dma_map_single(&ndev->dev, skb->data, buf_len,
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DMA_FROM_DEVICE);
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if (dma_mapping_error(&ndev->dev, dma_addr)) {
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kfree_skb(skb);
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@ -1220,7 +1221,7 @@ static void sh_eth_ring_format(struct net_device *ndev)
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mdp->tx_skbuff[i] = NULL;
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txdesc = &mdp->tx_ring[i];
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txdesc->status = cpu_to_edmac(mdp, TD_TFP);
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txdesc->buffer_length = 0;
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txdesc->len = cpu_to_edmac(mdp, 0);
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if (i == 0) {
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/* Tx descriptor address set */
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sh_eth_write(ndev, mdp->tx_desc_dma, TDLAR);
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@ -1429,7 +1430,8 @@ static int sh_eth_txfree(struct net_device *ndev)
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if (mdp->tx_skbuff[entry]) {
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dma_unmap_single(&ndev->dev,
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edmac_to_cpu(mdp, txdesc->addr),
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txdesc->buffer_length, DMA_TO_DEVICE);
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edmac_to_cpu(mdp, txdesc->len) >> 16,
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DMA_TO_DEVICE);
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dev_kfree_skb_irq(mdp->tx_skbuff[entry]);
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mdp->tx_skbuff[entry] = NULL;
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free_num++;
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@ -1439,7 +1441,7 @@ static int sh_eth_txfree(struct net_device *ndev)
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txdesc->status |= cpu_to_edmac(mdp, TD_TDLE);
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ndev->stats.tx_packets++;
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ndev->stats.tx_bytes += txdesc->buffer_length;
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ndev->stats.tx_bytes += edmac_to_cpu(mdp, txdesc->len) >> 16;
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}
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return free_num;
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}
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@ -1458,6 +1460,7 @@ static int sh_eth_rx(struct net_device *ndev, u32 intr_status, int *quota)
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u32 desc_status;
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int skbuff_size = mdp->rx_buf_sz + SH_ETH_RX_ALIGN + 32 - 1;
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dma_addr_t dma_addr;
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u32 buf_len;
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boguscnt = min(boguscnt, *quota);
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limit = boguscnt;
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@ -1466,7 +1469,7 @@ static int sh_eth_rx(struct net_device *ndev, u32 intr_status, int *quota)
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/* RACT bit must be checked before all the following reads */
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dma_rmb();
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desc_status = edmac_to_cpu(mdp, rxdesc->status);
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pkt_len = rxdesc->frame_length;
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pkt_len = edmac_to_cpu(mdp, rxdesc->len) & RD_RFL;
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if (--boguscnt < 0)
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break;
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@ -1532,7 +1535,8 @@ static int sh_eth_rx(struct net_device *ndev, u32 intr_status, int *quota)
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entry = mdp->dirty_rx % mdp->num_rx_ring;
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rxdesc = &mdp->rx_ring[entry];
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/* The size of the buffer is 32 byte boundary. */
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rxdesc->buffer_length = ALIGN(mdp->rx_buf_sz, 32);
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buf_len = ALIGN(mdp->rx_buf_sz, 32);
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rxdesc->len = cpu_to_edmac(mdp, buf_len << 16);
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if (mdp->rx_skbuff[entry] == NULL) {
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skb = netdev_alloc_skb(ndev, skbuff_size);
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@ -1540,8 +1544,7 @@ static int sh_eth_rx(struct net_device *ndev, u32 intr_status, int *quota)
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break; /* Better luck next round. */
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sh_eth_set_receive_align(skb);
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dma_addr = dma_map_single(&ndev->dev, skb->data,
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rxdesc->buffer_length,
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DMA_FROM_DEVICE);
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buf_len, DMA_FROM_DEVICE);
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if (dma_mapping_error(&ndev->dev, dma_addr)) {
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kfree_skb(skb);
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break;
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@ -2407,7 +2410,7 @@ static int sh_eth_start_xmit(struct sk_buff *skb, struct net_device *ndev)
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return NETDEV_TX_OK;
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}
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txdesc->addr = cpu_to_edmac(mdp, dma_addr);
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txdesc->buffer_length = skb->len;
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txdesc->len = cpu_to_edmac(mdp, skb->len << 16);
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dma_wmb(); /* TACT bit must be set after all the above writes */
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if (entry >= mdp->num_tx_ring - 1)
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@ -283,7 +283,7 @@ enum DMAC_IM_BIT {
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DMAC_M_RINT1 = 0x00000001,
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};
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/* Receive descriptor bit */
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/* Receive descriptor 0 bits */
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enum RD_STS_BIT {
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RD_RACT = 0x80000000, RD_RDLE = 0x40000000,
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RD_RFP1 = 0x20000000, RD_RFP0 = 0x10000000,
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@ -298,6 +298,12 @@ enum RD_STS_BIT {
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#define RDFEND RD_RFP0
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#define RD_RFP (RD_RFP1|RD_RFP0)
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/* Receive descriptor 1 bits */
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enum RD_LEN_BIT {
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RD_RFL = 0x0000ffff, /* receive frame length */
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RD_RBL = 0xffff0000, /* receive buffer length */
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};
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/* FCFTR */
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enum FCFTR_BIT {
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FCFTR_RFF2 = 0x00040000, FCFTR_RFF1 = 0x00020000,
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@ -307,7 +313,7 @@ enum FCFTR_BIT {
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#define DEFAULT_FIFO_F_D_RFF (FCFTR_RFF2 | FCFTR_RFF1 | FCFTR_RFF0)
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#define DEFAULT_FIFO_F_D_RFD (FCFTR_RFD2 | FCFTR_RFD1 | FCFTR_RFD0)
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/* Transmit descriptor bit */
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/* Transmit descriptor 0 bits */
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enum TD_STS_BIT {
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TD_TACT = 0x80000000, TD_TDLE = 0x40000000,
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TD_TFP1 = 0x20000000, TD_TFP0 = 0x10000000,
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@ -317,6 +323,11 @@ enum TD_STS_BIT {
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#define TDFEND TD_TFP0
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#define TD_TFP (TD_TFP1|TD_TFP0)
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/* Transmit descriptor 1 bits */
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enum TD_LEN_BIT {
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TD_TBL = 0xffff0000, /* transmit buffer length */
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};
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/* RMCR */
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enum RMCR_BIT {
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RMCR_RNC = 0x00000001,
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@ -425,15 +436,9 @@ enum TSU_FWSLC_BIT {
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*/
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struct sh_eth_txdesc {
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u32 status; /* TD0 */
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#if defined(__LITTLE_ENDIAN)
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u16 pad0; /* TD1 */
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u16 buffer_length; /* TD1 */
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#else
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u16 buffer_length; /* TD1 */
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u16 pad0; /* TD1 */
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#endif
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u32 len; /* TD1 */
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u32 addr; /* TD2 */
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u32 pad1; /* padding data */
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u32 pad0; /* padding data */
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} __aligned(2) __packed;
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/* The sh ether Rx buffer descriptors.
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@ -441,13 +446,7 @@ struct sh_eth_txdesc {
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*/
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struct sh_eth_rxdesc {
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u32 status; /* RD0 */
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#if defined(__LITTLE_ENDIAN)
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u16 frame_length; /* RD1 */
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u16 buffer_length; /* RD1 */
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#else
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u16 buffer_length; /* RD1 */
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u16 frame_length; /* RD1 */
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#endif
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u32 len; /* RD1 */
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u32 addr; /* RD2 */
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u32 pad0; /* padding data */
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} __aligned(2) __packed;
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