rtc: pm8xxx: use regmap API for register accesses
Now that the parent mfd driver has been made to work again, and has been reworked to create a regmap instance intended for its children to use, rework the pm8xxx driver to use the regmap API for its register accesses. Signed-off-by: Josh Cartwright <joshc@codeaurora.org> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Cc: Alessandro Zummo <a.zummo@towertech.it> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
This commit is contained in:
Josh Cartwright
Linus Torvalds
parent
5bed811d66
commit
5d7dc4cf14
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@ -13,11 +13,12 @@
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/rtc.h>
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#include <linux/platform_device.h>
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#include <linux/pm.h>
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#include <linux/regmap.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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#include <linux/mfd/pm8xxx/core.h>
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#include <linux/mfd/pm8xxx/rtc.h>
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@ -37,6 +38,7 @@
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/**
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* struct pm8xxx_rtc - rtc driver internal structure
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* @rtc: rtc device for this driver.
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* @regmap: regmap used to access RTC registers
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* @rtc_alarm_irq: rtc alarm irq number.
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* @rtc_base: address of rtc control register.
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* @rtc_read_base: base address of read registers.
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@ -48,6 +50,7 @@
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*/
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struct pm8xxx_rtc {
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struct rtc_device *rtc;
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struct regmap *regmap;
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int rtc_alarm_irq;
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int rtc_base;
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int rtc_read_base;
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@ -58,44 +61,6 @@ struct pm8xxx_rtc {
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spinlock_t ctrl_reg_lock;
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};
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/*
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* The RTC registers need to be read/written one byte at a time. This is a
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* hardware limitation.
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*/
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static int pm8xxx_read_wrapper(struct pm8xxx_rtc *rtc_dd, u8 *rtc_val,
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int base, int count)
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{
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int i, rc;
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struct device *parent = rtc_dd->rtc_dev->parent;
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for (i = 0; i < count; i++) {
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rc = pm8xxx_readb(parent, base + i, &rtc_val[i]);
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if (rc < 0) {
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dev_err(rtc_dd->rtc_dev, "PMIC read failed\n");
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return rc;
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}
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}
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return 0;
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}
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static int pm8xxx_write_wrapper(struct pm8xxx_rtc *rtc_dd, u8 *rtc_val,
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int base, int count)
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{
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int i, rc;
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struct device *parent = rtc_dd->rtc_dev->parent;
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for (i = 0; i < count; i++) {
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rc = pm8xxx_writeb(parent, base + i, rtc_val[i]);
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if (rc < 0) {
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dev_err(rtc_dd->rtc_dev, "PMIC write failed\n");
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return rc;
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}
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}
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return 0;
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}
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/*
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* Steps to write the RTC registers.
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* 1. Disable alarm if enabled.
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@ -107,7 +72,7 @@ static int pm8xxx_rtc_set_time(struct device *dev, struct rtc_time *tm)
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{
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int rc, i;
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unsigned long secs, irq_flags;
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u8 value[NUM_8_BIT_RTC_REGS], reg = 0, alarm_enabled = 0, ctrl_reg;
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u8 value[NUM_8_BIT_RTC_REGS], alarm_enabled = 0, ctrl_reg;
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struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
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rtc_tm_to_time(tm, &secs);
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@ -125,9 +90,8 @@ static int pm8xxx_rtc_set_time(struct device *dev, struct rtc_time *tm)
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if (ctrl_reg & PM8xxx_RTC_ALARM_ENABLE) {
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alarm_enabled = 1;
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ctrl_reg &= ~PM8xxx_RTC_ALARM_ENABLE;
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rc = pm8xxx_write_wrapper(rtc_dd, &ctrl_reg, rtc_dd->rtc_base,
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1);
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if (rc < 0) {
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rc = regmap_write(rtc_dd->regmap, rtc_dd->rtc_base, ctrl_reg);
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if (rc) {
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dev_err(dev, "Write to RTC control register failed\n");
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goto rtc_rw_fail;
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}
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@ -137,33 +101,31 @@ static int pm8xxx_rtc_set_time(struct device *dev, struct rtc_time *tm)
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}
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/* Write 0 to Byte[0] */
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reg = 0;
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rc = pm8xxx_write_wrapper(rtc_dd, ®, rtc_dd->rtc_write_base, 1);
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if (rc < 0) {
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rc = regmap_write(rtc_dd->regmap, rtc_dd->rtc_write_base, 0);
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if (rc) {
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dev_err(dev, "Write to RTC write data register failed\n");
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goto rtc_rw_fail;
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}
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/* Write Byte[1], Byte[2], Byte[3] */
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rc = pm8xxx_write_wrapper(rtc_dd, value + 1,
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rtc_dd->rtc_write_base + 1, 3);
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if (rc < 0) {
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rc = regmap_bulk_write(rtc_dd->regmap, rtc_dd->rtc_write_base + 1,
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&value[1], sizeof(value) - 1);
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if (rc) {
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dev_err(dev, "Write to RTC write data register failed\n");
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goto rtc_rw_fail;
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}
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/* Write Byte[0] */
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rc = pm8xxx_write_wrapper(rtc_dd, value, rtc_dd->rtc_write_base, 1);
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if (rc < 0) {
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rc = regmap_write(rtc_dd->regmap, rtc_dd->rtc_write_base, value[0]);
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if (rc) {
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dev_err(dev, "Write to RTC write data register failed\n");
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goto rtc_rw_fail;
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}
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if (alarm_enabled) {
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ctrl_reg |= PM8xxx_RTC_ALARM_ENABLE;
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rc = pm8xxx_write_wrapper(rtc_dd, &ctrl_reg, rtc_dd->rtc_base,
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1);
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if (rc < 0) {
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rc = regmap_write(rtc_dd->regmap, rtc_dd->rtc_base, ctrl_reg);
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if (rc) {
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dev_err(dev, "Write to RTC control register failed\n");
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goto rtc_rw_fail;
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}
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@ -180,13 +142,14 @@ static int pm8xxx_rtc_set_time(struct device *dev, struct rtc_time *tm)
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static int pm8xxx_rtc_read_time(struct device *dev, struct rtc_time *tm)
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{
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int rc;
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u8 value[NUM_8_BIT_RTC_REGS], reg;
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u8 value[NUM_8_BIT_RTC_REGS];
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unsigned long secs;
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unsigned int reg;
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struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
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rc = pm8xxx_read_wrapper(rtc_dd, value, rtc_dd->rtc_read_base,
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NUM_8_BIT_RTC_REGS);
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if (rc < 0) {
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rc = regmap_bulk_read(rtc_dd->regmap, rtc_dd->rtc_read_base,
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value, sizeof(value));
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if (rc) {
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dev_err(dev, "RTC read data register failed\n");
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return rc;
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}
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@ -195,17 +158,16 @@ static int pm8xxx_rtc_read_time(struct device *dev, struct rtc_time *tm)
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* Read the LSB again and check if there has been a carry over.
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* If there is, redo the read operation.
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*/
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rc = pm8xxx_read_wrapper(rtc_dd, ®, rtc_dd->rtc_read_base, 1);
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rc = regmap_read(rtc_dd->regmap, rtc_dd->rtc_read_base, ®);
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if (rc < 0) {
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dev_err(dev, "RTC read data register failed\n");
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return rc;
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}
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if (unlikely(reg < value[0])) {
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rc = pm8xxx_read_wrapper(rtc_dd, value,
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rtc_dd->rtc_read_base,
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NUM_8_BIT_RTC_REGS);
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if (rc < 0) {
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rc = regmap_bulk_read(rtc_dd->regmap, rtc_dd->rtc_read_base,
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value, sizeof(value));
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if (rc) {
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dev_err(dev, "RTC read data register failed\n");
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return rc;
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}
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@ -244,9 +206,9 @@ static int pm8xxx_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
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spin_lock_irqsave(&rtc_dd->ctrl_reg_lock, irq_flags);
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rc = pm8xxx_write_wrapper(rtc_dd, value, rtc_dd->alarm_rw_base,
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NUM_8_BIT_RTC_REGS);
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if (rc < 0) {
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rc = regmap_bulk_write(rtc_dd->regmap, rtc_dd->alarm_rw_base, value,
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sizeof(value));
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if (rc) {
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dev_err(dev, "Write to RTC ALARM register failed\n");
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goto rtc_rw_fail;
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}
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@ -258,8 +220,8 @@ static int pm8xxx_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alarm)
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else
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ctrl_reg &= ~PM8xxx_RTC_ALARM_ENABLE;
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rc = pm8xxx_write_wrapper(rtc_dd, &ctrl_reg, rtc_dd->rtc_base, 1);
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if (rc < 0) {
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rc = regmap_write(rtc_dd->regmap, rtc_dd->rtc_base, ctrl_reg);
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if (rc) {
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dev_err(dev, "Write to RTC control register failed\n");
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goto rtc_rw_fail;
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}
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@ -282,9 +244,9 @@ static int pm8xxx_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
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unsigned long secs;
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struct pm8xxx_rtc *rtc_dd = dev_get_drvdata(dev);
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rc = pm8xxx_read_wrapper(rtc_dd, value, rtc_dd->alarm_rw_base,
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NUM_8_BIT_RTC_REGS);
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if (rc < 0) {
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rc = regmap_bulk_read(rtc_dd->regmap, rtc_dd->alarm_rw_base, value,
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sizeof(value));
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if (rc) {
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dev_err(dev, "RTC alarm time read failed\n");
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return rc;
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}
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@ -323,8 +285,8 @@ static int pm8xxx_rtc_alarm_irq_enable(struct device *dev, unsigned int enable)
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else
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ctrl_reg &= ~PM8xxx_RTC_ALARM_ENABLE;
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rc = pm8xxx_write_wrapper(rtc_dd, &ctrl_reg, rtc_dd->rtc_base, 1);
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if (rc < 0) {
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rc = regmap_write(rtc_dd->regmap, rtc_dd->rtc_base, ctrl_reg);
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if (rc) {
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dev_err(dev, "Write to RTC control register failed\n");
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goto rtc_rw_fail;
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}
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@ -346,7 +308,7 @@ static struct rtc_class_ops pm8xxx_rtc_ops = {
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static irqreturn_t pm8xxx_alarm_trigger(int irq, void *dev_id)
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{
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struct pm8xxx_rtc *rtc_dd = dev_id;
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u8 ctrl_reg;
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unsigned int ctrl_reg;
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int rc;
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unsigned long irq_flags;
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@ -358,8 +320,8 @@ static irqreturn_t pm8xxx_alarm_trigger(int irq, void *dev_id)
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ctrl_reg = rtc_dd->ctrl_reg;
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ctrl_reg &= ~PM8xxx_RTC_ALARM_ENABLE;
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rc = pm8xxx_write_wrapper(rtc_dd, &ctrl_reg, rtc_dd->rtc_base, 1);
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if (rc < 0) {
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rc = regmap_write(rtc_dd->regmap, rtc_dd->rtc_base, ctrl_reg);
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if (rc) {
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spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
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dev_err(rtc_dd->rtc_dev,
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"Write to RTC control register failed\n");
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@ -370,18 +332,20 @@ static irqreturn_t pm8xxx_alarm_trigger(int irq, void *dev_id)
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spin_unlock_irqrestore(&rtc_dd->ctrl_reg_lock, irq_flags);
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/* Clear RTC alarm register */
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rc = pm8xxx_read_wrapper(rtc_dd, &ctrl_reg, rtc_dd->rtc_base +
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PM8XXX_ALARM_CTRL_OFFSET, 1);
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if (rc < 0) {
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rc = regmap_read(rtc_dd->regmap,
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rtc_dd->rtc_base + PM8XXX_ALARM_CTRL_OFFSET,
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&ctrl_reg);
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if (rc) {
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dev_err(rtc_dd->rtc_dev,
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"RTC Alarm control register read failed\n");
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goto rtc_alarm_handled;
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}
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ctrl_reg &= ~PM8xxx_RTC_ALARM_CLEAR;
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rc = pm8xxx_write_wrapper(rtc_dd, &ctrl_reg, rtc_dd->rtc_base +
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PM8XXX_ALARM_CTRL_OFFSET, 1);
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if (rc < 0)
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rc = regmap_write(rtc_dd->regmap,
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rtc_dd->rtc_base + PM8XXX_ALARM_CTRL_OFFSET,
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ctrl_reg);
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if (rc)
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dev_err(rtc_dd->rtc_dev,
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"Write to RTC Alarm control register failed\n");
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@ -392,7 +356,7 @@ static irqreturn_t pm8xxx_alarm_trigger(int irq, void *dev_id)
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static int pm8xxx_rtc_probe(struct platform_device *pdev)
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{
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int rc;
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u8 ctrl_reg;
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unsigned int ctrl_reg;
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bool rtc_write_enable = false;
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struct pm8xxx_rtc *rtc_dd;
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struct resource *rtc_resource;
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@ -409,6 +373,12 @@ static int pm8xxx_rtc_probe(struct platform_device *pdev)
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/* Initialise spinlock to protect RTC control register */
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spin_lock_init(&rtc_dd->ctrl_reg_lock);
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rtc_dd->regmap = dev_get_regmap(pdev->dev.parent, NULL);
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if (!rtc_dd->regmap) {
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dev_err(&pdev->dev, "Parent regmap unavailable.\n");
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return -ENXIO;
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}
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rtc_dd->rtc_alarm_irq = platform_get_irq(pdev, 0);
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if (rtc_dd->rtc_alarm_irq < 0) {
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dev_err(&pdev->dev, "Alarm IRQ resource absent!\n");
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@ -432,17 +402,16 @@ static int pm8xxx_rtc_probe(struct platform_device *pdev)
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rtc_dd->rtc_dev = &pdev->dev;
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/* Check if the RTC is on, else turn it on */
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rc = pm8xxx_read_wrapper(rtc_dd, &ctrl_reg, rtc_dd->rtc_base, 1);
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if (rc < 0) {
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rc = regmap_read(rtc_dd->regmap, rtc_dd->rtc_base, &ctrl_reg);
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if (rc) {
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dev_err(&pdev->dev, "RTC control register read failed!\n");
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return rc;
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}
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if (!(ctrl_reg & PM8xxx_RTC_ENABLE)) {
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ctrl_reg |= PM8xxx_RTC_ENABLE;
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rc = pm8xxx_write_wrapper(rtc_dd, &ctrl_reg, rtc_dd->rtc_base,
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1);
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if (rc < 0) {
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rc = regmap_write(rtc_dd->regmap, rtc_dd->rtc_base, ctrl_reg);
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if (rc) {
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dev_err(&pdev->dev,
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"Write to RTC control register failed\n");
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return rc;
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