usb: dwc3: fix Clear Stall EP command failure
Commit50c763f8c1
("usb: dwc3: Set the ClearPendIN bit on Clear Stall EP command") sets ClearPendIN bit for all IN endpoints of v2.60a+ cores. This causes ClearStall command fails on 2.60+ cores operating in HighSpeed mode. In page 539 of 2.60a specification: "When issuing Clear Stall command for IN endpoints in SuperSpeed mode, the software must set the "ClearPendIN" bit to '1' to clear any pending IN transcations, so that the device does not expect any ACK TP from the host for the data sent earlier." It's obvious that we only need to apply this rule to those IN endpoints that currently operating in SuperSpeed mode. Fixes:50c763f8c1
("usb: dwc3: Set the ClearPendIN bit on Clear Stall EP command") Cc: <stable@vger.kernel.org> # v4.7+ Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com> Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
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@ -341,7 +341,8 @@ static int dwc3_send_clear_stall_ep_cmd(struct dwc3_ep *dep)
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* IN transfers due to a mishandled error condition. Synopsys
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* STAR 9000614252.
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*/
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if (dep->direction && (dwc->revision >= DWC3_REVISION_260A))
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if (dep->direction && (dwc->revision >= DWC3_REVISION_260A) &&
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(dwc->gadget.speed >= USB_SPEED_SUPER))
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cmd |= DWC3_DEPCMD_CLEARPENDIN;
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memset(¶ms, 0, sizeof(params));
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