drm/amdgpu/vce: add support for hw config packet (v2)
This is needed for proper VCE DPM on some APUs. v2: fix the asic list Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -699,6 +699,20 @@ int amdgpu_vce_ring_parse_cs(struct amdgpu_cs_parser *p, uint32_t ib_idx)
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case 0x05000009: /* clock table */
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case 0x05000009: /* clock table */
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break;
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break;
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case 0x0500000c: /* hw config */
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switch (p->adev->asic_type) {
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#ifdef CONFIG_DRM_AMDGPU_CIK
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case CHIP_KAVERI:
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case CHIP_MULLINS:
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#endif
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case CHIP_CARRIZO:
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break;
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default:
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r = -EINVAL;
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goto out;
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}
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break;
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case 0x03000001: /* encode */
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case 0x03000001: /* encode */
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r = amdgpu_vce_cs_reloc(p, ib_idx, idx + 10, idx + 9,
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r = amdgpu_vce_cs_reloc(p, ib_idx, idx + 10, idx + 9,
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*size, 0);
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*size, 0);
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