h8300: clocksource
h8300_timer8: 8bit clockevent device h8300_timer16 / h8300_tpu: 16bit clocksource Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp>
This commit is contained in:
Yoshinori Sato
parent
7b5bb891a6
commit
618b902d8c
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@ -0,0 +1,25 @@
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* Renesas H8/300 16bit timer
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The 16bit timer is a 16bit timer/counter with configurable clock inputs and
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programmable compare match.
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Required Properties:
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- compatible: must contain "renesas,16bit-timer"
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- reg: base address and length of the registers block for the timer module.
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- interrupts: interrupt-specifier for the timer, IMIA
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- clocks: a list of phandle, one for each entry in clock-names.
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- clock-names: must contain "peripheral_clk" for the functional clock.
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- renesas,channel: timer channel number.
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Example:
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timer16: timer@ffff68 {
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compatible = "reneas,16bit-timer";
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reg = <0xffff68 8>, <0xffff60 8>;
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interrupts = <24>;
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renesas,channel = <0>;
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clocks = <&pclk>;
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clock-names = "peripheral_clk";
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};
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@ -0,0 +1,25 @@
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* Renesas H8/300 8bit timer
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The 8bit timer is a 8bit timer/counter with configurable clock inputs and
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programmable compare match.
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This implement only supported cascade mode.
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Required Properties:
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- compatible: must contain "renesas,8bit-timer"
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- reg: base address and length of the registers block for the timer module.
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- interrupts: interrupt-specifier for the timer, CMIA and TOVI
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- clocks: a list of phandle, one for each entry in clock-names.
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- clock-names: must contain "fck" for the functional clock.
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Example:
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timer8_0: timer@ffff80 {
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compatible = "renesas,8bit-timer";
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reg = <0xffff80 10>;
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interrupts = <36>;
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clocks = <&fclk>;
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clock-names = "fck";
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};
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@ -0,0 +1,21 @@
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* Renesas H8/300 Timer Pluse Unit
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The TPU is a 16bit timer/counter with configurable clock inputs and
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programmable compare match.
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This implementation support only cascade mode.
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Required Properties:
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- compatible: must contain "renesas,tpu"
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- reg: base address and length of the registers block in 2 channel.
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- clocks: a list of phandle, one for each entry in clock-names.
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- clock-names: must contain "peripheral_clk" for the functional clock.
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Example:
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tpu: tpu@ffffe0 {
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compatible = "renesas,tpu";
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reg = <0xffffe0 16>, <0xfffff0 12>;
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clocks = <&pclk>;
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clock-names = "peripheral_clk";
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};
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@ -258,4 +258,11 @@ config CLKSRC_PXA
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help
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This enables OST0 support available on PXA and SA-11x0
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platforms.
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config H8300_TMR16
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bool
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config H8300_TPU
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bool
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endmenu
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@ -52,3 +52,6 @@ obj-$(CONFIG_ARCH_INTEGRATOR_AP) += timer-integrator-ap.o
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obj-$(CONFIG_CLKSRC_VERSATILE) += versatile.o
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obj-$(CONFIG_CLKSRC_MIPS_GIC) += mips-gic-timer.o
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obj-$(CONFIG_ASM9260_TIMER) += asm9260_timer.o
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obj-$(CONFIG_H8300) += h8300_timer8.o
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obj-$(CONFIG_H8300_TMR16) += h8300_timer16.o
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obj-$(CONFIG_H8300_TPU) += h8300_tpu.o
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@ -0,0 +1,254 @@
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/*
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* H8/300 16bit Timer driver
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*
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* Copyright 2015 Yoshinori Sato <ysato@users.sourcefoge.jp>
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*/
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#include <linux/errno.h>
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#include <linux/kernel.h>
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#include <linux/param.h>
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#include <linux/string.h>
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#include <linux/slab.h>
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#include <linux/interrupt.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/clocksource.h>
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#include <linux/module.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#include <asm/segment.h>
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#include <asm/irq.h>
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#define TSTR 0
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#define TSNC 1
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#define TMDR 2
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#define TOLR 3
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#define TISRA 4
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#define TISRB 5
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#define TISRC 6
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#define TCR 0
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#define TIOR 1
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#define TCNT 2
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#define GRA 4
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#define GRB 6
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#define FLAG_REPROGRAM (1 << 0)
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#define FLAG_SKIPEVENT (1 << 1)
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#define FLAG_IRQCONTEXT (1 << 2)
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#define FLAG_STARTED (1 << 3)
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#define ONESHOT 0
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#define PERIODIC 1
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#define RELATIVE 0
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#define ABSOLUTE 1
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struct timer16_priv {
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struct platform_device *pdev;
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struct clocksource cs;
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struct irqaction irqaction;
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unsigned long total_cycles;
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unsigned long mapbase;
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unsigned long mapcommon;
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unsigned long flags;
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unsigned short gra;
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unsigned short cs_enabled;
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unsigned char enb;
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unsigned char imfa;
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unsigned char imiea;
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unsigned char ovf;
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raw_spinlock_t lock;
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struct clk *clk;
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};
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static unsigned long timer16_get_counter(struct timer16_priv *p)
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{
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unsigned long v1, v2, v3;
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int o1, o2;
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o1 = ctrl_inb(p->mapcommon + TISRC) & p->ovf;
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/* Make sure the timer value is stable. Stolen from acpi_pm.c */
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do {
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o2 = o1;
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v1 = ctrl_inw(p->mapbase + TCNT);
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v2 = ctrl_inw(p->mapbase + TCNT);
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v3 = ctrl_inw(p->mapbase + TCNT);
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o1 = ctrl_inb(p->mapcommon + TISRC) & p->ovf;
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} while (unlikely((o1 != o2) || (v1 > v2 && v1 < v3)
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|| (v2 > v3 && v2 < v1) || (v3 > v1 && v3 < v2)));
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v2 |= 0x10000;
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return v2;
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}
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static irqreturn_t timer16_interrupt(int irq, void *dev_id)
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{
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struct timer16_priv *p = (struct timer16_priv *)dev_id;
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ctrl_outb(ctrl_inb(p->mapcommon + TISRA) & ~p->imfa,
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p->mapcommon + TISRA);
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p->total_cycles += 0x10000;
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return IRQ_HANDLED;
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}
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static inline struct timer16_priv *cs_to_priv(struct clocksource *cs)
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{
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return container_of(cs, struct timer16_priv, cs);
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}
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static cycle_t timer16_clocksource_read(struct clocksource *cs)
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{
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struct timer16_priv *p = cs_to_priv(cs);
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unsigned long flags, raw;
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unsigned long value;
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raw_spin_lock_irqsave(&p->lock, flags);
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value = p->total_cycles;
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raw = timer16_get_counter(p);
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raw_spin_unlock_irqrestore(&p->lock, flags);
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return value + raw;
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}
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static int timer16_enable(struct clocksource *cs)
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{
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struct timer16_priv *p = cs_to_priv(cs);
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WARN_ON(p->cs_enabled);
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p->total_cycles = 0;
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ctrl_outw(0x0000, p->mapbase + TCNT);
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ctrl_outb(0x83, p->mapbase + TCR);
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ctrl_outb(ctrl_inb(p->mapcommon + TSTR) | p->enb,
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p->mapcommon + TSTR);
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p->cs_enabled = true;
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return 0;
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}
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static void timer16_disable(struct clocksource *cs)
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{
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struct timer16_priv *p = cs_to_priv(cs);
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WARN_ON(!p->cs_enabled);
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ctrl_outb(ctrl_inb(p->mapcommon + TSTR) & ~p->enb,
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p->mapcommon + TSTR);
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p->cs_enabled = false;
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}
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#define REG_CH 0
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#define REG_COMM 1
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static int timer16_setup(struct timer16_priv *p, struct platform_device *pdev)
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{
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struct resource *res[2];
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int ret, irq;
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unsigned int ch;
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memset(p, 0, sizeof(*p));
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p->pdev = pdev;
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res[REG_CH] = platform_get_resource(p->pdev,
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IORESOURCE_MEM, REG_CH);
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res[REG_COMM] = platform_get_resource(p->pdev,
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IORESOURCE_MEM, REG_COMM);
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if (!res[REG_CH] || !res[REG_COMM]) {
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dev_err(&p->pdev->dev, "failed to get I/O memory\n");
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return -ENXIO;
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}
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irq = platform_get_irq(p->pdev, 0);
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if (irq < 0) {
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dev_err(&p->pdev->dev, "failed to get irq\n");
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return irq;
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}
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p->clk = clk_get(&p->pdev->dev, "fck");
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if (IS_ERR(p->clk)) {
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dev_err(&p->pdev->dev, "can't get clk\n");
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return PTR_ERR(p->clk);
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}
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of_property_read_u32(p->pdev->dev.of_node, "renesas,channel", &ch);
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p->pdev = pdev;
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p->mapbase = res[REG_CH]->start;
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p->mapcommon = res[REG_COMM]->start;
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p->enb = 1 << ch;
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p->imfa = 1 << ch;
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p->imiea = 1 << (4 + ch);
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p->cs.name = pdev->name;
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p->cs.rating = 200;
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p->cs.read = timer16_clocksource_read;
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p->cs.enable = timer16_enable;
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p->cs.disable = timer16_disable;
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p->cs.mask = CLOCKSOURCE_MASK(sizeof(unsigned long) * 8);
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p->cs.flags = CLOCK_SOURCE_IS_CONTINUOUS;
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ret = request_irq(irq, timer16_interrupt,
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IRQF_TIMER, pdev->name, p);
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if (ret < 0) {
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dev_err(&p->pdev->dev, "failed to request irq %d\n", irq);
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return ret;
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}
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clocksource_register_hz(&p->cs, clk_get_rate(p->clk) / 8);
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return 0;
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}
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static int timer16_probe(struct platform_device *pdev)
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{
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struct timer16_priv *p = platform_get_drvdata(pdev);
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if (p) {
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dev_info(&pdev->dev, "kept as earlytimer\n");
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return 0;
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}
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p = devm_kzalloc(&pdev->dev, sizeof(*p), GFP_KERNEL);
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if (!p)
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return -ENOMEM;
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return timer16_setup(p, pdev);
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}
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static int timer16_remove(struct platform_device *pdev)
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{
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return -EBUSY;
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}
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static const struct of_device_id timer16_of_table[] = {
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{ .compatible = "renesas,16bit-timer" },
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{ }
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};
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static struct platform_driver timer16_driver = {
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.probe = timer16_probe,
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.remove = timer16_remove,
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.driver = {
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.name = "h8300h-16timer",
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.of_match_table = of_match_ptr(timer16_of_table),
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}
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};
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static int __init timer16_init(void)
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{
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return platform_driver_register(&timer16_driver);
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}
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static void __exit timer16_exit(void)
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{
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platform_driver_unregister(&timer16_driver);
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}
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subsys_initcall(timer16_init);
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module_exit(timer16_exit);
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MODULE_AUTHOR("Yoshinori Sato");
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MODULE_DESCRIPTION("H8/300H 16bit Timer Driver");
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MODULE_LICENSE("GPL v2");
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@ -0,0 +1,313 @@
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/*
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* linux/arch/h8300/kernel/cpu/timer/timer8.c
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*
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* Yoshinori Sato <ysato@users.sourcefoge.jp>
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*
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* 8bit Timer driver
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*
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*/
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#include <linux/errno.h>
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/interrupt.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <linux/clockchips.h>
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#include <linux/module.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#include <asm/irq.h>
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#define _8TCR 0
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#define _8TCSR 2
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#define TCORA 4
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#define TCORB 6
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#define _8TCNT 8
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#define FLAG_REPROGRAM (1 << 0)
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#define FLAG_SKIPEVENT (1 << 1)
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#define FLAG_IRQCONTEXT (1 << 2)
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#define FLAG_STARTED (1 << 3)
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#define ONESHOT 0
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#define PERIODIC 1
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#define RELATIVE 0
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#define ABSOLUTE 1
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struct timer8_priv {
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struct platform_device *pdev;
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struct clock_event_device ced;
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struct irqaction irqaction;
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unsigned long mapbase;
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raw_spinlock_t lock;
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unsigned long flags;
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unsigned int rate;
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unsigned int tcora;
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struct clk *pclk;
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};
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static unsigned long timer8_get_counter(struct timer8_priv *p)
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{
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unsigned long v1, v2, v3;
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int o1, o2;
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o1 = ctrl_inb(p->mapbase + _8TCSR) & 0x20;
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/* Make sure the timer value is stable. Stolen from acpi_pm.c */
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do {
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o2 = o1;
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v1 = ctrl_inw(p->mapbase + _8TCNT);
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v2 = ctrl_inw(p->mapbase + _8TCNT);
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v3 = ctrl_inw(p->mapbase + _8TCNT);
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o1 = ctrl_inb(p->mapbase + _8TCSR) & 0x20;
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} while (unlikely((o1 != o2) || (v1 > v2 && v1 < v3)
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|| (v2 > v3 && v2 < v1) || (v3 > v1 && v3 < v2)));
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v2 |= o1 << 10;
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return v2;
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}
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static irqreturn_t timer8_interrupt(int irq, void *dev_id)
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{
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struct timer8_priv *p = dev_id;
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ctrl_outb(ctrl_inb(p->mapbase + _8TCSR) & ~0x40,
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p->mapbase + _8TCSR);
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p->flags |= FLAG_IRQCONTEXT;
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ctrl_outw(p->tcora, p->mapbase + TCORA);
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if (!(p->flags & FLAG_SKIPEVENT)) {
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if (p->ced.mode == CLOCK_EVT_MODE_ONESHOT)
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ctrl_outw(0x0000, p->mapbase + _8TCR);
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p->ced.event_handler(&p->ced);
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}
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p->flags &= ~(FLAG_SKIPEVENT | FLAG_IRQCONTEXT);
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return IRQ_HANDLED;
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}
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static void timer8_set_next(struct timer8_priv *p, unsigned long delta)
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{
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unsigned long flags;
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unsigned long now;
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raw_spin_lock_irqsave(&p->lock, flags);
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if (delta >= 0x10000)
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dev_warn(&p->pdev->dev, "delta out of range\n");
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now = timer8_get_counter(p);
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p->tcora = delta;
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ctrl_outb(ctrl_inb(p->mapbase + _8TCR) | 0x40, p->mapbase + _8TCR);
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if (delta > now)
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ctrl_outw(delta, p->mapbase + TCORA);
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else
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ctrl_outw(now + 1, p->mapbase + TCORA);
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raw_spin_unlock_irqrestore(&p->lock, flags);
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}
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static int timer8_enable(struct timer8_priv *p)
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{
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p->rate = clk_get_rate(p->pclk) / 64;
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ctrl_outw(0xffff, p->mapbase + TCORA);
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ctrl_outw(0x0000, p->mapbase + _8TCNT);
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ctrl_outw(0x0c02, p->mapbase + _8TCR);
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return 0;
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}
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static int timer8_start(struct timer8_priv *p)
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{
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int ret = 0;
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unsigned long flags;
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raw_spin_lock_irqsave(&p->lock, flags);
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if (!(p->flags & FLAG_STARTED))
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ret = timer8_enable(p);
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if (ret)
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goto out;
|
||||
p->flags |= FLAG_STARTED;
|
||||
|
||||
out:
|
||||
raw_spin_unlock_irqrestore(&p->lock, flags);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void timer8_stop(struct timer8_priv *p)
|
||||
{
|
||||
unsigned long flags;
|
||||
|
||||
raw_spin_lock_irqsave(&p->lock, flags);
|
||||
|
||||
ctrl_outw(0x0000, p->mapbase + _8TCR);
|
||||
|
||||
raw_spin_unlock_irqrestore(&p->lock, flags);
|
||||
}
|
||||
|
||||
static inline struct timer8_priv *ced_to_priv(struct clock_event_device *ced)
|
||||
{
|
||||
return container_of(ced, struct timer8_priv, ced);
|
||||
}
|
||||
|
||||
static void timer8_clock_event_start(struct timer8_priv *p, int periodic)
|
||||
{
|
||||
struct clock_event_device *ced = &p->ced;
|
||||
|
||||
timer8_start(p);
|
||||
|
||||
ced->shift = 32;
|
||||
ced->mult = div_sc(p->rate, NSEC_PER_SEC, ced->shift);
|
||||
ced->max_delta_ns = clockevent_delta2ns(0xffff, ced);
|
||||
ced->min_delta_ns = clockevent_delta2ns(0x0001, ced);
|
||||
|
||||
timer8_set_next(p, periodic?(p->rate + HZ/2) / HZ:0x10000);
|
||||
}
|
||||
|
||||
static void timer8_clock_event_mode(enum clock_event_mode mode,
|
||||
struct clock_event_device *ced)
|
||||
{
|
||||
struct timer8_priv *p = ced_to_priv(ced);
|
||||
|
||||
switch (mode) {
|
||||
case CLOCK_EVT_MODE_PERIODIC:
|
||||
dev_info(&p->pdev->dev, "used for periodic clock events\n");
|
||||
timer8_stop(p);
|
||||
timer8_clock_event_start(p, PERIODIC);
|
||||
break;
|
||||
case CLOCK_EVT_MODE_ONESHOT:
|
||||
dev_info(&p->pdev->dev, "used for oneshot clock events\n");
|
||||
timer8_stop(p);
|
||||
timer8_clock_event_start(p, ONESHOT);
|
||||
break;
|
||||
case CLOCK_EVT_MODE_SHUTDOWN:
|
||||
case CLOCK_EVT_MODE_UNUSED:
|
||||
timer8_stop(p);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
static int timer8_clock_event_next(unsigned long delta,
|
||||
struct clock_event_device *ced)
|
||||
{
|
||||
struct timer8_priv *p = ced_to_priv(ced);
|
||||
|
||||
BUG_ON(ced->mode != CLOCK_EVT_MODE_ONESHOT);
|
||||
timer8_set_next(p, delta - 1);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int timer8_setup(struct timer8_priv *p,
|
||||
struct platform_device *pdev)
|
||||
{
|
||||
struct resource *res;
|
||||
int irq;
|
||||
int ret;
|
||||
|
||||
memset(p, 0, sizeof(*p));
|
||||
p->pdev = pdev;
|
||||
|
||||
res = platform_get_resource(p->pdev, IORESOURCE_MEM, 0);
|
||||
if (!res) {
|
||||
dev_err(&p->pdev->dev, "failed to get I/O memory\n");
|
||||
return -ENXIO;
|
||||
}
|
||||
|
||||
irq = platform_get_irq(p->pdev, 0);
|
||||
if (irq < 0) {
|
||||
dev_err(&p->pdev->dev, "failed to get irq\n");
|
||||
return -ENXIO;
|
||||
}
|
||||
|
||||
p->mapbase = res->start;
|
||||
|
||||
p->irqaction.name = dev_name(&p->pdev->dev);
|
||||
p->irqaction.handler = timer8_interrupt;
|
||||
p->irqaction.dev_id = p;
|
||||
p->irqaction.flags = IRQF_TIMER;
|
||||
|
||||
p->pclk = clk_get(&p->pdev->dev, "fck");
|
||||
if (IS_ERR(p->pclk)) {
|
||||
dev_err(&p->pdev->dev, "can't get clk\n");
|
||||
return PTR_ERR(p->pclk);
|
||||
}
|
||||
|
||||
p->ced.name = pdev->name;
|
||||
p->ced.features = CLOCK_EVT_FEAT_PERIODIC |
|
||||
CLOCK_EVT_FEAT_ONESHOT;
|
||||
p->ced.rating = 200;
|
||||
p->ced.cpumask = cpumask_of(0);
|
||||
p->ced.set_next_event = timer8_clock_event_next;
|
||||
p->ced.set_mode = timer8_clock_event_mode;
|
||||
|
||||
ret = setup_irq(irq, &p->irqaction);
|
||||
if (ret < 0) {
|
||||
dev_err(&p->pdev->dev,
|
||||
"failed to request irq %d\n", irq);
|
||||
return ret;
|
||||
}
|
||||
clockevents_register_device(&p->ced);
|
||||
platform_set_drvdata(pdev, p);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int timer8_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct timer8_priv *p = platform_get_drvdata(pdev);
|
||||
|
||||
if (p) {
|
||||
dev_info(&pdev->dev, "kept as earlytimer\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
p = devm_kzalloc(&pdev->dev, sizeof(*p), GFP_KERNEL);
|
||||
if (!p)
|
||||
return -ENOMEM;
|
||||
|
||||
return timer8_setup(p, pdev);
|
||||
}
|
||||
|
||||
static int timer8_remove(struct platform_device *pdev)
|
||||
{
|
||||
return -EBUSY;
|
||||
}
|
||||
|
||||
static const struct of_device_id timer8_of_table[] __maybe_unused = {
|
||||
{ .compatible = "renesas,8bit-timer" },
|
||||
{ }
|
||||
};
|
||||
|
||||
MODULE_DEVICE_TABLE(of, sh_cmt_of_table);
|
||||
static struct platform_driver timer8_driver = {
|
||||
.probe = timer8_probe,
|
||||
.remove = timer8_remove,
|
||||
.driver = {
|
||||
.name = "h8300-8timer",
|
||||
.of_match_table = of_match_ptr(timer8_of_table),
|
||||
}
|
||||
};
|
||||
|
||||
static int __init timer8_init(void)
|
||||
{
|
||||
return platform_driver_register(&timer8_driver);
|
||||
}
|
||||
|
||||
static void __exit timer8_exit(void)
|
||||
{
|
||||
platform_driver_unregister(&timer8_driver);
|
||||
}
|
||||
|
||||
subsys_initcall(timer8_init);
|
||||
module_exit(timer8_exit);
|
||||
MODULE_AUTHOR("Yoshinori Sato");
|
||||
MODULE_DESCRIPTION("H8/300 8bit Timer Driver");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
|
|
@ -0,0 +1,207 @@
|
|||
/*
|
||||
* H8/300 TPU Driver
|
||||
*
|
||||
* Copyright 2015 Yoshinori Sato <ysato@users.sourcefoge.jp>
|
||||
*
|
||||
*/
|
||||
|
||||
#include <linux/errno.h>
|
||||
#include <linux/sched.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/clocksource.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/of.h>
|
||||
|
||||
#include <asm/irq.h>
|
||||
|
||||
#define TCR 0
|
||||
#define TMDR 1
|
||||
#define TIOR 2
|
||||
#define TER 4
|
||||
#define TSR 5
|
||||
#define TCNT 6
|
||||
#define TGRA 8
|
||||
#define TGRB 10
|
||||
#define TGRC 12
|
||||
#define TGRD 14
|
||||
|
||||
struct tpu_priv {
|
||||
struct platform_device *pdev;
|
||||
struct clocksource cs;
|
||||
struct clk *clk;
|
||||
unsigned long mapbase1;
|
||||
unsigned long mapbase2;
|
||||
raw_spinlock_t lock;
|
||||
unsigned int cs_enabled;
|
||||
};
|
||||
|
||||
static inline unsigned long read_tcnt32(struct tpu_priv *p)
|
||||
{
|
||||
unsigned long tcnt;
|
||||
|
||||
tcnt = ctrl_inw(p->mapbase1 + TCNT) << 16;
|
||||
tcnt |= ctrl_inw(p->mapbase2 + TCNT);
|
||||
return tcnt;
|
||||
}
|
||||
|
||||
static int tpu_get_counter(struct tpu_priv *p, unsigned long long *val)
|
||||
{
|
||||
unsigned long v1, v2, v3;
|
||||
int o1, o2;
|
||||
|
||||
o1 = ctrl_inb(p->mapbase1 + TSR) & 0x10;
|
||||
|
||||
/* Make sure the timer value is stable. Stolen from acpi_pm.c */
|
||||
do {
|
||||
o2 = o1;
|
||||
v1 = read_tcnt32(p);
|
||||
v2 = read_tcnt32(p);
|
||||
v3 = read_tcnt32(p);
|
||||
o1 = ctrl_inb(p->mapbase1 + TSR) & 0x10;
|
||||
} while (unlikely((o1 != o2) || (v1 > v2 && v1 < v3)
|
||||
|| (v2 > v3 && v2 < v1) || (v3 > v1 && v3 < v2)));
|
||||
|
||||
*val = v2;
|
||||
return o1;
|
||||
}
|
||||
|
||||
static inline struct tpu_priv *cs_to_priv(struct clocksource *cs)
|
||||
{
|
||||
return container_of(cs, struct tpu_priv, cs);
|
||||
}
|
||||
|
||||
static cycle_t tpu_clocksource_read(struct clocksource *cs)
|
||||
{
|
||||
struct tpu_priv *p = cs_to_priv(cs);
|
||||
unsigned long flags;
|
||||
unsigned long long value;
|
||||
|
||||
raw_spin_lock_irqsave(&p->lock, flags);
|
||||
if (tpu_get_counter(p, &value))
|
||||
value += 0x100000000;
|
||||
raw_spin_unlock_irqrestore(&p->lock, flags);
|
||||
|
||||
return value;
|
||||
}
|
||||
|
||||
static int tpu_clocksource_enable(struct clocksource *cs)
|
||||
{
|
||||
struct tpu_priv *p = cs_to_priv(cs);
|
||||
|
||||
WARN_ON(p->cs_enabled);
|
||||
|
||||
ctrl_outw(0, p->mapbase1 + TCNT);
|
||||
ctrl_outw(0, p->mapbase2 + TCNT);
|
||||
ctrl_outb(0x0f, p->mapbase1 + TCR);
|
||||
ctrl_outb(0x03, p->mapbase2 + TCR);
|
||||
|
||||
p->cs_enabled = true;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void tpu_clocksource_disable(struct clocksource *cs)
|
||||
{
|
||||
struct tpu_priv *p = cs_to_priv(cs);
|
||||
|
||||
WARN_ON(!p->cs_enabled);
|
||||
|
||||
ctrl_outb(0, p->mapbase1 + TCR);
|
||||
ctrl_outb(0, p->mapbase2 + TCR);
|
||||
p->cs_enabled = false;
|
||||
}
|
||||
|
||||
#define CH_L 0
|
||||
#define CH_H 1
|
||||
|
||||
static int __init tpu_setup(struct tpu_priv *p, struct platform_device *pdev)
|
||||
{
|
||||
struct resource *res[2];
|
||||
|
||||
memset(p, 0, sizeof(*p));
|
||||
p->pdev = pdev;
|
||||
|
||||
res[CH_L] = platform_get_resource(p->pdev, IORESOURCE_MEM, CH_L);
|
||||
res[CH_H] = platform_get_resource(p->pdev, IORESOURCE_MEM, CH_H);
|
||||
if (!res[CH_L] || !res[CH_H]) {
|
||||
dev_err(&p->pdev->dev, "failed to get I/O memory\n");
|
||||
return -ENXIO;
|
||||
}
|
||||
|
||||
p->clk = clk_get(&p->pdev->dev, "fck");
|
||||
if (IS_ERR(p->clk)) {
|
||||
dev_err(&p->pdev->dev, "can't get clk\n");
|
||||
return PTR_ERR(p->clk);
|
||||
}
|
||||
|
||||
p->mapbase1 = res[CH_L]->start;
|
||||
p->mapbase2 = res[CH_H]->start;
|
||||
|
||||
p->cs.name = pdev->name;
|
||||
p->cs.rating = 200;
|
||||
p->cs.read = tpu_clocksource_read;
|
||||
p->cs.enable = tpu_clocksource_enable;
|
||||
p->cs.disable = tpu_clocksource_disable;
|
||||
p->cs.mask = CLOCKSOURCE_MASK(sizeof(unsigned long) * 8);
|
||||
p->cs.flags = CLOCK_SOURCE_IS_CONTINUOUS;
|
||||
clocksource_register_hz(&p->cs, clk_get_rate(p->clk) / 64);
|
||||
platform_set_drvdata(pdev, p);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int tpu_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct tpu_priv *p = platform_get_drvdata(pdev);
|
||||
|
||||
if (p) {
|
||||
dev_info(&pdev->dev, "kept as earlytimer\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
p = devm_kzalloc(&pdev->dev, sizeof(*p), GFP_KERNEL);
|
||||
if (!p)
|
||||
return -ENOMEM;
|
||||
|
||||
return tpu_setup(p, pdev);
|
||||
}
|
||||
|
||||
static int tpu_remove(struct platform_device *pdev)
|
||||
{
|
||||
return -EBUSY;
|
||||
}
|
||||
|
||||
static const struct of_device_id tpu_of_table[] = {
|
||||
{ .compatible = "renesas,tpu" },
|
||||
{ }
|
||||
};
|
||||
|
||||
static struct platform_driver tpu_driver = {
|
||||
.probe = tpu_probe,
|
||||
.remove = tpu_remove,
|
||||
.driver = {
|
||||
.name = "h8s-tpu",
|
||||
.of_match_table = of_match_ptr(tpu_of_table),
|
||||
}
|
||||
};
|
||||
|
||||
static int __init tpu_init(void)
|
||||
{
|
||||
return platform_driver_register(&tpu_driver);
|
||||
}
|
||||
|
||||
static void __exit tpu_exit(void)
|
||||
{
|
||||
platform_driver_unregister(&tpu_driver);
|
||||
}
|
||||
|
||||
subsys_initcall(tpu_init);
|
||||
module_exit(tpu_exit);
|
||||
MODULE_AUTHOR("Yoshinori Sato");
|
||||
MODULE_DESCRIPTION("H8S Timer Pulse Unit Driver");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
Loading…
Reference in New Issue