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Drivers: hv: vmbus: Remove x86 MSR refs in arch independent code 

In architecture independent code for manipulating Hyper-V synthetic timers
and synthetic interrupts, pass in an ordinal number identifying the timer
or interrupt, rather than an actual MSR register address.  Then in
x86/x64 specific code, map the ordinal number to the appropriate MSR.
This change facilitates the introduction of an ARM64 version of Hyper-V,
which uses the same synthetic timers and interrupts, but a different
mechanism for accessing them.

Signed-off-by: Michael Kelley <mikelley@microsoft.com>
Signed-off-by: K. Y. Srinivasan <kys@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Michael Kelley 2018-06-05 13:37:53 -07:00 committed by Greg Kroah-Hartman
parent 5022912872
commit 619a4c8b2b
2 changed files with 16 additions and 16 deletions
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12
arch/x86/include/asm/mshyperv.h
View File

@ -75,8 +75,10 @@ static inline void vmbus_signal_eom(struct hv_message *msg, u32 old_msg_type)
} }
} }
#define hv_init_timer(timer, tick) wrmsrl(timer, tick) #define hv_init_timer(timer, tick) \
#define hv_init_timer_config(config, val) wrmsrl(config, val) wrmsrl(HV_X64_MSR_STIMER0_COUNT + (2*timer), tick)
#define hv_init_timer_config(timer, val) \
wrmsrl(HV_X64_MSR_STIMER0_CONFIG + (2*timer), val)
#define hv_get_simp(val) rdmsrl(HV_X64_MSR_SIMP, val) #define hv_get_simp(val) rdmsrl(HV_X64_MSR_SIMP, val)
#define hv_set_simp(val) wrmsrl(HV_X64_MSR_SIMP, val) #define hv_set_simp(val) wrmsrl(HV_X64_MSR_SIMP, val)
@ -89,8 +91,10 @@ static inline void vmbus_signal_eom(struct hv_message *msg, u32 old_msg_type)
#define hv_get_vp_index(index) rdmsrl(HV_X64_MSR_VP_INDEX, index) #define hv_get_vp_index(index) rdmsrl(HV_X64_MSR_VP_INDEX, index)
#define hv_get_synint_state(int_num, val) rdmsrl(int_num, val) #define hv_get_synint_state(int_num, val) \
#define hv_set_synint_state(int_num, val) wrmsrl(int_num, val) rdmsrl(HV_X64_MSR_SINT0 + int_num, val)
#define hv_set_synint_state(int_num, val) \
wrmsrl(HV_X64_MSR_SINT0 + int_num, val)
void hyperv_callback_vector(void); void hyperv_callback_vector(void);
void hyperv_reenlightenment_vector(void); void hyperv_reenlightenment_vector(void);

20
drivers/hv/hv.c
View File

@ -127,14 +127,14 @@ static int hv_ce_set_next_event(unsigned long delta,
current_tick = hyperv_cs->read(NULL); current_tick = hyperv_cs->read(NULL);
current_tick += delta; current_tick += delta;
hv_init_timer(HV_X64_MSR_STIMER0_COUNT, current_tick); hv_init_timer(0, current_tick);
return 0; return 0;
} }
static int hv_ce_shutdown(struct clock_event_device *evt) static int hv_ce_shutdown(struct clock_event_device *evt)
{ {
hv_init_timer(HV_X64_MSR_STIMER0_COUNT, 0); hv_init_timer(0, 0);
hv_init_timer_config(HV_X64_MSR_STIMER0_CONFIG, 0); hv_init_timer_config(0, 0);
if (direct_mode_enabled) if (direct_mode_enabled)
hv_disable_stimer0_percpu_irq(stimer0_irq); hv_disable_stimer0_percpu_irq(stimer0_irq);
@ -164,7 +164,7 @@ static int hv_ce_set_oneshot(struct clock_event_device *evt)
timer_cfg.direct_mode = 0; timer_cfg.direct_mode = 0;
timer_cfg.sintx = VMBUS_MESSAGE_SINT; timer_cfg.sintx = VMBUS_MESSAGE_SINT;
} }
hv_init_timer_config(HV_X64_MSR_STIMER0_CONFIG, timer_cfg.as_uint64); hv_init_timer_config(0, timer_cfg.as_uint64);
return 0; return 0;
} }
@ -298,8 +298,7 @@ int hv_synic_init(unsigned int cpu)
hv_set_siefp(siefp.as_uint64); hv_set_siefp(siefp.as_uint64);
/* Setup the shared SINT. */ /* Setup the shared SINT. */
hv_get_synint_state(HV_X64_MSR_SINT0 + VMBUS_MESSAGE_SINT, hv_get_synint_state(VMBUS_MESSAGE_SINT, shared_sint.as_uint64);
shared_sint.as_uint64);
shared_sint.vector = HYPERVISOR_CALLBACK_VECTOR; shared_sint.vector = HYPERVISOR_CALLBACK_VECTOR;
shared_sint.masked = false; shared_sint.masked = false;
@ -308,8 +307,7 @@ int hv_synic_init(unsigned int cpu)
else else
shared_sint.auto_eoi = true; shared_sint.auto_eoi = true;
hv_set_synint_state(HV_X64_MSR_SINT0 + VMBUS_MESSAGE_SINT, hv_set_synint_state(VMBUS_MESSAGE_SINT, shared_sint.as_uint64);
shared_sint.as_uint64);
/* Enable the global synic bit */ /* Enable the global synic bit */
hv_get_synic_state(sctrl.as_uint64); hv_get_synic_state(sctrl.as_uint64);
@ -405,15 +403,13 @@ int hv_synic_cleanup(unsigned int cpu)
put_cpu_ptr(hv_cpu); put_cpu_ptr(hv_cpu);
} }
hv_get_synint_state(HV_X64_MSR_SINT0 + VMBUS_MESSAGE_SINT, hv_get_synint_state(VMBUS_MESSAGE_SINT, shared_sint.as_uint64);
shared_sint.as_uint64);
shared_sint.masked = 1; shared_sint.masked = 1;
/* Need to correctly cleanup in the case of SMP!!! */ /* Need to correctly cleanup in the case of SMP!!! */
/* Disable the interrupt */ /* Disable the interrupt */
hv_set_synint_state(HV_X64_MSR_SINT0 + VMBUS_MESSAGE_SINT, hv_set_synint_state(VMBUS_MESSAGE_SINT, shared_sint.as_uint64);
shared_sint.as_uint64);
hv_get_simp(simp.as_uint64); hv_get_simp(simp.as_uint64);
simp.simp_enabled = 0; simp.simp_enabled = 0;