net/mlx5e: Take HW interrupt trigger into a function
mlx5e_trigger_irq posts a NOP to the ICO SQ just to trigger an IRQ and enter the NAPI poll on the right CPU according to the affinity. Use it in mlx5e_activate_rq. Signed-off-by: Maxim Mikityanskiy <maximmi@mellanox.com> Reviewed-by: Tariq Toukan <tariqt@mellanox.com> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
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@ -778,6 +778,7 @@ netdev_tx_t mlx5e_xmit(struct sk_buff *skb, struct net_device *dev);
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netdev_tx_t mlx5e_sq_xmit(struct mlx5e_txqsq *sq, struct sk_buff *skb,
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struct mlx5e_tx_wqe *wqe, u16 pi, bool xmit_more);
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void mlx5e_trigger_irq(struct mlx5e_icosq *sq);
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void mlx5e_completion_event(struct mlx5_core_cq *mcq);
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void mlx5e_cq_error_event(struct mlx5_core_cq *mcq, enum mlx5_event event);
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int mlx5e_napi_poll(struct napi_struct *napi, int budget);
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@ -877,16 +877,8 @@ static int mlx5e_open_rq(struct mlx5e_channel *c,
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static void mlx5e_activate_rq(struct mlx5e_rq *rq)
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{
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struct mlx5e_icosq *sq = &rq->channel->icosq;
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struct mlx5_wq_cyc *wq = &sq->wq;
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struct mlx5e_tx_wqe *nopwqe;
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u16 pi = mlx5_wq_cyc_ctr2ix(wq, sq->pc);
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set_bit(MLX5E_RQ_STATE_ENABLED, &rq->state);
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sq->db.ico_wqe[pi].opcode = MLX5_OPCODE_NOP;
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nopwqe = mlx5e_post_nop(wq, sq->sqn, &sq->pc);
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mlx5e_notify_hw(wq, sq->pc, sq->uar_map, &nopwqe->ctrl);
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mlx5e_trigger_irq(&rq->channel->icosq);
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}
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static void mlx5e_deactivate_rq(struct mlx5e_rq *rq)
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@ -71,6 +71,17 @@ static void mlx5e_handle_rx_dim(struct mlx5e_rq *rq)
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net_dim(&rq->dim, dim_sample);
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}
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void mlx5e_trigger_irq(struct mlx5e_icosq *sq)
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{
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struct mlx5_wq_cyc *wq = &sq->wq;
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struct mlx5e_tx_wqe *nopwqe;
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u16 pi = mlx5_wq_cyc_ctr2ix(wq, sq->pc);
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sq->db.ico_wqe[pi].opcode = MLX5_OPCODE_NOP;
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nopwqe = mlx5e_post_nop(wq, sq->sqn, &sq->pc);
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mlx5e_notify_hw(wq, sq->pc, sq->uar_map, &nopwqe->ctrl);
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}
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int mlx5e_napi_poll(struct napi_struct *napi, int budget)
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{
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struct mlx5e_channel *c = container_of(napi, struct mlx5e_channel,
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