iommu/vt-d: Update first level super page capability
First-level translation may map input addresses to 4-KByte pages, 2-MByte pages, or 1-GByte pages. Support for 4-KByte pages and 2-Mbyte pages are mandatory for first-level translation. Hardware support for 1-GByte page is reported through the FL1GP field in the Capability Register. Signed-off-by: Lu Baolu <baolu.lu@linux.intel.com> Signed-off-by: Joerg Roedel <jroedel@suse.de>
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@ -685,11 +685,12 @@ static int domain_update_iommu_snooping(struct intel_iommu *skip)
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return ret;
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}
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static int domain_update_iommu_superpage(struct intel_iommu *skip)
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static int domain_update_iommu_superpage(struct dmar_domain *domain,
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struct intel_iommu *skip)
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{
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struct dmar_drhd_unit *drhd;
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struct intel_iommu *iommu;
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int mask = 0xf;
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int mask = 0x3;
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if (!intel_iommu_superpage) {
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return 0;
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@ -699,7 +700,13 @@ static int domain_update_iommu_superpage(struct intel_iommu *skip)
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rcu_read_lock();
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for_each_active_iommu(iommu, drhd) {
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if (iommu != skip) {
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mask &= cap_super_page_val(iommu->cap);
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if (domain && domain_use_first_level(domain)) {
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if (!cap_fl1gp_support(iommu->cap))
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mask = 0x1;
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} else {
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mask &= cap_super_page_val(iommu->cap);
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}
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if (!mask)
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break;
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}
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@ -714,7 +721,7 @@ static void domain_update_iommu_cap(struct dmar_domain *domain)
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{
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domain_update_iommu_coherency(domain);
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domain->iommu_snooping = domain_update_iommu_snooping(NULL);
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domain->iommu_superpage = domain_update_iommu_superpage(NULL);
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domain->iommu_superpage = domain_update_iommu_superpage(domain, NULL);
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}
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struct context_entry *iommu_context_addr(struct intel_iommu *iommu, u8 bus,
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@ -4604,7 +4611,7 @@ static int intel_iommu_add(struct dmar_drhd_unit *dmaru)
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iommu->name);
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return -ENXIO;
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}
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sp = domain_update_iommu_superpage(iommu) - 1;
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sp = domain_update_iommu_superpage(NULL, iommu) - 1;
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if (sp >= 0 && !(cap_super_page_val(iommu->cap) & (1 << sp))) {
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pr_warn("%s: Doesn't support large page.\n",
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iommu->name);
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