arm64: dts: Add L2 cache topology to Hi6220
This patch adds the L2 cache topology on Hi6220. Hi6220 has two clusters, every cluster has 512KiB L2 cache (32KiB x 16 ways). Signed-off-by: Leo Yan <leo.yan@linaro.org> Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
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@ -83,6 +83,7 @@ cpu0: cpu@0 {
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device_type = "cpu";
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reg = <0x0 0x0>;
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enable-method = "psci";
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next-level-cache = <&CLUSTER0_L2>;
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clocks = <&stub_clock 0>;
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operating-points-v2 = <&cpu_opp_table>;
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cooling-min-level = <4>;
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@ -97,6 +98,7 @@ cpu1: cpu@1 {
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device_type = "cpu";
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reg = <0x0 0x1>;
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enable-method = "psci";
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next-level-cache = <&CLUSTER0_L2>;
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operating-points-v2 = <&cpu_opp_table>;
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cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
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};
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@ -106,6 +108,7 @@ cpu2: cpu@2 {
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device_type = "cpu";
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reg = <0x0 0x2>;
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enable-method = "psci";
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next-level-cache = <&CLUSTER0_L2>;
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operating-points-v2 = <&cpu_opp_table>;
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cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
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};
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@ -115,6 +118,7 @@ cpu3: cpu@3 {
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device_type = "cpu";
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reg = <0x0 0x3>;
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enable-method = "psci";
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next-level-cache = <&CLUSTER0_L2>;
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operating-points-v2 = <&cpu_opp_table>;
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cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
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};
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@ -124,6 +128,7 @@ cpu4: cpu@100 {
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device_type = "cpu";
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reg = <0x0 0x100>;
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enable-method = "psci";
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next-level-cache = <&CLUSTER1_L2>;
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operating-points-v2 = <&cpu_opp_table>;
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cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
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};
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@ -133,6 +138,7 @@ cpu5: cpu@101 {
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device_type = "cpu";
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reg = <0x0 0x101>;
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enable-method = "psci";
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next-level-cache = <&CLUSTER1_L2>;
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operating-points-v2 = <&cpu_opp_table>;
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cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
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};
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@ -142,6 +148,7 @@ cpu6: cpu@102 {
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device_type = "cpu";
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reg = <0x0 0x102>;
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enable-method = "psci";
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next-level-cache = <&CLUSTER1_L2>;
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operating-points-v2 = <&cpu_opp_table>;
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cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
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};
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@ -151,9 +158,18 @@ cpu7: cpu@103 {
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device_type = "cpu";
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reg = <0x0 0x103>;
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enable-method = "psci";
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next-level-cache = <&CLUSTER1_L2>;
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operating-points-v2 = <&cpu_opp_table>;
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cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>;
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};
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CLUSTER0_L2: l2-cache0 {
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compatible = "cache";
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};
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CLUSTER1_L2: l2-cache1 {
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compatible = "cache";
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};
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};
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cpu_opp_table: cpu_opp_table {
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