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arm64: dts: qcom: msm8916: Add CPU frequency scaling support 

Add a CPU OPP table to allow CPU frequency scaling on msm8916 platforms.

Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org>
Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org>
Tested-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Andy Gross <andy.gross@linaro.org>
This commit is contained in:
Georgi Djakov 2018-02-05 16:46:51 +02:00 committed by Andy Gross
parent 025b995f47
commit 65afdf4583
1 changed files with 26 additions and 0 deletions
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26
arch/arm64/boot/dts/qcom/msm8916.dtsi
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@ -113,6 +113,8 @@ CPU0: cpu@0 {
next-level-cache = <&L2_0>;
enable-method = "psci";
cpu-idle-states = <&CPU_SPC>;
clocks = <&apcs 0>;
operating-points-v2 = <&cpu_opp_table>;
};
CPU1: cpu@1 {
@ -122,6 +124,8 @@ CPU1: cpu@1 {
next-level-cache = <&L2_0>;
enable-method = "psci";
cpu-idle-states = <&CPU_SPC>;
clocks = <&apcs 0>;
operating-points-v2 = <&cpu_opp_table>;
};
CPU2: cpu@2 {
@ -131,6 +135,8 @@ CPU2: cpu@2 {
next-level-cache = <&L2_0>;
enable-method = "psci";
cpu-idle-states = <&CPU_SPC>;
clocks = <&apcs 0>;
operating-points-v2 = <&cpu_opp_table>;
};
CPU3: cpu@3 {
@ -140,6 +146,8 @@ CPU3: cpu@3 {
next-level-cache = <&L2_0>;
enable-method = "psci";
cpu-idle-states = <&CPU_SPC>;
clocks = <&apcs 0>;
operating-points-v2 = <&cpu_opp_table>;
};
L2_0: l2-cache {
@ -212,6 +220,24 @@ cpu_crit1: trip1 {
};
cpu_opp_table: cpu_opp_table {
compatible = "operating-points-v2";
opp-shared;
opp-200000000 {
opp-hz = /bits/ 64 <200000000>;
};
opp-400000000 {
opp-hz = /bits/ 64 <400000000>;
};
opp-800000000 {
opp-hz = /bits/ 64 <800000000>;
};
opp-998400000 {
opp-hz = /bits/ 64 <998400000>;
};
};
gpu_opp_table: opp_table {
compatible = "operating-points-v2";