MIPS: Declare MSA MI10 instruction formats
Declare a struct describing the MSA MI10 instruction format used for ld & st instructions, for use by subsequent patches. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-kernel@vger.kernel.org Cc: Markos Chandras <markos.chandras@imgtec.com> Patchwork: https://patchwork.linux-mips.org/patch/10571/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -26,7 +26,7 @@ enum major_op {
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cop0_op, cop1_op, cop2_op, cop1x_op,
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beql_op, bnel_op, blezl_op, bgtzl_op,
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daddi_op, cbcond1_op = daddi_op, daddiu_op, ldl_op, ldr_op,
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spec2_op, jalx_op, mdmx_op, spec3_op,
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spec2_op, jalx_op, mdmx_op, msa_op = mdmx_op, spec3_op,
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lb_op, lh_op, lwl_op, lw_op,
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lbu_op, lhu_op, lwr_op, lwu_op,
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sb_op, sh_op, swl_op, sw_op,
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@ -220,6 +220,24 @@ enum bshfl_func {
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seh_op = 0x18,
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};
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/*
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* func field for MSA MI10 format.
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*/
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enum msa_mi10_func {
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msa_ld_op = 8,
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msa_st_op = 9,
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};
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/*
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* MSA 2 bit format fields.
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*/
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enum msa_2b_fmt {
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msa_fmt_b = 0,
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msa_fmt_h = 1,
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msa_fmt_w = 2,
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msa_fmt_d = 3,
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};
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/*
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* (microMIPS) Major opcodes.
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*/
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@ -611,6 +629,16 @@ struct v_format { /* MDMX vector format */
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;)))))))
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};
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struct msa_mi10_format { /* MSA MI10 */
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__BITFIELD_FIELD(unsigned int opcode : 6,
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__BITFIELD_FIELD(signed int s10 : 10,
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__BITFIELD_FIELD(unsigned int rs : 5,
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__BITFIELD_FIELD(unsigned int wd : 5,
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__BITFIELD_FIELD(unsigned int func : 4,
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__BITFIELD_FIELD(unsigned int df : 2,
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;))))))
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};
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struct spec3_format { /* SPEC3 */
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__BITFIELD_FIELD(unsigned int opcode:6,
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__BITFIELD_FIELD(unsigned int rs:5,
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@ -888,6 +916,7 @@ union mips_instruction {
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struct p_format p_format;
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struct f_format f_format;
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struct ma_format ma_format;
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struct msa_mi10_format msa_mi10_format;
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struct b_format b_format;
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struct ps_format ps_format;
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struct v_format v_format;
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