Merge branch 'v3.19-next/cleanup-samsung' into v3.19-next/mach-exynos
This commit is contained in:
commit
68847edc83
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@ -17,9 +17,6 @@ obj-$(CONFIG_PM_GENERIC_DOMAINS) += pm_domains.o
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obj-$(CONFIG_SMP) += platsmp.o headsmp.o
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obj-$(CONFIG_HOTPLUG_CPU) += hotplug.o
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CFLAGS_hotplug.o += -march=armv7-a
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plus_sec := $(call as-instr,.arch_extension sec,+sec)
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AFLAGS_exynos-smc.o :=-Wa,-march=armv7-a$(plus_sec)
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AFLAGS_sleep.o :=-Wa,-march=armv7-a$(plus_sec)
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@ -139,8 +139,6 @@ extern void exynos_cpu_resume_ns(void);
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extern struct smp_operations exynos_smp_ops;
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extern void exynos_cpu_die(unsigned int cpu);
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/* PMU(Power Management Unit) support */
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#define PMU_TABLE_END (-1U)
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@ -1,91 +0,0 @@
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/*
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* Cloned from linux/arch/arm/mach-realview/hotplug.c
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*
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* Copyright (C) 2002 ARM Ltd.
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* All Rights Reserved
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/smp.h>
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#include <linux/io.h>
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#include <asm/cacheflush.h>
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#include <asm/cp15.h>
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#include <asm/smp_plat.h>
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#include "common.h"
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#include "regs-pmu.h"
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static inline void cpu_leave_lowpower(void)
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{
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unsigned int v;
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asm volatile(
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"mrc p15, 0, %0, c1, c0, 0\n"
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" orr %0, %0, %1\n"
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" mcr p15, 0, %0, c1, c0, 0\n"
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" mrc p15, 0, %0, c1, c0, 1\n"
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" orr %0, %0, %2\n"
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" mcr p15, 0, %0, c1, c0, 1\n"
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: "=&r" (v)
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: "Ir" (CR_C), "Ir" (0x40)
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: "cc");
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}
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static inline void platform_do_lowpower(unsigned int cpu, int *spurious)
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{
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u32 mpidr = cpu_logical_map(cpu);
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u32 core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0);
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for (;;) {
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/* Turn the CPU off on next WFI instruction. */
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exynos_cpu_power_down(core_id);
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wfi();
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if (pen_release == core_id) {
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/*
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* OK, proper wakeup, we're done
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*/
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break;
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}
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/*
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* Getting here, means that we have come out of WFI without
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* having been woken up - this shouldn't happen
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*
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* Just note it happening - when we're woken, we can report
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* its occurrence.
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*/
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(*spurious)++;
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}
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}
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/*
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* platform-specific code to shutdown a CPU
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*
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* Called with IRQs disabled
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*/
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void __ref exynos_cpu_die(unsigned int cpu)
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{
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int spurious = 0;
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v7_exit_coherency_flush(louis);
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platform_do_lowpower(cpu, &spurious);
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/*
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* bring this CPU back into the world of cache
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* coherency, and then restore interrupts
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*/
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cpu_leave_lowpower();
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if (spurious)
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pr_warn("CPU%u: %u spurious wakeup calls\n", cpu, spurious);
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}
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@ -22,6 +22,7 @@
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#include <linux/of_address.h>
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#include <asm/cacheflush.h>
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#include <asm/cp15.h>
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#include <asm/smp_plat.h>
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#include <asm/smp_scu.h>
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#include <asm/firmware.h>
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@ -33,6 +34,88 @@
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extern void exynos4_secondary_startup(void);
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/*
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* Set or clear the USE_DELAYED_RESET_ASSERTION option, set on Exynos4 SoCs
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* during hot-(un)plugging CPUx.
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*
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* The feature can be cleared safely during first boot of secondary CPU.
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*
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* Exynos4 SoCs require setting USE_DELAYED_RESET_ASSERTION during powering
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* down a CPU so the CPU idle clock down feature could properly detect global
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* idle state when CPUx is off.
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*/
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static void exynos_set_delayed_reset_assertion(u32 core_id, bool enable)
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{
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if (soc_is_exynos4()) {
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unsigned int tmp;
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tmp = pmu_raw_readl(EXYNOS_ARM_CORE_OPTION(core_id));
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if (enable)
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tmp |= S5P_USE_DELAYED_RESET_ASSERTION;
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else
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tmp &= ~(S5P_USE_DELAYED_RESET_ASSERTION);
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pmu_raw_writel(tmp, EXYNOS_ARM_CORE_OPTION(core_id));
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}
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}
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#ifdef CONFIG_HOTPLUG_CPU
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static inline void cpu_leave_lowpower(u32 core_id)
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{
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unsigned int v;
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asm volatile(
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"mrc p15, 0, %0, c1, c0, 0\n"
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" orr %0, %0, %1\n"
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" mcr p15, 0, %0, c1, c0, 0\n"
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" mrc p15, 0, %0, c1, c0, 1\n"
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" orr %0, %0, %2\n"
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" mcr p15, 0, %0, c1, c0, 1\n"
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: "=&r" (v)
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: "Ir" (CR_C), "Ir" (0x40)
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: "cc");
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exynos_set_delayed_reset_assertion(core_id, false);
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}
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static inline void platform_do_lowpower(unsigned int cpu, int *spurious)
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{
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u32 mpidr = cpu_logical_map(cpu);
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u32 core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0);
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for (;;) {
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/* Turn the CPU off on next WFI instruction. */
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exynos_cpu_power_down(core_id);
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/*
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* Exynos4 SoCs require setting
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* USE_DELAYED_RESET_ASSERTION so the CPU idle
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* clock down feature could properly detect
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* global idle state when CPUx is off.
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*/
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exynos_set_delayed_reset_assertion(core_id, true);
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wfi();
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if (pen_release == core_id) {
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/*
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* OK, proper wakeup, we're done
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*/
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break;
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}
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/*
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* Getting here, means that we have come out of WFI without
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* having been woken up - this shouldn't happen
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*
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* Just note it happening - when we're woken, we can report
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* its occurrence.
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*/
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(*spurious)++;
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}
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}
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#endif /* CONFIG_HOTPLUG_CPU */
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/**
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* exynos_core_power_down : power down the specified cpu
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* @cpu : the cpu to power down
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@ -260,6 +343,9 @@ static int exynos_boot_secondary(unsigned int cpu, struct task_struct *idle)
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udelay(10);
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}
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/* No harm if this is called during first boot of secondary CPU */
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exynos_set_delayed_reset_assertion(core_id, false);
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/*
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* now the secondary core is starting up let it run its
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* calibrations, then wait for it to finish
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@ -341,6 +427,33 @@ static void __init exynos_smp_prepare_cpus(unsigned int max_cpus)
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}
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}
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#ifdef CONFIG_HOTPLUG_CPU
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/*
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* platform-specific code to shutdown a CPU
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*
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* Called with IRQs disabled
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*/
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static void exynos_cpu_die(unsigned int cpu)
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{
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int spurious = 0;
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u32 mpidr = cpu_logical_map(cpu);
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u32 core_id = MPIDR_AFFINITY_LEVEL(mpidr, 0);
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v7_exit_coherency_flush(louis);
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platform_do_lowpower(cpu, &spurious);
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/*
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* bring this CPU back into the world of cache
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* coherency, and then restore interrupts
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*/
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cpu_leave_lowpower(core_id);
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if (spurious)
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pr_warn("CPU%u: %u spurious wakeup calls\n", cpu, spurious);
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}
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#endif /* CONFIG_HOTPLUG_CPU */
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struct smp_operations exynos_smp_ops __initdata = {
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.smp_init_cpus = exynos_smp_init_cpus,
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.smp_prepare_cpus = exynos_smp_prepare_cpus,
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@ -20,6 +20,7 @@
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#define S5P_USE_STANDBY_WFI0 (1 << 16)
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#define S5P_USE_STANDBY_WFE0 (1 << 24)
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#define S5P_USE_DELAYED_RESET_ASSERTION BIT(12)
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#define EXYNOS_CORE_PO_RESET(n) ((1 << 4) << n)
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#define EXYNOS_WAKEUP_FROM_LOWPWR (1 << 28)
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@ -108,6 +109,8 @@
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(EXYNOS_ARM_CORE0_CONFIGURATION + (0x80 * (_nr)))
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#define EXYNOS_ARM_CORE_STATUS(_nr) \
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(EXYNOS_ARM_CORE_CONFIGURATION(_nr) + 0x4)
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#define EXYNOS_ARM_CORE_OPTION(_nr) \
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(EXYNOS_ARM_CORE_CONFIGURATION(_nr) + 0x8)
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#define EXYNOS_ARM_COMMON_CONFIGURATION 0x2500
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#define EXYNOS_COMMON_CONFIGURATION(_nr) \
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