drm/panel: Add Feiyang FY07024DI26A30-D MIPI-DSI LCD panel
Feiyang FY07024DI26A30-D is 1024x600, 4-lane MIPI-DSI LCD panel. Add panel driver for it. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Sam Ravnborg <sam@ravnborg.org> Tested-by: Bhushan Shah <bshah@kde.org> Tested-by: Merlijn Wajer <merlijn@wizzup.org> Signed-off-by: Thierry Reding <treding@nvidia.com> Link: https://patchwork.freedesktop.org/patch/msgid/20190212204109.3528-2-jagan@amarulasolutions.com
This commit is contained in:
Jagan Teki
Thierry Reding
parent
7f347dd535
commit
69dc678abc
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@ -4822,6 +4822,12 @@ T: git git://anongit.freedesktop.org/drm/drm-misc
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S: Maintained
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F: drivers/gpu/drm/tve200/
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DRM DRIVER FOR FEIYANG FY07024DI26A30-D MIPI-DSI LCD PANELS
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M: Jagan Teki <jagan@amarulasolutions.com>
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S: Maintained
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F: drivers/gpu/drm/panel/panel-feiyang-fy07024di26a30d.c
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F: Documentation/devicetree/bindings/display/panel/feiyang,fy07024di26a30d.txt
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DRM DRIVER FOR ILITEK ILI9225 PANELS
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M: David Lechner <david@lechnology.com>
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S: Maintained
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@ -38,6 +38,15 @@ config DRM_PANEL_SIMPLE
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that it can be automatically turned off when the panel goes into a
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low power state.
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config DRM_PANEL_FEIYANG_FY07024DI26A30D
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tristate "Feiyang FY07024DI26A30-D MIPI-DSI LCD panel"
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depends on OF
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depends on DRM_MIPI_DSI
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depends on BACKLIGHT_CLASS_DEVICE
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help
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Say Y if you want to enable support for panels based on the
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Feiyang FY07024DI26A30-D MIPI-DSI interface.
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config DRM_PANEL_ILITEK_IL9322
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tristate "Ilitek ILI9322 320x240 QVGA panels"
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depends on OF && SPI
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@ -2,6 +2,7 @@
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obj-$(CONFIG_DRM_PANEL_ARM_VERSATILE) += panel-arm-versatile.o
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obj-$(CONFIG_DRM_PANEL_LVDS) += panel-lvds.o
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obj-$(CONFIG_DRM_PANEL_SIMPLE) += panel-simple.o
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obj-$(CONFIG_DRM_PANEL_FEIYANG_FY07024DI26A30D) += panel-feiyang-fy07024di26a30d.o
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obj-$(CONFIG_DRM_PANEL_ILITEK_IL9322) += panel-ilitek-ili9322.o
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obj-$(CONFIG_DRM_PANEL_ILITEK_ILI9881C) += panel-ilitek-ili9881c.o
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obj-$(CONFIG_DRM_PANEL_INNOLUX_P079ZCA) += panel-innolux-p079zca.o
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@ -0,0 +1,272 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2018 Amarula Solutions
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* Author: Jagan Teki <jagan@amarulasolutions.com>
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*/
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#include <drm/drm_mipi_dsi.h>
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#include <drm/drm_modes.h>
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#include <drm/drm_panel.h>
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#include <drm/drm_print.h>
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#include <linux/backlight.h>
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#include <linux/gpio/consumer.h>
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#include <linux/delay.h>
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#include <linux/module.h>
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#include <linux/of_device.h>
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#include <linux/regulator/consumer.h>
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#define FEIYANG_INIT_CMD_LEN 2
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struct feiyang {
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struct drm_panel panel;
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struct mipi_dsi_device *dsi;
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struct backlight_device *backlight;
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struct regulator *dvdd;
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struct regulator *avdd;
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struct gpio_desc *reset;
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};
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static inline struct feiyang *panel_to_feiyang(struct drm_panel *panel)
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{
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return container_of(panel, struct feiyang, panel);
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}
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struct feiyang_init_cmd {
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u8 data[FEIYANG_INIT_CMD_LEN];
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};
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static const struct feiyang_init_cmd feiyang_init_cmds[] = {
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{ .data = { 0x80, 0x58 } },
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{ .data = { 0x81, 0x47 } },
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{ .data = { 0x82, 0xD4 } },
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{ .data = { 0x83, 0x88 } },
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{ .data = { 0x84, 0xA9 } },
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{ .data = { 0x85, 0xC3 } },
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{ .data = { 0x86, 0x82 } },
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};
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static int feiyang_prepare(struct drm_panel *panel)
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{
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struct feiyang *ctx = panel_to_feiyang(panel);
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struct mipi_dsi_device *dsi = ctx->dsi;
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unsigned int i;
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int ret;
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ret = regulator_enable(ctx->dvdd);
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if (ret)
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return ret;
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/* T1 (dvdd start + dvdd rise) 0 < T1 <= 10ms */
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msleep(10);
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ret = regulator_enable(ctx->avdd);
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if (ret)
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return ret;
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/* T3 (dvdd rise + avdd start + avdd rise) T3 >= 20ms */
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msleep(20);
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gpiod_set_value(ctx->reset, 0);
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/*
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* T5 + T6 (avdd rise + video & logic signal rise)
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* T5 >= 10ms, 0 < T6 <= 10ms
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*/
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msleep(20);
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gpiod_set_value(ctx->reset, 1);
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/* T12 (video & logic signal rise + backlight rise) T12 >= 200ms */
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msleep(200);
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for (i = 0; i < ARRAY_SIZE(feiyang_init_cmds); i++) {
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const struct feiyang_init_cmd *cmd =
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&feiyang_init_cmds[i];
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ret = mipi_dsi_dcs_write_buffer(dsi, cmd->data,
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FEIYANG_INIT_CMD_LEN);
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if (ret < 0)
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return ret;
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}
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return 0;
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}
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static int feiyang_enable(struct drm_panel *panel)
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{
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struct feiyang *ctx = panel_to_feiyang(panel);
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/* T12 (video & logic signal rise + backlight rise) T12 >= 200ms */
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msleep(200);
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mipi_dsi_dcs_set_display_on(ctx->dsi);
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backlight_enable(ctx->backlight);
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return 0;
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}
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static int feiyang_disable(struct drm_panel *panel)
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{
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struct feiyang *ctx = panel_to_feiyang(panel);
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backlight_disable(ctx->backlight);
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return mipi_dsi_dcs_set_display_off(ctx->dsi);
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}
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static int feiyang_unprepare(struct drm_panel *panel)
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{
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struct feiyang *ctx = panel_to_feiyang(panel);
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int ret;
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ret = mipi_dsi_dcs_set_display_off(ctx->dsi);
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if (ret < 0)
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DRM_DEV_ERROR(panel->dev, "failed to set display off: %d\n",
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ret);
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ret = mipi_dsi_dcs_enter_sleep_mode(ctx->dsi);
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if (ret < 0)
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DRM_DEV_ERROR(panel->dev, "failed to enter sleep mode: %d\n",
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ret);
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/* T13 (backlight fall + video & logic signal fall) T13 >= 200ms */
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msleep(200);
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gpiod_set_value(ctx->reset, 0);
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regulator_disable(ctx->avdd);
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/* T11 (dvdd rise to fall) 0 < T11 <= 10ms */
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msleep(10);
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regulator_disable(ctx->dvdd);
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return 0;
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}
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static const struct drm_display_mode feiyang_default_mode = {
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.clock = 55000,
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.hdisplay = 1024,
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.hsync_start = 1024 + 310,
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.hsync_end = 1024 + 310 + 20,
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.htotal = 1024 + 310 + 20 + 90,
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.vdisplay = 600,
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.vsync_start = 600 + 12,
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.vsync_end = 600 + 12 + 2,
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.vtotal = 600 + 12 + 2 + 21,
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.vrefresh = 60,
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.type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
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};
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static int feiyang_get_modes(struct drm_panel *panel)
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{
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struct drm_connector *connector = panel->connector;
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struct feiyang *ctx = panel_to_feiyang(panel);
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struct drm_display_mode *mode;
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mode = drm_mode_duplicate(panel->drm, &feiyang_default_mode);
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if (!mode) {
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DRM_DEV_ERROR(&ctx->dsi->dev, "failed to add mode %ux%ux@%u\n",
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feiyang_default_mode.hdisplay,
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feiyang_default_mode.vdisplay,
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feiyang_default_mode.vrefresh);
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return -ENOMEM;
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}
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drm_mode_set_name(mode);
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drm_mode_probed_add(connector, mode);
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return 1;
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}
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static const struct drm_panel_funcs feiyang_funcs = {
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.disable = feiyang_disable,
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.unprepare = feiyang_unprepare,
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.prepare = feiyang_prepare,
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.enable = feiyang_enable,
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.get_modes = feiyang_get_modes,
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};
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static int feiyang_dsi_probe(struct mipi_dsi_device *dsi)
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{
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struct feiyang *ctx;
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int ret;
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ctx = devm_kzalloc(&dsi->dev, sizeof(*ctx), GFP_KERNEL);
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if (!ctx)
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return -ENOMEM;
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mipi_dsi_set_drvdata(dsi, ctx);
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ctx->dsi = dsi;
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drm_panel_init(&ctx->panel);
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ctx->panel.dev = &dsi->dev;
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ctx->panel.funcs = &feiyang_funcs;
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ctx->dvdd = devm_regulator_get(&dsi->dev, "dvdd");
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if (IS_ERR(ctx->dvdd)) {
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DRM_DEV_ERROR(&dsi->dev, "Couldn't get dvdd regulator\n");
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return PTR_ERR(ctx->dvdd);
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}
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ctx->avdd = devm_regulator_get(&dsi->dev, "avdd");
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if (IS_ERR(ctx->avdd)) {
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DRM_DEV_ERROR(&dsi->dev, "Couldn't get avdd regulator\n");
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return PTR_ERR(ctx->avdd);
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}
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ctx->reset = devm_gpiod_get(&dsi->dev, "reset", GPIOD_OUT_LOW);
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if (IS_ERR(ctx->reset)) {
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DRM_DEV_ERROR(&dsi->dev, "Couldn't get our reset GPIO\n");
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return PTR_ERR(ctx->reset);
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}
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ctx->backlight = devm_of_find_backlight(&dsi->dev);
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if (IS_ERR(ctx->backlight))
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return PTR_ERR(ctx->backlight);
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ret = drm_panel_add(&ctx->panel);
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if (ret < 0)
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return ret;
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dsi->mode_flags = MIPI_DSI_MODE_VIDEO_BURST;
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dsi->format = MIPI_DSI_FMT_RGB888;
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dsi->lanes = 4;
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return mipi_dsi_attach(dsi);
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}
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static int feiyang_dsi_remove(struct mipi_dsi_device *dsi)
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{
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struct feiyang *ctx = mipi_dsi_get_drvdata(dsi);
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mipi_dsi_detach(dsi);
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drm_panel_remove(&ctx->panel);
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return 0;
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}
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static const struct of_device_id feiyang_of_match[] = {
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{ .compatible = "feiyang,fy07024di26a30d", },
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{ /* sentinel */ }
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};
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MODULE_DEVICE_TABLE(of, feiyang_of_match);
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static struct mipi_dsi_driver feiyang_driver = {
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.probe = feiyang_dsi_probe,
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.remove = feiyang_dsi_remove,
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.driver = {
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.name = "feiyang-fy07024di26a30d",
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.of_match_table = feiyang_of_match,
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},
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};
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module_mipi_dsi_driver(feiyang_driver);
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MODULE_AUTHOR("Jagan Teki <jagan@amarulasolutions.com>");
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MODULE_DESCRIPTION("Feiyang FY07024DI26A30-D MIPI-DSI LCD panel");
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MODULE_LICENSE("GPL");
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