irqchip/hip04: Convert to hotplug state machine
Install the callbacks via the state machine and let the core invoke the callbacks on the already online CPUs. Signed-off-by: Richard Cochran <rcochran@linutronix.de> Signed-off-by: Anna-Maria Gleixner <anna-maria@linutronix.de> Reviewed-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Acked-by: Jason Cooper <jason@lakedaemon.net> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Marc Zyngier <marc.zyngier@arm.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: rt@linutronix.de Link: http://lkml.kernel.org/r/20160713153333.244546182@linutronix.de Signed-off-by: Ingo Molnar <mingo@kernel.org>
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@ -342,26 +342,12 @@ static int hip04_irq_domain_xlate(struct irq_domain *d,
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return ret;
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return ret;
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}
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}
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#ifdef CONFIG_SMP
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static int hip04_irq_starting_cpu(unsigned int cpu)
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static int hip04_irq_secondary_init(struct notifier_block *nfb,
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unsigned long action,
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void *hcpu)
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{
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{
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if (action == CPU_STARTING || action == CPU_STARTING_FROZEN)
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hip04_irq_cpu_init(&hip04_data);
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hip04_irq_cpu_init(&hip04_data);
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return 0;
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return NOTIFY_OK;
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}
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}
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/*
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* Notifier for enabling the INTC CPU interface. Set an arbitrarily high
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* priority because the GIC needs to be up before the ARM generic timers.
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*/
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static struct notifier_block hip04_irq_cpu_notifier = {
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.notifier_call = hip04_irq_secondary_init,
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.priority = 100,
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};
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#endif
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static const struct irq_domain_ops hip04_irq_domain_ops = {
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static const struct irq_domain_ops hip04_irq_domain_ops = {
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.map = hip04_irq_domain_map,
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.map = hip04_irq_domain_map,
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.xlate = hip04_irq_domain_xlate,
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.xlate = hip04_irq_domain_xlate,
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@ -417,13 +403,12 @@ hip04_of_init(struct device_node *node, struct device_node *parent)
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#ifdef CONFIG_SMP
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#ifdef CONFIG_SMP
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set_smp_cross_call(hip04_raise_softirq);
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set_smp_cross_call(hip04_raise_softirq);
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register_cpu_notifier(&hip04_irq_cpu_notifier);
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#endif
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#endif
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set_handle_irq(hip04_handle_irq);
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set_handle_irq(hip04_handle_irq);
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hip04_irq_dist_init(&hip04_data);
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hip04_irq_dist_init(&hip04_data);
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hip04_irq_cpu_init(&hip04_data);
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cpuhp_setup_state(CPUHP_AP_IRQ_HIP04_STARTING, "AP_IRQ_HIP04_STARTING",
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hip04_irq_starting_cpu, NULL);
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return 0;
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return 0;
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}
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}
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IRQCHIP_DECLARE(hip04_intc, "hisilicon,hip04-intc", hip04_of_init);
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IRQCHIP_DECLARE(hip04_intc, "hisilicon,hip04-intc", hip04_of_init);
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@ -11,6 +11,7 @@ enum cpuhp_state {
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CPUHP_AP_SCHED_STARTING,
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CPUHP_AP_SCHED_STARTING,
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CPUHP_AP_IRQ_GIC_STARTING,
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CPUHP_AP_IRQ_GIC_STARTING,
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CPUHP_AP_IRQ_GICV3_STARTING,
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CPUHP_AP_IRQ_GICV3_STARTING,
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CPUHP_AP_IRQ_HIP04_STARTING,
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CPUHP_AP_NOTIFY_STARTING,
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CPUHP_AP_NOTIFY_STARTING,
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CPUHP_AP_ONLINE,
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CPUHP_AP_ONLINE,
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CPUHP_TEARDOWN_CPU,
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CPUHP_TEARDOWN_CPU,
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