KVM: x86: do not report a vCPU as preempted outside instruction boundaries
If a vCPU is outside guest mode and is scheduled out, it might be in the process of making a memory access. A problem occurs if another vCPU uses the PV TLB flush feature during the period when the vCPU is scheduled out, and a virtual address has already been translated but has not yet been accessed, because this is equivalent to using a stale TLB entry. To avoid this, only report a vCPU as preempted if sure that the guest is at an instruction boundary. A rescheduling request will be delivered to the host physical CPU as an external interrupt, so for simplicity consider any vmexit *not* instruction boundary except for external interrupts. It would in principle be okay to report the vCPU as preempted also if it is sleeping in kvm_vcpu_block(): a TLB flush IPI will incur the vmentry/vmexit overhead unnecessarily, and optimistic spinning is also unlikely to succeed. However, leave it for later because right now kvm_vcpu_check_block() is doing memory accesses. Even though the TLB flush issue only applies to virtual memory address, it's very much preferrable to be conservative. Reported-by: Jann Horn <jannh@google.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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@ -653,6 +653,7 @@ struct kvm_vcpu_arch {
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u64 ia32_misc_enable_msr;
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u64 ia32_misc_enable_msr;
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u64 smbase;
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u64 smbase;
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u64 smi_count;
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u64 smi_count;
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bool at_instruction_boundary;
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bool tpr_access_reporting;
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bool tpr_access_reporting;
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bool xsaves_enabled;
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bool xsaves_enabled;
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bool xfd_no_write_intercept;
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bool xfd_no_write_intercept;
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@ -1300,6 +1301,8 @@ struct kvm_vcpu_stat {
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u64 nested_run;
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u64 nested_run;
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u64 directed_yield_attempted;
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u64 directed_yield_attempted;
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u64 directed_yield_successful;
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u64 directed_yield_successful;
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u64 preemption_reported;
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u64 preemption_other;
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u64 guest_mode;
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u64 guest_mode;
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};
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};
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@ -4263,6 +4263,8 @@ static int svm_check_intercept(struct kvm_vcpu *vcpu,
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static void svm_handle_exit_irqoff(struct kvm_vcpu *vcpu)
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static void svm_handle_exit_irqoff(struct kvm_vcpu *vcpu)
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{
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{
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if (to_svm(vcpu)->vmcb->control.exit_code == SVM_EXIT_INTR)
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vcpu->arch.at_instruction_boundary = true;
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}
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}
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static void svm_sched_in(struct kvm_vcpu *vcpu, int cpu)
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static void svm_sched_in(struct kvm_vcpu *vcpu, int cpu)
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@ -6547,6 +6547,7 @@ static void handle_external_interrupt_irqoff(struct kvm_vcpu *vcpu)
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return;
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return;
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handle_interrupt_nmi_irqoff(vcpu, gate_offset(desc));
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handle_interrupt_nmi_irqoff(vcpu, gate_offset(desc));
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vcpu->arch.at_instruction_boundary = true;
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}
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}
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static void vmx_handle_exit_irqoff(struct kvm_vcpu *vcpu)
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static void vmx_handle_exit_irqoff(struct kvm_vcpu *vcpu)
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@ -296,6 +296,8 @@ const struct _kvm_stats_desc kvm_vcpu_stats_desc[] = {
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STATS_DESC_COUNTER(VCPU, nested_run),
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STATS_DESC_COUNTER(VCPU, nested_run),
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STATS_DESC_COUNTER(VCPU, directed_yield_attempted),
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STATS_DESC_COUNTER(VCPU, directed_yield_attempted),
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STATS_DESC_COUNTER(VCPU, directed_yield_successful),
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STATS_DESC_COUNTER(VCPU, directed_yield_successful),
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STATS_DESC_COUNTER(VCPU, preemption_reported),
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STATS_DESC_COUNTER(VCPU, preemption_other),
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STATS_DESC_ICOUNTER(VCPU, guest_mode)
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STATS_DESC_ICOUNTER(VCPU, guest_mode)
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};
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};
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@ -4625,6 +4627,19 @@ static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
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struct kvm_memslots *slots;
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struct kvm_memslots *slots;
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static const u8 preempted = KVM_VCPU_PREEMPTED;
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static const u8 preempted = KVM_VCPU_PREEMPTED;
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/*
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* The vCPU can be marked preempted if and only if the VM-Exit was on
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* an instruction boundary and will not trigger guest emulation of any
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* kind (see vcpu_run). Vendor specific code controls (conservatively)
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* when this is true, for example allowing the vCPU to be marked
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* preempted if and only if the VM-Exit was due to a host interrupt.
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*/
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if (!vcpu->arch.at_instruction_boundary) {
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vcpu->stat.preemption_other++;
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return;
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}
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vcpu->stat.preemption_reported++;
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if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
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if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
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return;
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return;
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@ -10424,6 +10439,13 @@ static int vcpu_run(struct kvm_vcpu *vcpu)
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vcpu->arch.l1tf_flush_l1d = true;
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vcpu->arch.l1tf_flush_l1d = true;
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for (;;) {
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for (;;) {
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/*
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* If another guest vCPU requests a PV TLB flush in the middle
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* of instruction emulation, the rest of the emulation could
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* use a stale page translation. Assume that any code after
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* this point can start executing an instruction.
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*/
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vcpu->arch.at_instruction_boundary = false;
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if (kvm_vcpu_running(vcpu)) {
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if (kvm_vcpu_running(vcpu)) {
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r = vcpu_enter_guest(vcpu);
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r = vcpu_enter_guest(vcpu);
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} else {
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} else {
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