drm: omapdrm: Move DISPC_CLK_SWITCH reg feature to struct dss_features
The register belongs to the DSS, move the feature to the dss_features structure. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
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@ -86,6 +86,7 @@ struct dss_features {
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const enum omap_display_type *ports;
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int num_ports;
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const struct dss_ops *ops;
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struct dss_reg_field dispc_clk_switch;
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};
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static struct {
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@ -427,7 +428,6 @@ static int dss_get_channel_index(enum omap_channel channel)
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static void dss_select_dispc_clk_source(enum dss_clk_source clk_src)
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{
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int b;
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u8 start, end;
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/*
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* We always use PRCM clock as the DISPC func clock, except on DSS3,
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@ -452,9 +452,9 @@ static void dss_select_dispc_clk_source(enum dss_clk_source clk_src)
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return;
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}
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dss_feat_get_reg_field(FEAT_REG_DISPC_CLK_SWITCH, &start, &end);
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REG_FLD_MOD(DSS_CONTROL, b, start, end); /* DISPC_CLK_SWITCH */
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REG_FLD_MOD(DSS_CONTROL, b, /* DISPC_CLK_SWITCH */
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dss.feat->dispc_clk_switch.start,
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dss.feat->dispc_clk_switch.end);
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dss.dispc_clk_source = clk_src;
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}
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@ -1010,6 +1010,7 @@ static const struct dss_features omap24xx_dss_feats = {
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.ports = omap2plus_ports,
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.num_ports = ARRAY_SIZE(omap2plus_ports),
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.ops = &dss_ops_omap2_omap3,
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.dispc_clk_switch = { 0, 0 },
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};
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static const struct dss_features omap34xx_dss_feats = {
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@ -1020,6 +1021,7 @@ static const struct dss_features omap34xx_dss_feats = {
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.ports = omap34xx_ports,
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.num_ports = ARRAY_SIZE(omap34xx_ports),
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.ops = &dss_ops_omap2_omap3,
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.dispc_clk_switch = { 0, 0 },
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};
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static const struct dss_features omap3630_dss_feats = {
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@ -1030,6 +1032,7 @@ static const struct dss_features omap3630_dss_feats = {
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.ports = omap2plus_ports,
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.num_ports = ARRAY_SIZE(omap2plus_ports),
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.ops = &dss_ops_omap2_omap3,
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.dispc_clk_switch = { 0, 0 },
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};
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static const struct dss_features omap44xx_dss_feats = {
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@ -1040,6 +1043,7 @@ static const struct dss_features omap44xx_dss_feats = {
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.ports = omap2plus_ports,
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.num_ports = ARRAY_SIZE(omap2plus_ports),
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.ops = &dss_ops_omap4,
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.dispc_clk_switch = { 9, 8 },
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};
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static const struct dss_features omap54xx_dss_feats = {
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@ -1050,6 +1054,7 @@ static const struct dss_features omap54xx_dss_feats = {
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.ports = omap2plus_ports,
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.num_ports = ARRAY_SIZE(omap2plus_ports),
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.ops = &dss_ops_omap5,
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.dispc_clk_switch = { 9, 7 },
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};
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static const struct dss_features am43xx_dss_feats = {
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@ -1060,6 +1065,7 @@ static const struct dss_features am43xx_dss_feats = {
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.ports = omap2plus_ports,
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.num_ports = ARRAY_SIZE(omap2plus_ports),
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.ops = &dss_ops_omap2_omap3,
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.dispc_clk_switch = { 0, 0 },
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};
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static const struct dss_features dra7xx_dss_feats = {
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@ -1070,6 +1076,7 @@ static const struct dss_features dra7xx_dss_feats = {
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.ports = dra7xx_ports,
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.num_ports = ARRAY_SIZE(dra7xx_ports),
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.ops = &dss_ops_dra7,
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.dispc_clk_switch = { 9, 7 },
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};
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static int dss_init_ports(struct platform_device *pdev)
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@ -200,6 +200,11 @@ struct dss_pll {
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struct dss_pll_clock_info cinfo;
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};
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/* Defines a generic omap register field */
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struct dss_reg_field {
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u8 start, end;
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};
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struct dispc_clock_info {
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/* rates that we get with dividers below */
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unsigned long lck;
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@ -28,11 +28,6 @@
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#include "dss.h"
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#include "dss_features.h"
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/* Defines a generic omap register field */
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struct dss_reg_field {
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u8 start, end;
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};
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struct dss_param_range {
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int min, max;
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};
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@ -59,7 +54,6 @@ static const struct dss_reg_field omap2_dss_reg_fields[] = {
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[FEAT_REG_FIFOSIZE] = { 8, 0 },
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[FEAT_REG_HORIZONTALACCU] = { 9, 0 },
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[FEAT_REG_VERTICALACCU] = { 25, 16 },
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[FEAT_REG_DISPC_CLK_SWITCH] = { 0, 0 },
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};
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static const struct dss_reg_field omap3_dss_reg_fields[] = {
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@ -70,7 +64,6 @@ static const struct dss_reg_field omap3_dss_reg_fields[] = {
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[FEAT_REG_FIFOSIZE] = { 10, 0 },
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[FEAT_REG_HORIZONTALACCU] = { 9, 0 },
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[FEAT_REG_VERTICALACCU] = { 25, 16 },
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[FEAT_REG_DISPC_CLK_SWITCH] = { 0, 0 },
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};
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static const struct dss_reg_field am43xx_dss_reg_fields[] = {
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@ -81,7 +74,6 @@ static const struct dss_reg_field am43xx_dss_reg_fields[] = {
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[FEAT_REG_FIFOSIZE] = { 10, 0 },
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[FEAT_REG_HORIZONTALACCU] = { 9, 0 },
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[FEAT_REG_VERTICALACCU] = { 25, 16 },
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[FEAT_REG_DISPC_CLK_SWITCH] = { 0, 0 },
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};
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static const struct dss_reg_field omap4_dss_reg_fields[] = {
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@ -92,7 +84,6 @@ static const struct dss_reg_field omap4_dss_reg_fields[] = {
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[FEAT_REG_FIFOSIZE] = { 15, 0 },
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[FEAT_REG_HORIZONTALACCU] = { 10, 0 },
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[FEAT_REG_VERTICALACCU] = { 26, 16 },
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[FEAT_REG_DISPC_CLK_SWITCH] = { 9, 8 },
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};
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static const struct dss_reg_field omap5_dss_reg_fields[] = {
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@ -103,7 +94,6 @@ static const struct dss_reg_field omap5_dss_reg_fields[] = {
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[FEAT_REG_FIFOSIZE] = { 15, 0 },
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[FEAT_REG_HORIZONTALACCU] = { 10, 0 },
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[FEAT_REG_VERTICALACCU] = { 26, 16 },
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[FEAT_REG_DISPC_CLK_SWITCH] = { 9, 7 },
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};
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static const enum omap_dss_output_id omap2_dss_supported_outputs[] = {
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@ -73,7 +73,6 @@ enum dss_feat_reg_field {
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FEAT_REG_FIFOSIZE,
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FEAT_REG_HORIZONTALACCU,
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FEAT_REG_VERTICALACCU,
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FEAT_REG_DISPC_CLK_SWITCH,
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};
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enum dss_range_param {
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