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Change are regulator nodes for the cpu and gpu regulators on the act8846 

variant of the rk3288-evb and the setting of a clock for the watchdog.
 Also the lcd and hdmi controllers on both the firefly and the evb get
 enabled and let us now boot into fbcon console sucessfully.
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Merge tag 'v3.20-rockchip-dts3' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/dt

Merge "ARM: rockchip: third (and last) batch of dts updates for 3.20" from
Heiko Stübner:

Change are regulator nodes for the cpu and gpu regulators on the act8846
variant of the rk3288-evb and the setting of a clock for the watchdog.
Also the lcd and hdmi controllers on both the firefly and the evb get
enabled and let us now boot into fbcon console sucessfully.

* tag 'v3.20-rockchip-dts3' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  ARM: dts: rockchip: move the hdmi ddc-i2c-bus property to the actual boards
  ARM: dts: rockchip: enable vops and hdmi output on rk3288-firefly and -evb
  ARM: dts: rockchip: housekeeping off i2c0 on rk3288-evb boards
  ARM: dts: rockchip: add cpu and gpu regulators to rk3288-evb-act8846
  ARM: dts: rockchip: add rk3288 watchdog clock
  clk: rockchip: add id for watchdog pclk on rk3288
  clk: rockchip: add clock IDs for the PVTM clocks
  clk: rockchip: add clock ID for usbphy480m_src

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2015-02-06 00:03:28 -08:00
parent 7679f31f14 c25d8cbcd8
commit 6f8c8f6baf
6 changed files with 80 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

27
arch/arm/boot/dts/rk3288-evb-act8846.dts
View File

@ -17,7 +17,34 @@ / {
compatible = "rockchip,rk3288-evb-act8846", "rockchip,rk3288";
};
&cpu0 {
cpu0-supply = <&vdd_cpu>;
};
&i2c0 {
clock-frequency = <400000>;
vdd_cpu: syr827@40 {
compatible = "silergy,syr827";
fcs,suspend-voltage-selector = <1>;
reg = <0x40>;
regulator-name = "vdd_cpu";
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <1350000>;
regulator-always-on;
regulator-boot-on;
};
vdd_gpu: syr828@41 {
compatible = "silergy,syr828";
fcs,suspend-voltage-selector = <1>;
reg = <0x41>;
regulator-name = "vdd_gpu";
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <1350000>;
regulator-always-on;
};
hym8563@51 {
compatible = "haoyu,hym8563";
reg = <0x51>;

1
arch/arm/boot/dts/rk3288-evb-rk808.dts
View File

@ -23,7 +23,6 @@ &cpu0 {
&i2c0 {
clock-frequency = <400000>;
status = "okay";
rk808: pmic@1b {
compatible = "rockchip,rk808";

25
arch/arm/boot/dts/rk3288-evb.dtsi
View File

@ -104,6 +104,11 @@ &emmc {
status = "okay";
};
&hdmi {
ddc-i2c-bus = <&i2c5>;
status = "okay";
};
&sdmmc {
bus-width = <4>;
cap-mmc-highspeed;
@ -120,6 +125,10 @@ &i2c0 {
status = "okay";
};
&i2c5 {
status = "okay";
};
&wdt {
status = "okay";
};
@ -187,3 +196,19 @@ &usb_host0_ehci {
&usb_host1 {
status = "okay";
};
&vopb {
status = "okay";
};
&vopb_mmu {
status = "okay";
};
&vopl {
status = "okay";
};
&vopl_mmu {
status = "okay";
};

23
arch/arm/boot/dts/rk3288-firefly.dtsi
View File

@ -179,6 +179,11 @@ &emmc {
status = "okay";
};
&hdmi {
ddc-i2c-bus = <&i2c5>;
status = "okay";
};
&i2c0 {
clock-frequency = <400000>;
status = "okay";
@ -265,6 +270,7 @@ vdd10_lcd: REG6 {
regulator-name = "vdd10_lcd";
regulator-min-microvolt = <1000000>;
regulator-max-microvolt = <1000000>;
regulator-always-on;
};
vcca_18: REG7 {
@ -303,6 +309,7 @@ vcc18_lcd: REG12 {
regulator-name = "vcc18_lcd";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
};
};
};
@ -462,6 +469,22 @@ &usb_otg {
status = "okay";
};
&vopb {
status = "okay";
};
&vopb_mmu {
status = "okay";
};
&vopl {
status = "okay";
};
&vopl_mmu {
status = "okay";
};
&wdt {
status = "okay";
};

2
arch/arm/boot/dts/rk3288.dtsi
View File

@ -560,6 +560,7 @@ grf: syscon@ff770000 {
wdt: watchdog@ff800000 {
compatible = "rockchip,rk3288-wdt", "snps,dw-wdt";
reg = <0xff800000 0x100>;
clocks = <&cru PCLK_WDT>;
interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
};
@ -645,7 +646,6 @@ hdmi: hdmi@ff980000 {
compatible = "rockchip,rk3288-dw-hdmi";
reg = <0xff980000 0x20000>;
reg-io-width = <4>;
ddc-i2c-bus = <&i2c5>;
rockchip,grf = <&grf>;
interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru PCLK_HDMI_CTRL>, <&cru SCLK_HDMI_HDCP>;

4
include/dt-bindings/clock/rk3288-cru.h
View File

@ -80,6 +80,9 @@
#define SCLK_SDIO0_SAMPLE 119
#define SCLK_SDIO1_SAMPLE 120
#define SCLK_EMMC_SAMPLE 121
#define SCLK_USBPHY480M_SRC 122
#define SCLK_PVTM_CORE 123
#define SCLK_PVTM_GPU 124
#define DCLK_VOP0 190
#define DCLK_VOP1 191
@ -154,6 +157,7 @@
#define PCLK_PUBL0 365
#define PCLK_DDRUPCTL1 366
#define PCLK_PUBL1 367
#define PCLK_WDT 368
/* hclk gates */
#define HCLK_GPS 448