RISC-V: Remove per cpu clocksource
There is only one clocksource in RISC-V. The boot cpu initializes that clocksource. No need to keep a percpu data structure. Signed-off-by: Atish Patra <atish.patra@wdc.com> Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com> Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
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@ -55,7 +55,7 @@ static u64 riscv_sched_clock(void)
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return get_cycles64();
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}
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static DEFINE_PER_CPU(struct clocksource, riscv_clocksource) = {
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static struct clocksource riscv_clocksource = {
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.name = "riscv_clocksource",
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.rating = 300,
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.mask = CLOCKSOURCE_MASK(64),
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@ -92,7 +92,6 @@ void riscv_timer_interrupt(void)
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static int __init riscv_timer_init_dt(struct device_node *n)
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{
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int cpuid, hartid, error;
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struct clocksource *cs;
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hartid = riscv_of_processor_hartid(n);
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if (hartid < 0) {
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@ -112,8 +111,7 @@ static int __init riscv_timer_init_dt(struct device_node *n)
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pr_info("%s: Registering clocksource cpuid [%d] hartid [%d]\n",
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__func__, cpuid, hartid);
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cs = per_cpu_ptr(&riscv_clocksource, cpuid);
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error = clocksource_register_hz(cs, riscv_timebase);
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error = clocksource_register_hz(&riscv_clocksource, riscv_timebase);
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if (error) {
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pr_err("RISCV timer register failed [%d] for cpu = [%d]\n",
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error, cpuid);
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