dt-bindings: clock: sunxi: Export CLK_DRAM for devfreq

The MBUS node needs to reference the CLK_DRAM clock, as the MBUS
hardware implements memory dynamic frequency scaling using this clock.

Export this clock for SoCs which will be getting a devfreq driver.

Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20211118031841.42315-2-samuel@sholland.org
This commit is contained in:
Samuel Holland 2021-11-17 21:18:36 -06:00 committed by Maxime Ripard
parent 34734edd06
commit 71b597ef5d
No known key found for this signature in database
GPG Key ID: E3EF0D6F671851C5
4 changed files with 2 additions and 6 deletions

View File

@ -51,8 +51,6 @@
#define CLK_USB_OHCI1_12M 92
#define CLK_DRAM 94
/* All the DRAM gates are exported */
/* And the DSI and GPU module clock is exported */

View File

@ -42,8 +42,6 @@
/* The first bunch of module clocks are exported */
#define CLK_DRAM 96
/* All the DRAM gates are exported */
/* Some more module clocks are exported */

View File

@ -113,7 +113,7 @@
#define CLK_USB_OHCI0 91
#define CLK_USB_OHCI1 93
#define CLK_DRAM 94
#define CLK_DRAM_VE 95
#define CLK_DRAM_CSI 96
#define CLK_DRAM_DEINTERLACE 97

View File

@ -126,7 +126,7 @@
#define CLK_USB_OHCI1 93
#define CLK_USB_OHCI2 94
#define CLK_USB_OHCI3 95
#define CLK_DRAM 96
#define CLK_DRAM_VE 97
#define CLK_DRAM_CSI 98
#define CLK_DRAM_DEINTERLACE 99