Documentation: dt: edac: Add Stratix10 Peripheral bindings
Add peripheral bindings for Stratix10 EDAC to capture the differences between the ARM64 and ARM32 architecture. Signed-off-by: Thor Thayer <thor.thayer@linux.intel.com> Signed-off-by: Borislav Petkov <bp@suse.de> Reviewed-by: Rob Herring <robh@kernel.org> Cc: James Morse <james.morse@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: devicetree@vger.kernel.org Cc: dinguyen@kernel.org Cc: linux-edac <linux-edac@vger.kernel.org> Cc: mark.rutland@arm.com Cc: mchehab@kernel.org Link: https://lkml.kernel.org/r/1554388597-28019-3-git-send-email-thor.thayer@linux.intel.com
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@ -258,6 +258,49 @@ Required Properties:
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- compatible : Should be "altr,sdram-edac-s10"
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- interrupts : Should be single bit error interrupt.
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On-Chip RAM ECC
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Required Properties:
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- compatible : Should be "altr,socfpga-s10-ocram-ecc"
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- reg : Address and size for ECC block registers.
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- altr,ecc-parent : phandle to parent OCRAM node.
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- interrupts : Should be single bit error interrupt.
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Ethernet FIFO ECC
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Required Properties:
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- compatible : Should be "altr,socfpga-s10-eth-mac-ecc"
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- reg : Address and size for ECC block registers.
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- altr,ecc-parent : phandle to parent Ethernet node.
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- interrupts : Should be single bit error interrupt.
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NAND FIFO ECC
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Required Properties:
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- compatible : Should be "altr,socfpga-s10-nand-ecc"
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- reg : Address and size for ECC block registers.
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- altr,ecc-parent : phandle to parent NAND node.
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- interrupts : Should be single bit error interrupt.
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DMA FIFO ECC
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Required Properties:
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- compatible : Should be "altr,socfpga-s10-dma-ecc"
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- reg : Address and size for ECC block registers.
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- altr,ecc-parent : phandle to parent DMA node.
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- interrupts : Should be single bit error interrupt.
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USB FIFO ECC
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Required Properties:
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- compatible : Should be "altr,socfpga-s10-usb-ecc"
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- reg : Address and size for ECC block registers.
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- altr,ecc-parent : phandle to parent USB node.
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- interrupts : Should be single bit error interrupt.
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SDMMC FIFO ECC
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Required Properties:
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- compatible : Should be "altr,socfpga-s10-sdmmc-ecc"
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- reg : Address and size for ECC block registers.
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- altr,ecc-parent : phandle to parent SD/MMC node.
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- interrupts : Should be single bit error interrupt for port A
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and then single bit error interrupt for port B.
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Example:
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eccmgr {
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@ -274,4 +317,67 @@ Example:
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compatible = "altr,sdram-edac-s10";
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interrupts = <16 IRQ_TYPE_LEVEL_HIGH>;
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};
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ocram-ecc@ff8cc000 {
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compatible = "altr,socfpga-s10-ocram-ecc";
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reg = <ff8cc000 0x100>;
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altr,ecc-parent = <&ocram>;
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interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
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};
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emac0-rx-ecc@ff8c0000 {
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compatible = "altr,socfpga-s10-eth-mac-ecc";
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reg = <0xff8c0000 0x100>;
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altr,ecc-parent = <&gmac0>;
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interrupts = <4 IRQ_TYPE_LEVEL_HIGH>;
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};
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emac0-tx-ecc@ff8c0400 {
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compatible = "altr,socfpga-s10-eth-mac-ecc";
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reg = <0xff8c0400 0x100>;
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altr,ecc-parent = <&gmac0>;
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interrupts = <5 IRQ_TYPE_LEVEL_HIGH>'
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};
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nand-buf-ecc@ff8c8000 {
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compatible = "altr,socfpga-s10-nand-ecc";
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reg = <0xff8c8000 0x100>;
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altr,ecc-parent = <&nand>;
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interrupts = <11 IRQ_TYPE_LEVEL_HIGH>;
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};
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nand-rd-ecc@ff8c8400 {
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compatible = "altr,socfpga-s10-nand-ecc";
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reg = <0xff8c8400 0x100>;
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altr,ecc-parent = <&nand>;
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interrupts = <13 IRQ_TYPE_LEVEL_HIGH>;
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};
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nand-wr-ecc@ff8c8800 {
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compatible = "altr,socfpga-s10-nand-ecc";
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reg = <0xff8c8800 0x100>;
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altr,ecc-parent = <&nand>;
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interrupts = <12 IRQ_TYPE_LEVEL_HIGH>;
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};
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dma-ecc@ff8c9000 {
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compatible = "altr,socfpga-s10-dma-ecc";
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reg = <0xff8c9000 0x100>;
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altr,ecc-parent = <&pdma>;
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interrupts = <10 IRQ_TYPE_LEVEL_HIGH>;
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usb0-ecc@ff8c4000 {
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compatible = "altr,socfpga-s10-usb-ecc";
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reg = <0xff8c4000 0x100>;
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altr,ecc-parent = <&usb0>;
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interrupts = <2 IRQ_TYPE_LEVEL_HIGH>;
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};
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sdmmc-ecc@ff8c8c00 {
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compatible = "altr,socfpga-s10-sdmmc-ecc";
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reg = <0xff8c8c00 0x100>;
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altr,ecc-parent = <&mmc>;
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interrupts = <14 IRQ_TYPE_LEVEL_HIGH>,
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<15 IRQ_TYPE_LEVEL_HIGH>;
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};
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};
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