IB/mlx5: Don't expose MR cache in switchdev mode
When enabling many VFs and switching to switchdev mode, the total amount of mkeys we try to allocate when loading representors is very large and may cause timeouts on allocations, the same issues was observed on VFs and we employ the same fix that was done for them. We avoid allocating the full MR cache on load but still allow it to be manipulated once the IB device is loaded. Signed-off-by: Mark Bloch <markb@mellanox.com> Signed-off-by: Leon Romanovsky <leon@kernel.org> Signed-off-by: Saeed Mahameed <saeedm@mellanox.com>
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@ -587,7 +587,7 @@ static void clean_keys(struct mlx5_ib_dev *dev, int c)
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static void mlx5_mr_cache_debugfs_cleanup(struct mlx5_ib_dev *dev)
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static void mlx5_mr_cache_debugfs_cleanup(struct mlx5_ib_dev *dev)
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{
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{
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if (!mlx5_debugfs_root)
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if (!mlx5_debugfs_root || dev->rep)
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return;
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return;
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debugfs_remove_recursive(dev->cache.root);
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debugfs_remove_recursive(dev->cache.root);
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@ -600,7 +600,7 @@ static int mlx5_mr_cache_debugfs_init(struct mlx5_ib_dev *dev)
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struct mlx5_cache_ent *ent;
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struct mlx5_cache_ent *ent;
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int i;
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int i;
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if (!mlx5_debugfs_root)
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if (!mlx5_debugfs_root || dev->rep)
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return 0;
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return 0;
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cache->root = debugfs_create_dir("mr_cache", dev->mdev->priv.dbg_root);
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cache->root = debugfs_create_dir("mr_cache", dev->mdev->priv.dbg_root);
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@ -690,6 +690,7 @@ int mlx5_mr_cache_init(struct mlx5_ib_dev *dev)
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MLX5_IB_UMR_OCTOWORD;
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MLX5_IB_UMR_OCTOWORD;
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ent->access_mode = MLX5_MKC_ACCESS_MODE_MTT;
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ent->access_mode = MLX5_MKC_ACCESS_MODE_MTT;
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if ((dev->mdev->profile->mask & MLX5_PROF_MASK_MR_CACHE) &&
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if ((dev->mdev->profile->mask & MLX5_PROF_MASK_MR_CACHE) &&
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!dev->rep &&
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mlx5_core_is_pf(dev->mdev))
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mlx5_core_is_pf(dev->mdev))
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ent->limit = dev->mdev->profile->mr_cache[i].limit;
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ent->limit = dev->mdev->profile->mr_cache[i].limit;
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else
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else
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