drm/i915/gvt: Refine pte shadowing process
Make the shadow PTE population code clear. Later we will add huge gtt support based on this. v2: - rebase to latest code. Signed-off-by: Changbin Du <changbin.du@intel.com> Reviewed-by: Zhi Wang <zhi.wang@intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
This commit is contained in:
Changbin Du
Zhenyu Wang
parent
d861ca237d
commit
72f03d7ea1
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@ -453,29 +453,6 @@ static struct intel_gvt_gtt_gma_ops gen8_gtt_gma_ops = {
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.gma_to_pml4_index = gen8_gma_to_pml4_index,
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};
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static int gtt_entry_p2m(struct intel_vgpu *vgpu, struct intel_gvt_gtt_entry *p,
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struct intel_gvt_gtt_entry *m)
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{
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struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;
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unsigned long gfn, mfn;
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*m = *p;
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if (!ops->test_present(p))
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return 0;
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gfn = ops->get_pfn(p);
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mfn = intel_gvt_hypervisor_gfn_to_mfn(vgpu, gfn);
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if (mfn == INTEL_GVT_INVALID_ADDR) {
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gvt_vgpu_err("fail to translate gfn: 0x%lx\n", gfn);
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return -ENXIO;
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}
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ops->set_pfn(m, mfn);
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return 0;
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}
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/*
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* MM helpers.
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*/
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@ -943,8 +920,7 @@ static int ppgtt_invalidate_shadow_page_by_shadow_entry(struct intel_vgpu *vgpu,
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struct intel_vgpu_ppgtt_spt *s;
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intel_gvt_gtt_type_t cur_pt_type;
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if (WARN_ON(!gtt_type_is_pt(get_next_pt_type(e->type))))
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return -EINVAL;
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GEM_BUG_ON(!gtt_type_is_pt(get_next_pt_type(e->type)));
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if (e->type != GTT_TYPE_PPGTT_ROOT_L3_ENTRY
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&& e->type != GTT_TYPE_PPGTT_ROOT_L4_ENTRY) {
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@ -982,14 +958,26 @@ static int ppgtt_invalidate_shadow_page(struct intel_vgpu_ppgtt_spt *spt)
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goto release;
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for_each_present_shadow_entry(spt, &e, index) {
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if (!gtt_type_is_pt(get_next_pt_type(e.type))) {
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gvt_vgpu_err("GVT doesn't support pse bit for now\n");
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return -EINVAL;
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switch (e.type) {
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case GTT_TYPE_PPGTT_PTE_4K_ENTRY:
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gvt_vdbg_mm("invalidate 4K entry\n");
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continue;
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case GTT_TYPE_PPGTT_PTE_2M_ENTRY:
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case GTT_TYPE_PPGTT_PTE_1G_ENTRY:
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WARN(1, "GVT doesn't support 2M/1GB page\n");
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continue;
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case GTT_TYPE_PPGTT_PML4_ENTRY:
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case GTT_TYPE_PPGTT_PDP_ENTRY:
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case GTT_TYPE_PPGTT_PDE_ENTRY:
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gvt_vdbg_mm("invalidate PMUL4/PDP/PDE entry\n");
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ret = ppgtt_invalidate_shadow_page_by_shadow_entry(
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spt->vgpu, &e);
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if (ret)
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goto fail;
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break;
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default:
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GEM_BUG_ON(1);
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}
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ret = ppgtt_invalidate_shadow_page_by_shadow_entry(
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spt->vgpu, &e);
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if (ret)
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goto fail;
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}
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release:
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trace_spt_change(spt->vgpu->id, "release", spt,
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@ -1013,10 +1001,7 @@ static struct intel_vgpu_ppgtt_spt *ppgtt_populate_shadow_page_by_guest_entry(
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struct intel_vgpu_page_track *t;
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int ret;
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if (WARN_ON(!gtt_type_is_pt(get_next_pt_type(we->type)))) {
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ret = -EINVAL;
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goto fail;
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}
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GEM_BUG_ON(!gtt_type_is_pt(get_next_pt_type(we->type)));
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t = intel_vgpu_find_tracked_page(vgpu, ops->get_pfn(we));
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if (t) {
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@ -1062,6 +1047,41 @@ static inline void ppgtt_generate_shadow_entry(struct intel_gvt_gtt_entry *se,
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ops->set_pfn(se, s->shadow_page.mfn);
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}
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static int ppgtt_populate_shadow_entry(struct intel_vgpu *vgpu,
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struct intel_vgpu_ppgtt_spt *spt, unsigned long index,
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struct intel_gvt_gtt_entry *ge)
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{
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struct intel_gvt_gtt_pte_ops *pte_ops = vgpu->gvt->gtt.pte_ops;
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struct intel_gvt_gtt_entry se = *ge;
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unsigned long gfn, mfn;
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if (!pte_ops->test_present(ge))
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return 0;
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gfn = pte_ops->get_pfn(ge);
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switch (ge->type) {
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case GTT_TYPE_PPGTT_PTE_4K_ENTRY:
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gvt_vdbg_mm("shadow 4K gtt entry\n");
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break;
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case GTT_TYPE_PPGTT_PTE_2M_ENTRY:
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case GTT_TYPE_PPGTT_PTE_1G_ENTRY:
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gvt_vgpu_err("GVT doesn't support 2M/1GB entry\n");
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return -EINVAL;
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default:
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GEM_BUG_ON(1);
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};
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/* direct shadow */
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mfn = intel_gvt_hypervisor_gfn_to_mfn(vgpu, gfn);
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if (mfn == INTEL_GVT_INVALID_ADDR)
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return -ENXIO;
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pte_ops->set_pfn(&se, mfn);
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ppgtt_set_shadow_entry(spt, &se, index);
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return 0;
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}
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static int ppgtt_populate_shadow_page(struct intel_vgpu_ppgtt_spt *spt)
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{
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struct intel_vgpu *vgpu = spt->vgpu;
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@ -1075,32 +1095,29 @@ static int ppgtt_populate_shadow_page(struct intel_vgpu_ppgtt_spt *spt)
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trace_spt_change(spt->vgpu->id, "born", spt,
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spt->guest_page.track.gfn, spt->shadow_page.type);
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if (gtt_type_is_pte_pt(spt->shadow_page.type)) {
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for_each_present_guest_entry(spt, &ge, i) {
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gfn = ops->get_pfn(&ge);
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if (!intel_gvt_hypervisor_is_valid_gfn(vgpu, gfn) ||
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gtt_entry_p2m(vgpu, &ge, &se))
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ops->set_pfn(&se, gvt->gtt.scratch_mfn);
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ppgtt_set_shadow_entry(spt, &se, i);
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}
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return 0;
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}
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for_each_present_guest_entry(spt, &ge, i) {
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if (!gtt_type_is_pt(get_next_pt_type(ge.type))) {
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gvt_vgpu_err("GVT doesn't support pse bit now\n");
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ret = -EINVAL;
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goto fail;
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}
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if (gtt_type_is_pt(get_next_pt_type(ge.type))) {
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s = ppgtt_populate_shadow_page_by_guest_entry(vgpu,
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&ge);
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if (IS_ERR(s)) {
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ret = PTR_ERR(s);
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goto fail;
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}
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ppgtt_get_shadow_entry(spt, &se, i);
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ppgtt_generate_shadow_entry(&se, s, &ge);
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ppgtt_set_shadow_entry(spt, &se, i);
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} else {
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gfn = ops->get_pfn(&ge);
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if (!intel_gvt_hypervisor_is_valid_gfn(vgpu, gfn)) {
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ops->set_pfn(&se, gvt->gtt.scratch_mfn);
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ppgtt_set_shadow_entry(spt, &se, i);
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continue;
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}
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s = ppgtt_populate_shadow_page_by_guest_entry(vgpu, &ge);
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if (IS_ERR(s)) {
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ret = PTR_ERR(s);
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goto fail;
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ret = ppgtt_populate_shadow_entry(vgpu, spt, i, &ge);
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if (ret)
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goto fail;
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}
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ppgtt_get_shadow_entry(spt, &se, i);
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ppgtt_generate_shadow_entry(&se, s, &ge);
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ppgtt_set_shadow_entry(spt, &se, i);
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}
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return 0;
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fail:
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@ -1175,10 +1192,9 @@ static int ppgtt_handle_guest_entry_add(struct intel_vgpu_guest_page *gpt,
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ppgtt_generate_shadow_entry(&m, s, we);
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ppgtt_set_shadow_entry(spt, &m, index);
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} else {
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ret = gtt_entry_p2m(vgpu, we, &m);
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ret = ppgtt_populate_shadow_entry(vgpu, spt, index, we);
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if (ret)
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goto fail;
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ppgtt_set_shadow_entry(spt, &m, index);
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}
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return 0;
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fail:
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@ -1195,7 +1211,7 @@ static int sync_oos_page(struct intel_vgpu *vgpu,
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struct intel_gvt_gtt_pte_ops *ops = gvt->gtt.pte_ops;
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struct intel_vgpu_ppgtt_spt *spt =
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guest_page_to_ppgtt_spt(oos_page->guest_page);
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struct intel_gvt_gtt_entry old, new, m;
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struct intel_gvt_gtt_entry old, new;
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int index;
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int ret;
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@ -1219,12 +1235,11 @@ static int sync_oos_page(struct intel_vgpu *vgpu,
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oos_page->guest_page, spt->guest_page_type,
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new.val64, index);
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ret = gtt_entry_p2m(vgpu, &new, &m);
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ret = ppgtt_populate_shadow_entry(vgpu, spt, index, &new);
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if (ret)
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return ret;
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ops->set_entry(oos_page->mem, &new, index, false, 0, vgpu);
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ppgtt_set_shadow_entry(spt, &m, index);
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}
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oos_page->guest_page->write_cnt = 0;
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@ -1371,10 +1386,9 @@ static int ppgtt_handle_guest_write_page_table(
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struct intel_vgpu *vgpu = spt->vgpu;
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int type = spt->shadow_page.type;
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struct intel_gvt_gtt_pte_ops *ops = vgpu->gvt->gtt.pte_ops;
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struct intel_gvt_gtt_entry se;
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int ret;
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struct intel_gvt_gtt_entry old_se;
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int new_present;
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int ret;
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new_present = ops->test_present(we);
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@ -1383,7 +1397,7 @@ static int ppgtt_handle_guest_write_page_table(
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* guarantee the ppgtt table is validated during the window between
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* adding and removal.
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*/
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ppgtt_get_shadow_entry(spt, &se, index);
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ppgtt_get_shadow_entry(spt, &old_se, index);
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if (new_present) {
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ret = ppgtt_handle_guest_entry_add(gpt, we, index);
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@ -1391,13 +1405,13 @@ static int ppgtt_handle_guest_write_page_table(
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goto fail;
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}
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ret = ppgtt_handle_guest_entry_removal(gpt, &se, index);
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ret = ppgtt_handle_guest_entry_removal(gpt, &old_se, index);
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if (ret)
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goto fail;
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if (!new_present) {
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ops->set_pfn(&se, vgpu->gtt.scratch_pt[type].page_mfn);
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ppgtt_set_shadow_entry(spt, &se, index);
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ops->set_pfn(&old_se, vgpu->gtt.scratch_pt[type].page_mfn);
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ppgtt_set_shadow_entry(spt, &old_se, index);
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}
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return 0;
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@ -1407,6 +1421,8 @@ static int ppgtt_handle_guest_write_page_table(
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return ret;
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}
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static inline bool can_do_out_of_sync(struct intel_vgpu_guest_page *gpt)
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{
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return enable_out_of_sync
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@ -1924,9 +1940,8 @@ static int emulate_ggtt_mmio_write(struct intel_vgpu *vgpu, unsigned int off,
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struct intel_vgpu_mm *ggtt_mm = vgpu->gtt.ggtt_mm;
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struct intel_gvt_gtt_pte_ops *ops = gvt->gtt.pte_ops;
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unsigned long g_gtt_index = off >> info->gtt_entry_size_shift;
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unsigned long gma, gfn;
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unsigned long gma, gfn, mfn;
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struct intel_gvt_gtt_entry e, m;
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int ret;
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if (bytes != 4 && bytes != 8)
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return -EINVAL;
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@ -1941,6 +1956,7 @@ static int emulate_ggtt_mmio_write(struct intel_vgpu *vgpu, unsigned int off,
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memcpy((void *)&e.val64 + (off & (info->gtt_entry_size - 1)), p_data,
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bytes);
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m = e;
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if (ops->test_present(&e)) {
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gfn = ops->get_pfn(&e);
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@ -1953,19 +1969,18 @@ static int emulate_ggtt_mmio_write(struct intel_vgpu *vgpu, unsigned int off,
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goto out;
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}
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ret = gtt_entry_p2m(vgpu, &e, &m);
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if (ret) {
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gvt_vgpu_err("fail to translate guest gtt entry\n");
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mfn = intel_gvt_hypervisor_gfn_to_mfn(vgpu, gfn);
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if (mfn == INTEL_GVT_INVALID_ADDR) {
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gvt_vgpu_err("fail to populate guest ggtt entry\n");
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/* guest driver may read/write the entry when partial
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* update the entry in this situation p2m will fail
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* settting the shadow entry to point to a scratch page
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*/
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ops->set_pfn(&m, gvt->gtt.scratch_mfn);
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}
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} else {
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m = e;
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} else
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ops->set_pfn(&m, mfn);
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} else
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ops->set_pfn(&m, gvt->gtt.scratch_mfn);
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}
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out:
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ggtt_set_host_entry(ggtt_mm, &m, g_gtt_index);
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