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dt-bindings: apple,aic: Add CPU PMU per-cpu pseudo-interrupts 

Advertise the two pseudo-interrupts that tied to the two PMU
flavours present in the Apple M1 SoC.

We choose the expose two different pseudo-interrupts to the OS
as the e-core PMU is obviously different from the p-core one,
effectively presenting two different devices.

Acked-by: Rob Herring <robh@kernel.org>
Reviewed-by: Hector Martin <marcan@marcan.st>
Signed-off-by: Marc Zyngier <maz@kernel.org>
This commit is contained in:
Marc Zyngier 2021-11-01 19:58:42 +00:00
parent 5a6bbd1d18
commit 74703b13f9
2 changed files with 4 additions and 0 deletions
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2
Documentation/devicetree/bindings/interrupt-controller/apple,aic.yaml
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@ -56,6 +56,8 @@ properties:
- 1: virtual HV timer - 1: virtual HV timer
- 2: physical guest timer - 2: physical guest timer
- 3: virtual guest timer - 3: virtual guest timer
- 4: 'efficient' CPU PMU
- 5: 'performance' CPU PMU
The 3rd cell contains the interrupt flags. This is normally The 3rd cell contains the interrupt flags. This is normally
IRQ_TYPE_LEVEL_HIGH (4). IRQ_TYPE_LEVEL_HIGH (4).

2
include/dt-bindings/interrupt-controller/apple-aic.h
View File

@ -11,5 +11,7 @@
#define AIC_TMR_HV_VIRT 1 #define AIC_TMR_HV_VIRT 1
#define AIC_TMR_GUEST_PHYS 2 #define AIC_TMR_GUEST_PHYS 2
#define AIC_TMR_GUEST_VIRT 3 #define AIC_TMR_GUEST_VIRT 3
#define AIC_CPU_PMU_E 4
#define AIC_CPU_PMU_P 5
#endif #endif