drm/i915: Initialize workarounds in logical ring mode too
Following the legacy ring submission example, update the ring->init_context() hook to support the execlist submission mode. v2: update to use the new workaround macros and cleanup unused code. This takes care of both bdw and chv workarounds. v2.1: Add missing call to init_context() during deferred context creation. v3: Split init_context (emit) in legacy/lrc modes. For lrc, get the ringbuf from the context (Mika/Daniel). v4: Merge init_context interfaces back, the legacy mode only needs the ring, but the lrc mode needs the ring and context (Mika). Issue: VIZ-4092 Issue: GMIN-3475 Change-Id: Ie3d093b2542ab0e2a44b90460533e2f979788d6c Cc: Deepak S <deepak.s@intel.com> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> Cc: Daniel Vetter <daniel@ffwll.ch> Signed-off-by: Michel Thierry <michel.thierry@intel.com> Signed-off-by: Arun Siluvery <arun.siluvery@linux.intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com> [danvet: Align function paramater lists properly.] Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -635,7 +635,7 @@ static int do_switch(struct intel_engine_cs *ring,
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if (uninitialized) {
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if (ring->init_context) {
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ret = ring->init_context(ring);
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ret = ring->init_context(ring, to);
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if (ret)
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DRM_ERROR("ring init context: %d\n", ret);
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}
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@ -989,6 +989,44 @@ int intel_logical_ring_begin(struct intel_ringbuffer *ringbuf, int num_dwords)
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return 0;
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}
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static int intel_logical_ring_workarounds_emit(struct intel_engine_cs *ring,
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struct intel_context *ctx)
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{
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int ret, i;
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struct intel_ringbuffer *ringbuf = ctx->engine[ring->id].ringbuf;
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struct drm_device *dev = ring->dev;
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struct drm_i915_private *dev_priv = dev->dev_private;
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struct i915_workarounds *w = &dev_priv->workarounds;
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if (WARN_ON(w->count == 0))
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return 0;
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ring->gpu_caches_dirty = true;
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ret = logical_ring_flush_all_caches(ringbuf);
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if (ret)
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return ret;
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ret = intel_logical_ring_begin(ringbuf, w->count * 2 + 2);
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if (ret)
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return ret;
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intel_logical_ring_emit(ringbuf, MI_LOAD_REGISTER_IMM(w->count));
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for (i = 0; i < w->count; i++) {
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intel_logical_ring_emit(ringbuf, w->reg[i].addr);
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intel_logical_ring_emit(ringbuf, w->reg[i].value);
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}
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intel_logical_ring_emit(ringbuf, MI_NOOP);
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intel_logical_ring_advance(ringbuf);
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ring->gpu_caches_dirty = true;
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ret = logical_ring_flush_all_caches(ringbuf);
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if (ret)
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return ret;
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return 0;
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}
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static int gen8_init_common_ring(struct intel_engine_cs *ring)
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{
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struct drm_device *dev = ring->dev;
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@ -1032,7 +1070,7 @@ static int gen8_init_render_ring(struct intel_engine_cs *ring)
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I915_WRITE(INSTPM, _MASKED_BIT_ENABLE(INSTPM_FORCE_ORDERING));
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return ret;
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return init_workarounds_ring(ring);
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}
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static int gen8_emit_bb_start(struct intel_ringbuffer *ringbuf,
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@ -1282,6 +1320,7 @@ static int logical_render_ring_init(struct drm_device *dev)
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ring->irq_keep_mask |= GT_RENDER_L3_PARITY_ERROR_INTERRUPT;
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ring->init = gen8_init_render_ring;
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ring->init_context = intel_logical_ring_workarounds_emit;
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ring->cleanup = intel_fini_pipe_control;
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ring->get_seqno = gen8_get_seqno;
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ring->set_seqno = gen8_set_seqno;
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@ -1763,6 +1802,12 @@ int intel_lr_context_deferred_create(struct intel_context *ctx,
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}
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if (ring->id == RCS && !ctx->rcs_initialized) {
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if (ring->init_context) {
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ret = ring->init_context(ring, ctx);
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if (ret)
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DRM_ERROR("ring init context: %d\n", ret);
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}
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ret = intel_lr_context_render_state_init(ring, ctx);
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if (ret) {
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DRM_ERROR("Init render state failed: %d\n", ret);
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@ -665,7 +665,8 @@ intel_init_pipe_control(struct intel_engine_cs *ring)
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return ret;
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}
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static int intel_ring_workarounds_emit(struct intel_engine_cs *ring)
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static int intel_ring_workarounds_emit(struct intel_engine_cs *ring,
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struct intel_context *ctx)
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{
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int ret, i;
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struct drm_device *dev = ring->dev;
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@ -806,7 +807,7 @@ static int chv_init_workarounds(struct intel_engine_cs *ring)
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return 0;
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}
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static int init_workarounds_ring(struct intel_engine_cs *ring)
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int init_workarounds_ring(struct intel_engine_cs *ring)
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{
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struct drm_device *dev = ring->dev;
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struct drm_i915_private *dev_priv = dev->dev_private;
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@ -148,7 +148,8 @@ struct intel_engine_cs {
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int (*init)(struct intel_engine_cs *ring);
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int (*init_context)(struct intel_engine_cs *ring);
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int (*init_context)(struct intel_engine_cs *ring,
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struct intel_context *ctx);
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void (*write_tail)(struct intel_engine_cs *ring,
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u32 value);
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@ -424,6 +425,8 @@ int intel_init_vebox_ring_buffer(struct drm_device *dev);
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u64 intel_ring_get_active_head(struct intel_engine_cs *ring);
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void intel_ring_setup_status_page(struct intel_engine_cs *ring);
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int init_workarounds_ring(struct intel_engine_cs *ring);
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static inline u32 intel_ring_get_tail(struct intel_ringbuffer *ringbuf)
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{
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return ringbuf->tail;
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