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drm/amdgpu: Reserved vram for smu to save debug info. 

v2: check reserved vram size before allocate.

Reviewed-by: Evan Quan <evan.quan@amd.com>
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Rex Zhu 2018-04-13 16:13:41 +08:00 committed by Alex Deucher
parent 3216c6b71d
commit 7951e37670
5 changed files with 88 additions and 0 deletions
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1
drivers/gpu/drm/amd/amdgpu/amdgpu.h
View File

@ -129,6 +129,7 @@ extern int amdgpu_lbpw;
extern int amdgpu_compute_multipipe;
extern int amdgpu_gpu_recovery;
extern int amdgpu_emu_mode;
extern uint amdgpu_smu_memory_pool_size;
#ifdef CONFIG_DRM_AMDGPU_SI
extern int amdgpu_si_support;

44
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
View File

@ -690,6 +690,8 @@ void amdgpu_device_gart_location(struct amdgpu_device *adev,
{
u64 size_af, size_bf;
mc->gart_size += adev->pm.smu_prv_buffer_size;
size_af = adev->gmc.mc_mask - mc->vram_end;
size_bf = mc->vram_start;
if (size_bf > size_af) {
@ -907,6 +909,46 @@ static void amdgpu_device_check_vm_size(struct amdgpu_device *adev)
}
}
static void amdgpu_device_check_smu_prv_buffer_size(struct amdgpu_device *adev)
{
struct sysinfo si;
bool is_os_64 = (sizeof(void *) == 8) ? true : false;
uint64_t total_memory;
uint64_t dram_size_seven_GB = 0x1B8000000;
uint64_t dram_size_three_GB = 0xB8000000;
if (amdgpu_smu_memory_pool_size == 0)
return;
if (!is_os_64) {
DRM_WARN("Not 64-bit OS, feature not supported\n");
goto def_value;
}
si_meminfo(&si);
total_memory = (uint64_t)si.totalram * si.mem_unit;
if ((amdgpu_smu_memory_pool_size == 1) ||
(amdgpu_smu_memory_pool_size == 2)) {
if (total_memory < dram_size_three_GB)
goto def_value1;
} else if ((amdgpu_smu_memory_pool_size == 4) ||
(amdgpu_smu_memory_pool_size == 8)) {
if (total_memory < dram_size_seven_GB)
goto def_value1;
} else {
DRM_WARN("Smu memory pool size not supported\n");
goto def_value;
}
adev->pm.smu_prv_buffer_size = amdgpu_smu_memory_pool_size << 28;
return;
def_value1:
DRM_WARN("No enough system memory\n");
def_value:
adev->pm.smu_prv_buffer_size = 0;
}
/**
* amdgpu_device_check_arguments - validate module params
*
@ -948,6 +990,8 @@ static void amdgpu_device_check_arguments(struct amdgpu_device *adev)
amdgpu_vm_fragment_size = -1;
}
amdgpu_device_check_smu_prv_buffer_size(adev);
amdgpu_device_check_vm_size(adev);
amdgpu_device_check_block_size(adev);

2
drivers/gpu/drm/amd/amdgpu/amdgpu_dpm.h
View File

@ -445,6 +445,8 @@ struct amdgpu_pm {
uint32_t pcie_gen_mask;
uint32_t pcie_mlw_mask;
struct amd_pp_display_configuration pm_display_cfg;/* set by dc */
uint32_t smu_prv_buffer_size;
struct amdgpu_bo *smu_prv_buffer;
};
#define R600_SSTU_DFLT 0

6
drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
View File

@ -132,6 +132,7 @@ int amdgpu_lbpw = -1;
int amdgpu_compute_multipipe = -1;
int amdgpu_gpu_recovery = -1; /* auto */
int amdgpu_emu_mode = 0;
uint amdgpu_smu_memory_pool_size = 0;
MODULE_PARM_DESC(vramlimit, "Restrict VRAM for testing, in megabytes");
module_param_named(vramlimit, amdgpu_vram_limit, int, 0600);
@ -316,6 +317,11 @@ MODULE_PARM_DESC(cik_support, "CIK support (1 = enabled (default), 0 = disabled)
module_param_named(cik_support, amdgpu_cik_support, int, 0444);
#endif
MODULE_PARM_DESC(smu_memory_pool_size,
"reserve gtt for smu debug usage, 0 = disable,"
"0x1 = 256Mbyte, 0x2 = 512Mbyte, 0x4 = 1 Gbyte, 0x8 = 2GByte");
module_param_named(smu_memory_pool_size, amdgpu_smu_memory_pool_size, uint, 0444);
static const struct pci_device_id pciidlist[] = {
#ifdef CONFIG_DRM_AMDGPU_SI
{0x1002, 0x6780, PCI_ANY_ID, PCI_ANY_ID, 0, 0, CHIP_TAHITI},

35
drivers/gpu/drm/amd/powerplay/amd_powerplay.c
View File

@ -145,6 +145,37 @@ static int pp_hw_fini(void *handle)
return 0;
}
static void pp_reserve_vram_for_smu(struct amdgpu_device *adev)
{
int r = -EINVAL;
void *cpu_ptr = NULL;
uint64_t gpu_addr;
struct pp_hwmgr *hwmgr = adev->powerplay.pp_handle;
if (amdgpu_bo_create_kernel(adev, adev->pm.smu_prv_buffer_size,
PAGE_SIZE, AMDGPU_GEM_DOMAIN_GTT,
&adev->pm.smu_prv_buffer,
&gpu_addr,
&cpu_ptr)) {
DRM_ERROR("amdgpu: failed to create smu prv buffer\n");
return;
}
if (hwmgr->hwmgr_func->notify_cac_buffer_info)
r = hwmgr->hwmgr_func->notify_cac_buffer_info(hwmgr,
lower_32_bits((unsigned long)cpu_ptr),
upper_32_bits((unsigned long)cpu_ptr),
lower_32_bits(gpu_addr),
upper_32_bits(gpu_addr),
adev->pm.smu_prv_buffer_size);
if (r) {
amdgpu_bo_free_kernel(&adev->pm.smu_prv_buffer, NULL, NULL);
adev->pm.smu_prv_buffer = NULL;
DRM_ERROR("amdgpu: failed to notify SMU buffer address\n");
}
}
static int pp_late_init(void *handle)
{
struct amdgpu_device *adev = handle;
@ -156,6 +187,8 @@ static int pp_late_init(void *handle)
AMD_PP_TASK_COMPLETE_INIT, NULL);
mutex_unlock(&hwmgr->smu_lock);
}
if (adev->pm.smu_prv_buffer_size != 0)
pp_reserve_vram_for_smu(adev);
return 0;
}
@ -163,6 +196,8 @@ static void pp_late_fini(void *handle)
{
struct amdgpu_device *adev = handle;
if (adev->pm.smu_prv_buffer)
amdgpu_bo_free_kernel(&adev->pm.smu_prv_buffer, NULL, NULL);
amd_powerplay_destroy(adev);
}