dt-bindings: arm: atmel: Move various sys registers out of SoC binding doc
In preparation to convert board-level bindings to json-schema, move various misc SoC bindings out to their own file. Cc: Mark Rutland <mark.rutland@arm.com> Cc: Nicolas Ferre <nicolas.ferre@microchip.com> Cc: Alexandre Belloni <alexandre.belloni@bootlin.com> Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Rob Herring <robh@kernel.org>
This commit is contained in:
Rob Herring
parent
7ac48a8198
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@ -70,173 +70,3 @@ compatible: must be one of:
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- "atmel,samv71q19"
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- "atmel,samv71q20"
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- "atmel,samv71q21"
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Chipid required properties:
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- compatible: Should be "atmel,sama5d2-chipid"
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- reg : Should contain registers location and length
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PIT Timer required properties:
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- compatible: Should be "atmel,at91sam9260-pit"
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- reg: Should contain registers location and length
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- interrupts: Should contain interrupt for the PIT which is the IRQ line
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shared across all System Controller members.
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System Timer (ST) required properties:
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- compatible: Should be "atmel,at91rm9200-st", "syscon", "simple-mfd"
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- reg: Should contain registers location and length
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- interrupts: Should contain interrupt for the ST which is the IRQ line
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shared across all System Controller members.
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- clocks: phandle to input clock.
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Its subnodes can be:
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- watchdog: compatible should be "atmel,at91rm9200-wdt"
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RSTC Reset Controller required properties:
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- compatible: Should be "atmel,<chip>-rstc".
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<chip> can be "at91sam9260" or "at91sam9g45" or "sama5d3"
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- reg: Should contain registers location and length
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- clocks: phandle to input clock.
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Example:
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rstc@fffffd00 {
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compatible = "atmel,at91sam9260-rstc";
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reg = <0xfffffd00 0x10>;
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clocks = <&clk32k>;
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};
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RAMC SDRAM/DDR Controller required properties:
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- compatible: Should be "atmel,at91rm9200-sdramc", "syscon"
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"atmel,at91sam9260-sdramc",
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"atmel,at91sam9g45-ddramc",
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"atmel,sama5d3-ddramc",
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- reg: Should contain registers location and length
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Examples:
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ramc0: ramc@ffffe800 {
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compatible = "atmel,at91sam9g45-ddramc";
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reg = <0xffffe800 0x200>;
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};
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SHDWC Shutdown Controller
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required properties:
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- compatible: Should be "atmel,<chip>-shdwc".
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<chip> can be "at91sam9260", "at91sam9rl" or "at91sam9x5".
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- reg: Should contain registers location and length
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- clocks: phandle to input clock.
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optional properties:
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- atmel,wakeup-mode: String, operation mode of the wakeup mode.
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Supported values are: "none", "high", "low", "any".
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- atmel,wakeup-counter: Counter on Wake-up 0 (between 0x0 and 0xf).
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optional at91sam9260 properties:
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- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
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optional at91sam9rl properties:
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- atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
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- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
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optional at91sam9x5 properties:
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- atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
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Example:
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shdwc@fffffd10 {
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compatible = "atmel,at91sam9260-shdwc";
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reg = <0xfffffd10 0x10>;
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clocks = <&clk32k>;
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};
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SHDWC SAMA5D2-Compatible Shutdown Controller
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1) shdwc node
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required properties:
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- compatible: should be "atmel,sama5d2-shdwc".
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- reg: should contain registers location and length
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- clocks: phandle to input clock.
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- #address-cells: should be one. The cell is the wake-up input index.
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- #size-cells: should be zero.
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optional properties:
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- debounce-delay-us: minimum wake-up inputs debouncer period in
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microseconds. It's usually a board-related property.
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- atmel,wakeup-rtc-timer: boolean to enable Real-Time Clock wake-up.
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The node contains child nodes for each wake-up input that the platform uses.
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2) input nodes
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Wake-up input nodes are usually described in the "board" part of the Device
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Tree. Note also that input 0 is linked to the wake-up pin and is frequently
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used.
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Required properties:
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- reg: should contain the wake-up input index [0 - 15].
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Optional properties:
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- atmel,wakeup-active-high: boolean, the corresponding wake-up input described
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by the child, forces the wake-up of the core power supply on a high level.
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The default is to be active low.
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Example:
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On the SoC side:
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shdwc@f8048010 {
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compatible = "atmel,sama5d2-shdwc";
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reg = <0xf8048010 0x10>;
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clocks = <&clk32k>;
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#address-cells = <1>;
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#size-cells = <0>;
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atmel,wakeup-rtc-timer;
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};
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On the board side:
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shdwc@f8048010 {
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debounce-delay-us = <976>;
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input@0 {
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reg = <0>;
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};
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input@1 {
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reg = <1>;
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atmel,wakeup-active-high;
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};
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};
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Special Function Registers (SFR)
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Special Function Registers (SFR) manage specific aspects of the integrated
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memory, bridge implementations, processor and other functionality not controlled
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elsewhere.
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required properties:
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- compatible: Should be "atmel,<chip>-sfr", "syscon" or
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"atmel,<chip>-sfrbu", "syscon"
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<chip> can be "sama5d3", "sama5d4" or "sama5d2".
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- reg: Should contain registers location and length
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sfr@f0038000 {
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compatible = "atmel,sama5d3-sfr", "syscon";
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reg = <0xf0038000 0x60>;
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};
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Security Module (SECUMOD)
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The Security Module macrocell provides all necessary secure functions to avoid
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voltage, temperature, frequency and mechanical attacks on the chip. It also
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embeds secure memories that can be scrambled
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required properties:
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- compatible: Should be "atmel,<chip>-secumod", "syscon".
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<chip> can be "sama5d2".
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- reg: Should contain registers location and length
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secumod@fc040000 {
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compatible = "atmel,sama5d2-secumod", "syscon";
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reg = <0xfc040000 0x100>;
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};
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@ -0,0 +1,171 @@
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Atmel system registers
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Chipid required properties:
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- compatible: Should be "atmel,sama5d2-chipid"
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- reg : Should contain registers location and length
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PIT Timer required properties:
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- compatible: Should be "atmel,at91sam9260-pit"
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- reg: Should contain registers location and length
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- interrupts: Should contain interrupt for the PIT which is the IRQ line
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shared across all System Controller members.
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System Timer (ST) required properties:
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- compatible: Should be "atmel,at91rm9200-st", "syscon", "simple-mfd"
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- reg: Should contain registers location and length
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- interrupts: Should contain interrupt for the ST which is the IRQ line
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shared across all System Controller members.
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- clocks: phandle to input clock.
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Its subnodes can be:
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- watchdog: compatible should be "atmel,at91rm9200-wdt"
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RSTC Reset Controller required properties:
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- compatible: Should be "atmel,<chip>-rstc".
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<chip> can be "at91sam9260" or "at91sam9g45" or "sama5d3"
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- reg: Should contain registers location and length
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- clocks: phandle to input clock.
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Example:
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rstc@fffffd00 {
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compatible = "atmel,at91sam9260-rstc";
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reg = <0xfffffd00 0x10>;
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clocks = <&clk32k>;
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};
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RAMC SDRAM/DDR Controller required properties:
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- compatible: Should be "atmel,at91rm9200-sdramc", "syscon"
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"atmel,at91sam9260-sdramc",
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"atmel,at91sam9g45-ddramc",
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"atmel,sama5d3-ddramc",
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- reg: Should contain registers location and length
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Examples:
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ramc0: ramc@ffffe800 {
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compatible = "atmel,at91sam9g45-ddramc";
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reg = <0xffffe800 0x200>;
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};
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SHDWC Shutdown Controller
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required properties:
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- compatible: Should be "atmel,<chip>-shdwc".
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<chip> can be "at91sam9260", "at91sam9rl" or "at91sam9x5".
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- reg: Should contain registers location and length
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- clocks: phandle to input clock.
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optional properties:
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- atmel,wakeup-mode: String, operation mode of the wakeup mode.
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Supported values are: "none", "high", "low", "any".
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- atmel,wakeup-counter: Counter on Wake-up 0 (between 0x0 and 0xf).
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optional at91sam9260 properties:
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- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
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optional at91sam9rl properties:
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- atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
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- atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
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optional at91sam9x5 properties:
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- atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
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Example:
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shdwc@fffffd10 {
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compatible = "atmel,at91sam9260-shdwc";
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reg = <0xfffffd10 0x10>;
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clocks = <&clk32k>;
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};
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SHDWC SAMA5D2-Compatible Shutdown Controller
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1) shdwc node
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required properties:
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- compatible: should be "atmel,sama5d2-shdwc".
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- reg: should contain registers location and length
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- clocks: phandle to input clock.
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- #address-cells: should be one. The cell is the wake-up input index.
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- #size-cells: should be zero.
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optional properties:
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- debounce-delay-us: minimum wake-up inputs debouncer period in
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microseconds. It's usually a board-related property.
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- atmel,wakeup-rtc-timer: boolean to enable Real-Time Clock wake-up.
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The node contains child nodes for each wake-up input that the platform uses.
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2) input nodes
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Wake-up input nodes are usually described in the "board" part of the Device
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Tree. Note also that input 0 is linked to the wake-up pin and is frequently
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used.
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Required properties:
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- reg: should contain the wake-up input index [0 - 15].
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Optional properties:
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- atmel,wakeup-active-high: boolean, the corresponding wake-up input described
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by the child, forces the wake-up of the core power supply on a high level.
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The default is to be active low.
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Example:
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On the SoC side:
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shdwc@f8048010 {
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compatible = "atmel,sama5d2-shdwc";
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reg = <0xf8048010 0x10>;
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clocks = <&clk32k>;
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#address-cells = <1>;
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#size-cells = <0>;
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atmel,wakeup-rtc-timer;
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};
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On the board side:
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shdwc@f8048010 {
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debounce-delay-us = <976>;
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input@0 {
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reg = <0>;
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};
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input@1 {
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reg = <1>;
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atmel,wakeup-active-high;
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};
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};
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Special Function Registers (SFR)
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Special Function Registers (SFR) manage specific aspects of the integrated
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memory, bridge implementations, processor and other functionality not controlled
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elsewhere.
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||||
|
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required properties:
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- compatible: Should be "atmel,<chip>-sfr", "syscon" or
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"atmel,<chip>-sfrbu", "syscon"
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<chip> can be "sama5d3", "sama5d4" or "sama5d2".
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- reg: Should contain registers location and length
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sfr@f0038000 {
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compatible = "atmel,sama5d3-sfr", "syscon";
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reg = <0xf0038000 0x60>;
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};
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Security Module (SECUMOD)
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The Security Module macrocell provides all necessary secure functions to avoid
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voltage, temperature, frequency and mechanical attacks on the chip. It also
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embeds secure memories that can be scrambled
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||||
|
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required properties:
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- compatible: Should be "atmel,<chip>-secumod", "syscon".
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<chip> can be "sama5d2".
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- reg: Should contain registers location and length
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secumod@fc040000 {
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compatible = "atmel,sama5d2-secumod", "syscon";
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reg = <0xfc040000 0x100>;
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};
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