Add a driver for Renesas uPD60620 and uPD60620A PHYs
Signed-off-by: Bernd Edlinger <bernd.edlinger@hotmail.de> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -366,6 +366,11 @@ config REALTEK_PHY
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---help---
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Supports the Realtek 821x PHY.
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config RENESAS_PHY
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tristate "Driver for Renesas PHYs"
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---help---
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Supports the Renesas PHYs uPD60620 and uPD60620A.
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config ROCKCHIP_PHY
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tristate "Driver for Rockchip Ethernet PHYs"
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---help---
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@ -72,6 +72,7 @@ obj-$(CONFIG_MICROSEMI_PHY) += mscc.o
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obj-$(CONFIG_NATIONAL_PHY) += national.o
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obj-$(CONFIG_QSEMI_PHY) += qsemi.o
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obj-$(CONFIG_REALTEK_PHY) += realtek.o
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obj-$(CONFIG_RENESAS_PHY) += uPD60620.o
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obj-$(CONFIG_ROCKCHIP_PHY) += rockchip.o
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obj-$(CONFIG_SMSC_PHY) += smsc.o
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obj-$(CONFIG_STE10XP) += ste10Xp.o
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@ -0,0 +1,109 @@
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/*
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* Driver for the Renesas PHY uPD60620.
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*
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* Copyright (C) 2015 Softing Industrial Automation GmbH
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/phy.h>
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#define UPD60620_PHY_ID 0xb8242824
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/* Extended Registers and values */
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/* PHY Special Control/Status */
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#define PHY_PHYSCR 0x1F /* PHY.31 */
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#define PHY_PHYSCR_10MB 0x0004 /* PHY speed = 10mb */
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#define PHY_PHYSCR_100MB 0x0008 /* PHY speed = 100mb */
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#define PHY_PHYSCR_DUPLEX 0x0010 /* PHY Duplex */
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/* PHY Special Modes */
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#define PHY_SPM 0x12 /* PHY.18 */
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/* Init PHY */
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static int upd60620_config_init(struct phy_device *phydev)
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{
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/* Enable support for passive HUBs (could be a strap option) */
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/* PHYMODE: All speeds, HD in parallel detect */
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return phy_write(phydev, PHY_SPM, 0x0180 | phydev->mdio.addr);
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}
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/* Get PHY status from common registers */
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static int upd60620_read_status(struct phy_device *phydev)
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{
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int phy_state;
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/* Read negotiated state */
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phy_state = phy_read(phydev, MII_BMSR);
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if (phy_state < 0)
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return phy_state;
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phydev->link = 0;
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phydev->lp_advertising = 0;
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phydev->pause = 0;
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phydev->asym_pause = 0;
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if (phy_state & (BMSR_ANEGCOMPLETE | BMSR_LSTATUS)) {
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phy_state = phy_read(phydev, PHY_PHYSCR);
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if (phy_state < 0)
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return phy_state;
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if (phy_state & (PHY_PHYSCR_10MB | PHY_PHYSCR_100MB)) {
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phydev->link = 1;
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phydev->speed = SPEED_10;
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phydev->duplex = DUPLEX_HALF;
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if (phy_state & PHY_PHYSCR_100MB)
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phydev->speed = SPEED_100;
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if (phy_state & PHY_PHYSCR_DUPLEX)
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phydev->duplex = DUPLEX_FULL;
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phy_state = phy_read(phydev, MII_LPA);
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if (phy_state < 0)
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return phy_state;
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phydev->lp_advertising
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= mii_lpa_to_ethtool_lpa_t(phy_state);
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if (phydev->duplex == DUPLEX_FULL) {
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if (phy_state & LPA_PAUSE_CAP)
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phydev->pause = 1;
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if (phy_state & LPA_PAUSE_ASYM)
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phydev->asym_pause = 1;
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}
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}
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}
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return 0;
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}
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MODULE_DESCRIPTION("Renesas uPD60620 PHY driver");
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MODULE_AUTHOR("Bernd Edlinger <bernd.edlinger@hotmail.de>");
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MODULE_LICENSE("GPL");
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static struct phy_driver upd60620_driver[1] = { {
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.phy_id = UPD60620_PHY_ID,
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.phy_id_mask = 0xfffffffe,
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.name = "Renesas uPD60620",
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.features = PHY_BASIC_FEATURES,
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.flags = 0,
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.config_init = upd60620_config_init,
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.config_aneg = genphy_config_aneg,
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.read_status = upd60620_read_status,
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} };
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module_phy_driver(upd60620_driver);
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static struct mdio_device_id __maybe_unused upd60620_tbl[] = {
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{ UPD60620_PHY_ID, 0xfffffffe },
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{ }
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};
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MODULE_DEVICE_TABLE(mdio, upd60620_tbl);
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