Staging: olpc_dcon: Remove obsolete driver
Remove support for One Laptop Per Child organization since it is dead. http://www.olpcnews.com/about_olpc_news/goodbye_one_laptop_per_child.html Signed-off-by: Shraddha Barke <shraddha.6596@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
parent
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commit
82ef33af9d
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@ -10392,14 +10392,6 @@ L: linux-tegra@vger.kernel.org
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S: Maintained
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F: drivers/staging/nvec/
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STAGING - OLPC SECONDARY DISPLAY CONTROLLER (DCON)
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M: Jens Frederich <jfrederich@gmail.com>
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M: Daniel Drake <dsd@laptop.org>
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M: Jon Nettleton <jon.nettleton@gmail.com>
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W: http://wiki.laptop.org/go/DCON
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S: Maintained
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F: drivers/staging/olpc_dcon/
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STAGING - PARALLEL LCD/KEYPAD PANEL DRIVER
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M: Willy Tarreau <willy@haproxy.com>
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S: Odd Fixes
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@ -30,8 +30,6 @@ source "drivers/staging/wlan-ng/Kconfig"
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source "drivers/staging/comedi/Kconfig"
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source "drivers/staging/olpc_dcon/Kconfig"
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source "drivers/staging/panel/Kconfig"
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source "drivers/staging/rtl8192u/Kconfig"
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@ -7,7 +7,6 @@ obj-y += media/
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obj-$(CONFIG_SLICOSS) += slicoss/
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obj-$(CONFIG_PRISM2_USB) += wlan-ng/
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obj-$(CONFIG_COMEDI) += comedi/
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obj-$(CONFIG_FB_OLPC_DCON) += olpc_dcon/
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obj-$(CONFIG_PANEL) += panel/
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obj-$(CONFIG_RTL8192U) += rtl8192u/
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obj-$(CONFIG_RTL8192E) += rtl8192e/
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@ -1,35 +0,0 @@
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config FB_OLPC_DCON
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tristate "One Laptop Per Child Display CONtroller support"
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depends on OLPC && FB
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depends on I2C
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depends on (GPIO_CS5535 || GPIO_CS5535=n)
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select BACKLIGHT_CLASS_DEVICE
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---help---
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In order to support very low power operation, the XO laptop uses a
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secondary Display CONtroller, or DCON. This secondary controller
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is present in the video pipeline between the primary display
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controller (integrate into the processor or chipset) and the LCD
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panel. It allows the main processor/display controller to be
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completely powered off while still retaining an image on the display.
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This controller is only available on OLPC platforms. Unless you have
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one of these platforms, you will want to say 'N'.
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config FB_OLPC_DCON_1
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bool "OLPC XO-1 DCON support"
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depends on FB_OLPC_DCON && GPIO_CS5535
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default y
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---help---
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Enable support for the DCON in XO-1 model laptops. The kernel
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communicates with the DCON using model-specific code. If you
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have an XO-1 (or if you're unsure what model you have), you should
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say 'Y'.
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config FB_OLPC_DCON_1_5
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bool "OLPC XO-1.5 DCON support"
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depends on FB_OLPC_DCON && ACPI
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default y
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---help---
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Enable support for the DCON in XO-1.5 model laptops. The kernel
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communicates with the DCON using model-specific code. If you
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have an XO-1.5 (or if you're unsure what model you have), you
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should say 'Y'.
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@ -1,6 +0,0 @@
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olpc-dcon-objs += olpc_dcon.o
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olpc-dcon-$(CONFIG_FB_OLPC_DCON_1) += olpc_dcon_xo_1.o
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olpc-dcon-$(CONFIG_FB_OLPC_DCON_1_5) += olpc_dcon_xo_1_5.o
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obj-$(CONFIG_FB_OLPC_DCON) += olpc-dcon.o
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@ -1,9 +0,0 @@
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TODO:
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- see if vx855 gpio API can be made similar enough to cs5535 so we can
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share more code
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- allow simultaneous XO-1 and XO-1.5 support
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Please send patches to Greg Kroah-Hartman <greg@kroah.com> and
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copy:
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Daniel Drake <dsd@laptop.org>
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Jens Frederich <jfrederich@gmail.com>
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@ -1,813 +0,0 @@
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/*
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* Mainly by David Woodhouse, somewhat modified by Jordan Crouse
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*
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* Copyright © 2006-2007 Red Hat, Inc.
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* Copyright © 2006-2007 Advanced Micro Devices, Inc.
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* Copyright © 2009 VIA Technology, Inc.
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* Copyright (c) 2010-2011 Andres Salomon <dilinger@queued.net>
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*
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* This program is free software. You can redistribute it and/or
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* modify it under the terms of version 2 of the GNU General Public
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* License as published by the Free Software Foundation.
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/kernel.h>
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#include <linux/fb.h>
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#include <linux/console.h>
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#include <linux/i2c.h>
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#include <linux/platform_device.h>
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#include <linux/interrupt.h>
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#include <linux/delay.h>
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#include <linux/module.h>
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#include <linux/backlight.h>
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#include <linux/device.h>
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#include <linux/uaccess.h>
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#include <linux/ctype.h>
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#include <linux/reboot.h>
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#include <linux/olpc-ec.h>
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#include <asm/tsc.h>
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#include <asm/olpc.h>
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#include "olpc_dcon.h"
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/* Module definitions */
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static ushort resumeline = 898;
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module_param(resumeline, ushort, 0444);
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static struct dcon_platform_data *pdata;
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/* I2C structures */
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/* Platform devices */
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static struct platform_device *dcon_device;
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static unsigned short normal_i2c[] = { 0x0d, I2C_CLIENT_END };
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static s32 dcon_write(struct dcon_priv *dcon, u8 reg, u16 val)
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{
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return i2c_smbus_write_word_data(dcon->client, reg, val);
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}
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static s32 dcon_read(struct dcon_priv *dcon, u8 reg)
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{
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return i2c_smbus_read_word_data(dcon->client, reg);
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}
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/* ===== API functions - these are called by a variety of users ==== */
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static int dcon_hw_init(struct dcon_priv *dcon, int is_init)
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{
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u16 ver;
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int rc = 0;
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ver = dcon_read(dcon, DCON_REG_ID);
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if ((ver >> 8) != 0xDC) {
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pr_err("DCON ID not 0xDCxx: 0x%04x instead.\n", ver);
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rc = -ENXIO;
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goto err;
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}
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if (is_init) {
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pr_info("Discovered DCON version %x\n", ver & 0xFF);
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rc = pdata->init(dcon);
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if (rc != 0) {
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pr_err("Unable to init.\n");
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goto err;
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}
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}
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if (ver < 0xdc02) {
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dev_err(&dcon->client->dev,
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"DCON v1 is unsupported, giving up..\n");
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rc = -ENODEV;
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goto err;
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}
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/* SDRAM setup/hold time */
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dcon_write(dcon, 0x3a, 0xc040);
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dcon_write(dcon, DCON_REG_MEM_OPT_A, 0x0000); /* clear option bits */
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dcon_write(dcon, DCON_REG_MEM_OPT_A,
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MEM_DLL_CLOCK_DELAY | MEM_POWER_DOWN);
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dcon_write(dcon, DCON_REG_MEM_OPT_B, MEM_SOFT_RESET);
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/* Colour swizzle, AA, no passthrough, backlight */
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if (is_init) {
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dcon->disp_mode = MODE_PASSTHRU | MODE_BL_ENABLE |
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MODE_CSWIZZLE | MODE_COL_AA;
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}
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dcon_write(dcon, DCON_REG_MODE, dcon->disp_mode);
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/* Set the scanline to interrupt on during resume */
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dcon_write(dcon, DCON_REG_SCAN_INT, resumeline);
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err:
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return rc;
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}
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/*
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* The smbus doesn't always come back due to what is believed to be
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* hardware (power rail) bugs. For older models where this is known to
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* occur, our solution is to attempt to wait for the bus to stabilize;
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* if it doesn't happen, cut power to the dcon, repower it, and wait
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* for the bus to stabilize. Rinse, repeat until we have a working
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* smbus. For newer models, we simply BUG(); we want to know if this
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* still happens despite the power fixes that have been made!
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*/
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static int dcon_bus_stabilize(struct dcon_priv *dcon, int is_powered_down)
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{
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unsigned long timeout;
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u8 pm;
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int x;
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power_up:
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if (is_powered_down) {
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pm = 1;
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x = olpc_ec_cmd(EC_DCON_POWER_MODE, &pm, 1, NULL, 0);
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if (x) {
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pr_warn("unable to force dcon to power up: %d!\n", x);
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return x;
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}
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usleep_range(10000, 11000); /* we'll be conservative */
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}
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pdata->bus_stabilize_wiggle();
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for (x = -1, timeout = 50; timeout && x < 0; timeout--) {
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usleep_range(1000, 1100);
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x = dcon_read(dcon, DCON_REG_ID);
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}
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if (x < 0) {
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pr_err("unable to stabilize dcon's smbus, reasserting power and praying.\n");
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BUG_ON(olpc_board_at_least(olpc_board(0xc2)));
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pm = 0;
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olpc_ec_cmd(EC_DCON_POWER_MODE, &pm, 1, NULL, 0);
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msleep(100);
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is_powered_down = 1;
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goto power_up; /* argh, stupid hardware.. */
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}
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if (is_powered_down)
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return dcon_hw_init(dcon, 0);
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return 0;
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}
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static void dcon_set_backlight(struct dcon_priv *dcon, u8 level)
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{
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dcon->bl_val = level;
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dcon_write(dcon, DCON_REG_BRIGHT, dcon->bl_val);
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/* Purposely turn off the backlight when we go to level 0 */
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if (dcon->bl_val == 0) {
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dcon->disp_mode &= ~MODE_BL_ENABLE;
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dcon_write(dcon, DCON_REG_MODE, dcon->disp_mode);
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} else if (!(dcon->disp_mode & MODE_BL_ENABLE)) {
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dcon->disp_mode |= MODE_BL_ENABLE;
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dcon_write(dcon, DCON_REG_MODE, dcon->disp_mode);
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}
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}
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/* Set the output type to either color or mono */
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static int dcon_set_mono_mode(struct dcon_priv *dcon, bool enable_mono)
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{
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if (dcon->mono == enable_mono)
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return 0;
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dcon->mono = enable_mono;
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if (enable_mono) {
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dcon->disp_mode &= ~(MODE_CSWIZZLE | MODE_COL_AA);
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dcon->disp_mode |= MODE_MONO_LUMA;
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} else {
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dcon->disp_mode &= ~(MODE_MONO_LUMA);
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dcon->disp_mode |= MODE_CSWIZZLE | MODE_COL_AA;
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}
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dcon_write(dcon, DCON_REG_MODE, dcon->disp_mode);
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return 0;
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}
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/* For now, this will be really stupid - we need to address how
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* DCONLOAD works in a sleep and account for it accordingly
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*/
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static void dcon_sleep(struct dcon_priv *dcon, bool sleep)
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{
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int x;
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/* Turn off the backlight and put the DCON to sleep */
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if (dcon->asleep == sleep)
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return;
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if (!olpc_board_at_least(olpc_board(0xc2)))
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return;
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if (sleep) {
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u8 pm = 0;
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x = olpc_ec_cmd(EC_DCON_POWER_MODE, &pm, 1, NULL, 0);
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if (x)
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pr_warn("unable to force dcon to power down: %d!\n", x);
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else
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dcon->asleep = sleep;
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} else {
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/* Only re-enable the backlight if the backlight value is set */
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if (dcon->bl_val != 0)
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dcon->disp_mode |= MODE_BL_ENABLE;
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x = dcon_bus_stabilize(dcon, 1);
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if (x)
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pr_warn("unable to reinit dcon hardware: %d!\n", x);
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else
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dcon->asleep = sleep;
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/* Restore backlight */
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dcon_set_backlight(dcon, dcon->bl_val);
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}
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/* We should turn off some stuff in the framebuffer - but what? */
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}
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/* the DCON seems to get confused if we change DCONLOAD too
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* frequently -- i.e., approximately faster than frame time.
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* normally we don't change it this fast, so in general we won't
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* delay here.
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*/
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static void dcon_load_holdoff(struct dcon_priv *dcon)
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{
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ktime_t delta_t, now;
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while (1) {
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now = ktime_get();
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delta_t = ktime_sub(now, dcon->load_time);
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if (ktime_to_ns(delta_t) > NSEC_PER_MSEC * 20)
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break;
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mdelay(4);
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}
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}
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static bool dcon_blank_fb(struct dcon_priv *dcon, bool blank)
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{
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int err;
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console_lock();
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if (!lock_fb_info(dcon->fbinfo)) {
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console_unlock();
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dev_err(&dcon->client->dev, "unable to lock framebuffer\n");
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return false;
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}
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dcon->ignore_fb_events = true;
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err = fb_blank(dcon->fbinfo,
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blank ? FB_BLANK_POWERDOWN : FB_BLANK_UNBLANK);
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dcon->ignore_fb_events = false;
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unlock_fb_info(dcon->fbinfo);
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console_unlock();
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if (err) {
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dev_err(&dcon->client->dev, "couldn't %sblank framebuffer\n",
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blank ? "" : "un");
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return false;
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}
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return true;
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}
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/* Set the source of the display (CPU or DCON) */
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static void dcon_source_switch(struct work_struct *work)
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{
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struct dcon_priv *dcon = container_of(work, struct dcon_priv,
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switch_source);
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int source = dcon->pending_src;
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if (dcon->curr_src == source)
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return;
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dcon_load_holdoff(dcon);
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dcon->switched = false;
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switch (source) {
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case DCON_SOURCE_CPU:
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pr_info("dcon_source_switch to CPU\n");
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/* Enable the scanline interrupt bit */
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if (dcon_write(dcon, DCON_REG_MODE,
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dcon->disp_mode | MODE_SCAN_INT))
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pr_err("couldn't enable scanline interrupt!\n");
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else
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/* Wait up to one second for the scanline interrupt */
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wait_event_timeout(dcon->waitq, dcon->switched, HZ);
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if (!dcon->switched)
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pr_err("Timeout entering CPU mode; expect a screen glitch.\n");
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/* Turn off the scanline interrupt */
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if (dcon_write(dcon, DCON_REG_MODE, dcon->disp_mode))
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pr_err("couldn't disable scanline interrupt!\n");
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/*
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* Ideally we'd like to disable interrupts here so that the
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* fb unblanking and DCON turn on happen at a known time value;
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* however, we can't do that right now with fb_blank
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* messing with semaphores.
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*
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* For now, we just hope..
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*/
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if (!dcon_blank_fb(dcon, false)) {
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pr_err("Failed to enter CPU mode\n");
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dcon->pending_src = DCON_SOURCE_DCON;
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return;
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}
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/* And turn off the DCON */
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pdata->set_dconload(1);
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dcon->load_time = ktime_get();
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pr_info("The CPU has control\n");
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break;
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case DCON_SOURCE_DCON:
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{
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ktime_t delta_t;
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pr_info("dcon_source_switch to DCON\n");
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/* Clear DCONLOAD - this implies that the DCON is in control */
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pdata->set_dconload(0);
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dcon->load_time = ktime_get();
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wait_event_timeout(dcon->waitq, dcon->switched, HZ/2);
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if (!dcon->switched) {
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pr_err("Timeout entering DCON mode; expect a screen glitch.\n");
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} else {
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/* sometimes the DCON doesn't follow its own rules,
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* and doesn't wait for two vsync pulses before
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* ack'ing the frame load with an IRQ. the result
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* is that the display shows the *previously*
|
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* loaded frame. we can detect this by looking at
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* the time between asserting DCONLOAD and the IRQ --
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* if it's less than 20msec, then the DCON couldn't
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* have seen two VSYNC pulses. in that case we
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* deassert and reassert, and hope for the best.
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* see http://dev.laptop.org/ticket/9664
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*/
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delta_t = ktime_sub(dcon->irq_time, dcon->load_time);
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if (dcon->switched && ktime_to_ns(delta_t)
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< NSEC_PER_MSEC * 20) {
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pr_err("missed loading, retrying\n");
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pdata->set_dconload(1);
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mdelay(41);
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||||
pdata->set_dconload(0);
|
||||
dcon->load_time = ktime_get();
|
||||
mdelay(41);
|
||||
}
|
||||
}
|
||||
|
||||
dcon_blank_fb(dcon, true);
|
||||
pr_info("The DCON has control\n");
|
||||
break;
|
||||
}
|
||||
default:
|
||||
BUG();
|
||||
}
|
||||
|
||||
dcon->curr_src = source;
|
||||
}
|
||||
|
||||
static void dcon_set_source(struct dcon_priv *dcon, int arg)
|
||||
{
|
||||
if (dcon->pending_src == arg)
|
||||
return;
|
||||
|
||||
dcon->pending_src = arg;
|
||||
|
||||
if (dcon->curr_src != arg)
|
||||
schedule_work(&dcon->switch_source);
|
||||
}
|
||||
|
||||
static void dcon_set_source_sync(struct dcon_priv *dcon, int arg)
|
||||
{
|
||||
dcon_set_source(dcon, arg);
|
||||
flush_scheduled_work();
|
||||
}
|
||||
|
||||
static ssize_t dcon_mode_show(struct device *dev,
|
||||
struct device_attribute *attr, char *buf)
|
||||
{
|
||||
struct dcon_priv *dcon = dev_get_drvdata(dev);
|
||||
|
||||
return sprintf(buf, "%4.4X\n", dcon->disp_mode);
|
||||
}
|
||||
|
||||
static ssize_t dcon_sleep_show(struct device *dev,
|
||||
struct device_attribute *attr, char *buf)
|
||||
{
|
||||
struct dcon_priv *dcon = dev_get_drvdata(dev);
|
||||
|
||||
return sprintf(buf, "%d\n", dcon->asleep);
|
||||
}
|
||||
|
||||
static ssize_t dcon_freeze_show(struct device *dev,
|
||||
struct device_attribute *attr, char *buf)
|
||||
{
|
||||
struct dcon_priv *dcon = dev_get_drvdata(dev);
|
||||
|
||||
return sprintf(buf, "%d\n", dcon->curr_src == DCON_SOURCE_DCON ? 1 : 0);
|
||||
}
|
||||
|
||||
static ssize_t dcon_mono_show(struct device *dev,
|
||||
struct device_attribute *attr, char *buf)
|
||||
{
|
||||
struct dcon_priv *dcon = dev_get_drvdata(dev);
|
||||
|
||||
return sprintf(buf, "%d\n", dcon->mono);
|
||||
}
|
||||
|
||||
static ssize_t dcon_resumeline_show(struct device *dev,
|
||||
struct device_attribute *attr, char *buf)
|
||||
{
|
||||
return sprintf(buf, "%d\n", resumeline);
|
||||
}
|
||||
|
||||
static ssize_t dcon_mono_store(struct device *dev,
|
||||
struct device_attribute *attr, const char *buf, size_t count)
|
||||
{
|
||||
unsigned long enable_mono;
|
||||
int rc;
|
||||
|
||||
rc = kstrtoul(buf, 10, &enable_mono);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
dcon_set_mono_mode(dev_get_drvdata(dev), enable_mono ? true : false);
|
||||
|
||||
return count;
|
||||
}
|
||||
|
||||
static ssize_t dcon_freeze_store(struct device *dev,
|
||||
struct device_attribute *attr, const char *buf, size_t count)
|
||||
{
|
||||
struct dcon_priv *dcon = dev_get_drvdata(dev);
|
||||
unsigned long output;
|
||||
int ret;
|
||||
|
||||
ret = kstrtoul(buf, 10, &output);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
pr_info("dcon_freeze_store: %lu\n", output);
|
||||
|
||||
switch (output) {
|
||||
case 0:
|
||||
dcon_set_source(dcon, DCON_SOURCE_CPU);
|
||||
break;
|
||||
case 1:
|
||||
dcon_set_source_sync(dcon, DCON_SOURCE_DCON);
|
||||
break;
|
||||
case 2: /* normally unused */
|
||||
dcon_set_source(dcon, DCON_SOURCE_DCON);
|
||||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
return count;
|
||||
}
|
||||
|
||||
static ssize_t dcon_resumeline_store(struct device *dev,
|
||||
struct device_attribute *attr, const char *buf, size_t count)
|
||||
{
|
||||
unsigned short rl;
|
||||
int rc;
|
||||
|
||||
rc = kstrtou16(buf, 10, &rl);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
resumeline = rl;
|
||||
dcon_write(dev_get_drvdata(dev), DCON_REG_SCAN_INT, resumeline);
|
||||
|
||||
return count;
|
||||
}
|
||||
|
||||
static ssize_t dcon_sleep_store(struct device *dev,
|
||||
struct device_attribute *attr, const char *buf, size_t count)
|
||||
{
|
||||
unsigned long output;
|
||||
int ret;
|
||||
|
||||
ret = kstrtoul(buf, 10, &output);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
dcon_sleep(dev_get_drvdata(dev), output ? true : false);
|
||||
return count;
|
||||
}
|
||||
|
||||
static struct device_attribute dcon_device_files[] = {
|
||||
__ATTR(mode, 0444, dcon_mode_show, NULL),
|
||||
__ATTR(sleep, 0644, dcon_sleep_show, dcon_sleep_store),
|
||||
__ATTR(freeze, 0644, dcon_freeze_show, dcon_freeze_store),
|
||||
__ATTR(monochrome, 0644, dcon_mono_show, dcon_mono_store),
|
||||
__ATTR(resumeline, 0644, dcon_resumeline_show, dcon_resumeline_store),
|
||||
};
|
||||
|
||||
static int dcon_bl_update(struct backlight_device *dev)
|
||||
{
|
||||
struct dcon_priv *dcon = bl_get_data(dev);
|
||||
u8 level = dev->props.brightness & 0x0F;
|
||||
|
||||
if (dev->props.power != FB_BLANK_UNBLANK)
|
||||
level = 0;
|
||||
|
||||
if (level != dcon->bl_val)
|
||||
dcon_set_backlight(dcon, level);
|
||||
|
||||
/* power down the DCON when the screen is blanked */
|
||||
if (!dcon->ignore_fb_events)
|
||||
dcon_sleep(dcon, !!(dev->props.state & BL_CORE_FBBLANK));
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int dcon_bl_get(struct backlight_device *dev)
|
||||
{
|
||||
struct dcon_priv *dcon = bl_get_data(dev);
|
||||
|
||||
return dcon->bl_val;
|
||||
}
|
||||
|
||||
static const struct backlight_ops dcon_bl_ops = {
|
||||
.update_status = dcon_bl_update,
|
||||
.get_brightness = dcon_bl_get,
|
||||
};
|
||||
|
||||
static struct backlight_properties dcon_bl_props = {
|
||||
.max_brightness = 15,
|
||||
.type = BACKLIGHT_RAW,
|
||||
.power = FB_BLANK_UNBLANK,
|
||||
};
|
||||
|
||||
static int dcon_reboot_notify(struct notifier_block *nb,
|
||||
unsigned long foo, void *bar)
|
||||
{
|
||||
struct dcon_priv *dcon = container_of(nb, struct dcon_priv, reboot_nb);
|
||||
|
||||
if (!dcon || !dcon->client)
|
||||
return NOTIFY_DONE;
|
||||
|
||||
/* Turn off the DCON. Entirely. */
|
||||
dcon_write(dcon, DCON_REG_MODE, 0x39);
|
||||
dcon_write(dcon, DCON_REG_MODE, 0x32);
|
||||
return NOTIFY_DONE;
|
||||
}
|
||||
|
||||
static int unfreeze_on_panic(struct notifier_block *nb,
|
||||
unsigned long e, void *p)
|
||||
{
|
||||
pdata->set_dconload(1);
|
||||
return NOTIFY_DONE;
|
||||
}
|
||||
|
||||
static struct notifier_block dcon_panic_nb = {
|
||||
.notifier_call = unfreeze_on_panic,
|
||||
};
|
||||
|
||||
static int dcon_detect(struct i2c_client *client, struct i2c_board_info *info)
|
||||
{
|
||||
strlcpy(info->type, "olpc_dcon", I2C_NAME_SIZE);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int dcon_probe(struct i2c_client *client, const struct i2c_device_id *id)
|
||||
{
|
||||
struct dcon_priv *dcon;
|
||||
int rc, i, j;
|
||||
|
||||
if (!pdata)
|
||||
return -ENXIO;
|
||||
|
||||
dcon = kzalloc(sizeof(*dcon), GFP_KERNEL);
|
||||
if (!dcon)
|
||||
return -ENOMEM;
|
||||
|
||||
dcon->client = client;
|
||||
init_waitqueue_head(&dcon->waitq);
|
||||
INIT_WORK(&dcon->switch_source, dcon_source_switch);
|
||||
dcon->reboot_nb.notifier_call = dcon_reboot_notify;
|
||||
dcon->reboot_nb.priority = -1;
|
||||
|
||||
i2c_set_clientdata(client, dcon);
|
||||
|
||||
if (num_registered_fb < 1) {
|
||||
dev_err(&client->dev, "DCON driver requires a registered fb\n");
|
||||
rc = -EIO;
|
||||
goto einit;
|
||||
}
|
||||
dcon->fbinfo = registered_fb[0];
|
||||
|
||||
rc = dcon_hw_init(dcon, 1);
|
||||
if (rc)
|
||||
goto einit;
|
||||
|
||||
/* Add the DCON device */
|
||||
|
||||
dcon_device = platform_device_alloc("dcon", -1);
|
||||
|
||||
if (!dcon_device) {
|
||||
pr_err("Unable to create the DCON device\n");
|
||||
rc = -ENOMEM;
|
||||
goto eirq;
|
||||
}
|
||||
rc = platform_device_add(dcon_device);
|
||||
platform_set_drvdata(dcon_device, dcon);
|
||||
|
||||
if (rc) {
|
||||
pr_err("Unable to add the DCON device\n");
|
||||
goto edev;
|
||||
}
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(dcon_device_files); i++) {
|
||||
rc = device_create_file(&dcon_device->dev,
|
||||
&dcon_device_files[i]);
|
||||
if (rc) {
|
||||
dev_err(&dcon_device->dev, "Cannot create sysfs file\n");
|
||||
goto ecreate;
|
||||
}
|
||||
}
|
||||
|
||||
dcon->bl_val = dcon_read(dcon, DCON_REG_BRIGHT) & 0x0F;
|
||||
|
||||
/* Add the backlight device for the DCON */
|
||||
dcon_bl_props.brightness = dcon->bl_val;
|
||||
dcon->bl_dev = backlight_device_register("dcon-bl", &dcon_device->dev,
|
||||
dcon, &dcon_bl_ops, &dcon_bl_props);
|
||||
if (IS_ERR(dcon->bl_dev)) {
|
||||
dev_err(&client->dev, "cannot register backlight dev (%ld)\n",
|
||||
PTR_ERR(dcon->bl_dev));
|
||||
dcon->bl_dev = NULL;
|
||||
}
|
||||
|
||||
register_reboot_notifier(&dcon->reboot_nb);
|
||||
atomic_notifier_chain_register(&panic_notifier_list, &dcon_panic_nb);
|
||||
|
||||
return 0;
|
||||
|
||||
ecreate:
|
||||
for (j = 0; j < i; j++)
|
||||
device_remove_file(&dcon_device->dev, &dcon_device_files[j]);
|
||||
edev:
|
||||
platform_device_unregister(dcon_device);
|
||||
dcon_device = NULL;
|
||||
eirq:
|
||||
free_irq(DCON_IRQ, dcon);
|
||||
einit:
|
||||
kfree(dcon);
|
||||
return rc;
|
||||
}
|
||||
|
||||
static int dcon_remove(struct i2c_client *client)
|
||||
{
|
||||
struct dcon_priv *dcon = i2c_get_clientdata(client);
|
||||
|
||||
unregister_reboot_notifier(&dcon->reboot_nb);
|
||||
atomic_notifier_chain_unregister(&panic_notifier_list, &dcon_panic_nb);
|
||||
|
||||
free_irq(DCON_IRQ, dcon);
|
||||
|
||||
backlight_device_unregister(dcon->bl_dev);
|
||||
|
||||
if (dcon_device)
|
||||
platform_device_unregister(dcon_device);
|
||||
cancel_work_sync(&dcon->switch_source);
|
||||
|
||||
kfree(dcon);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
static int dcon_suspend(struct device *dev)
|
||||
{
|
||||
struct i2c_client *client = to_i2c_client(dev);
|
||||
struct dcon_priv *dcon = i2c_get_clientdata(client);
|
||||
|
||||
if (!dcon->asleep) {
|
||||
/* Set up the DCON to have the source */
|
||||
dcon_set_source_sync(dcon, DCON_SOURCE_DCON);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int dcon_resume(struct device *dev)
|
||||
{
|
||||
struct i2c_client *client = to_i2c_client(dev);
|
||||
struct dcon_priv *dcon = i2c_get_clientdata(client);
|
||||
|
||||
if (!dcon->asleep) {
|
||||
dcon_bus_stabilize(dcon, 0);
|
||||
dcon_set_source(dcon, DCON_SOURCE_CPU);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
#else
|
||||
|
||||
#define dcon_suspend NULL
|
||||
#define dcon_resume NULL
|
||||
|
||||
#endif /* CONFIG_PM */
|
||||
|
||||
irqreturn_t dcon_interrupt(int irq, void *id)
|
||||
{
|
||||
struct dcon_priv *dcon = id;
|
||||
u8 status;
|
||||
|
||||
if (pdata->read_status(&status))
|
||||
return IRQ_NONE;
|
||||
|
||||
switch (status & 3) {
|
||||
case 3:
|
||||
pr_debug("DCONLOAD_MISSED interrupt\n");
|
||||
break;
|
||||
|
||||
case 2: /* switch to DCON mode */
|
||||
case 1: /* switch to CPU mode */
|
||||
dcon->switched = true;
|
||||
dcon->irq_time = ktime_get();
|
||||
wake_up(&dcon->waitq);
|
||||
break;
|
||||
|
||||
case 0:
|
||||
/* workaround resume case: the DCON (on 1.5) doesn't
|
||||
* ever assert status 0x01 when switching to CPU mode
|
||||
* during resume. this is because DCONLOAD is de-asserted
|
||||
* _immediately_ upon exiting S3, so the actual release
|
||||
* of the DCON happened long before this point.
|
||||
* see http://dev.laptop.org/ticket/9869
|
||||
*/
|
||||
if (dcon->curr_src != dcon->pending_src && !dcon->switched) {
|
||||
dcon->switched = true;
|
||||
dcon->irq_time = ktime_get();
|
||||
wake_up(&dcon->waitq);
|
||||
pr_debug("switching w/ status 0/0\n");
|
||||
} else {
|
||||
pr_debug("scanline interrupt w/CPU\n");
|
||||
}
|
||||
}
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static const struct dev_pm_ops dcon_pm_ops = {
|
||||
.suspend = dcon_suspend,
|
||||
.resume = dcon_resume,
|
||||
};
|
||||
|
||||
static const struct i2c_device_id dcon_idtable[] = {
|
||||
{ "olpc_dcon", 0 },
|
||||
{ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(i2c, dcon_idtable);
|
||||
|
||||
static struct i2c_driver dcon_driver = {
|
||||
.driver = {
|
||||
.name = "olpc_dcon",
|
||||
.pm = &dcon_pm_ops,
|
||||
},
|
||||
.class = I2C_CLASS_DDC | I2C_CLASS_HWMON,
|
||||
.id_table = dcon_idtable,
|
||||
.probe = dcon_probe,
|
||||
.remove = dcon_remove,
|
||||
.detect = dcon_detect,
|
||||
.address_list = normal_i2c,
|
||||
};
|
||||
|
||||
static int __init olpc_dcon_init(void)
|
||||
{
|
||||
#ifdef CONFIG_FB_OLPC_DCON_1_5
|
||||
/* XO-1.5 */
|
||||
if (olpc_board_at_least(olpc_board(0xd0)))
|
||||
pdata = &dcon_pdata_xo_1_5;
|
||||
#endif
|
||||
#ifdef CONFIG_FB_OLPC_DCON_1
|
||||
if (!pdata)
|
||||
pdata = &dcon_pdata_xo_1;
|
||||
#endif
|
||||
|
||||
return i2c_add_driver(&dcon_driver);
|
||||
}
|
||||
|
||||
static void __exit olpc_dcon_exit(void)
|
||||
{
|
||||
i2c_del_driver(&dcon_driver);
|
||||
}
|
||||
|
||||
module_init(olpc_dcon_init);
|
||||
module_exit(olpc_dcon_exit);
|
||||
|
||||
MODULE_LICENSE("GPL");
|
|
@ -1,111 +0,0 @@
|
|||
#ifndef OLPC_DCON_H_
|
||||
#define OLPC_DCON_H_
|
||||
|
||||
#include <linux/notifier.h>
|
||||
#include <linux/workqueue.h>
|
||||
|
||||
/* DCON registers */
|
||||
|
||||
#define DCON_REG_ID 0
|
||||
#define DCON_REG_MODE 1
|
||||
|
||||
#define MODE_PASSTHRU (1<<0)
|
||||
#define MODE_SLEEP (1<<1)
|
||||
#define MODE_SLEEP_AUTO (1<<2)
|
||||
#define MODE_BL_ENABLE (1<<3)
|
||||
#define MODE_BLANK (1<<4)
|
||||
#define MODE_CSWIZZLE (1<<5)
|
||||
#define MODE_COL_AA (1<<6)
|
||||
#define MODE_MONO_LUMA (1<<7)
|
||||
#define MODE_SCAN_INT (1<<8)
|
||||
#define MODE_CLOCKDIV (1<<9)
|
||||
#define MODE_DEBUG (1<<14)
|
||||
#define MODE_SELFTEST (1<<15)
|
||||
|
||||
#define DCON_REG_HRES 0x2
|
||||
#define DCON_REG_HTOTAL 0x3
|
||||
#define DCON_REG_HSYNC_WIDTH 0x4
|
||||
#define DCON_REG_VRES 0x5
|
||||
#define DCON_REG_VTOTAL 0x6
|
||||
#define DCON_REG_VSYNC_WIDTH 0x7
|
||||
#define DCON_REG_TIMEOUT 0x8
|
||||
#define DCON_REG_SCAN_INT 0x9
|
||||
#define DCON_REG_BRIGHT 0xa
|
||||
#define DCON_REG_MEM_OPT_A 0x41
|
||||
#define DCON_REG_MEM_OPT_B 0x42
|
||||
|
||||
/* Load Delay Locked Loop (DLL) settings for clock delay */
|
||||
#define MEM_DLL_CLOCK_DELAY (1<<0)
|
||||
/* Memory controller power down function */
|
||||
#define MEM_POWER_DOWN (1<<8)
|
||||
/* Memory controller software reset */
|
||||
#define MEM_SOFT_RESET (1<<0)
|
||||
|
||||
/* Status values */
|
||||
|
||||
#define DCONSTAT_SCANINT 0
|
||||
#define DCONSTAT_SCANINT_DCON 1
|
||||
#define DCONSTAT_DISPLAYLOAD 2
|
||||
#define DCONSTAT_MISSED 3
|
||||
|
||||
/* Source values */
|
||||
|
||||
#define DCON_SOURCE_DCON 0
|
||||
#define DCON_SOURCE_CPU 1
|
||||
|
||||
/* Interrupt */
|
||||
#define DCON_IRQ 6
|
||||
|
||||
struct dcon_priv {
|
||||
struct i2c_client *client;
|
||||
struct fb_info *fbinfo;
|
||||
struct backlight_device *bl_dev;
|
||||
|
||||
wait_queue_head_t waitq;
|
||||
struct work_struct switch_source;
|
||||
struct notifier_block reboot_nb;
|
||||
|
||||
/* Shadow register for the DCON_REG_MODE register */
|
||||
u8 disp_mode;
|
||||
|
||||
/* The current backlight value - this saves us some smbus traffic */
|
||||
u8 bl_val;
|
||||
|
||||
/* Current source, initialized at probe time */
|
||||
int curr_src;
|
||||
|
||||
/* Desired source */
|
||||
int pending_src;
|
||||
|
||||
/* Variables used during switches */
|
||||
bool switched;
|
||||
ktime_t irq_time;
|
||||
ktime_t load_time;
|
||||
|
||||
/* Current output type; true == mono, false == color */
|
||||
bool mono;
|
||||
bool asleep;
|
||||
/* This get set while controlling fb blank state from the driver */
|
||||
bool ignore_fb_events;
|
||||
};
|
||||
|
||||
struct dcon_platform_data {
|
||||
int (*init)(struct dcon_priv *);
|
||||
void (*bus_stabilize_wiggle)(void);
|
||||
void (*set_dconload)(int);
|
||||
int (*read_status)(u8 *);
|
||||
};
|
||||
|
||||
#include <linux/interrupt.h>
|
||||
|
||||
irqreturn_t dcon_interrupt(int irq, void *id);
|
||||
|
||||
#ifdef CONFIG_FB_OLPC_DCON_1
|
||||
extern struct dcon_platform_data dcon_pdata_xo_1;
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_FB_OLPC_DCON_1_5
|
||||
extern struct dcon_platform_data dcon_pdata_xo_1_5;
|
||||
#endif
|
||||
|
||||
#endif
|
|
@ -1,205 +0,0 @@
|
|||
/*
|
||||
* Mainly by David Woodhouse, somewhat modified by Jordan Crouse
|
||||
*
|
||||
* Copyright © 2006-2007 Red Hat, Inc.
|
||||
* Copyright © 2006-2007 Advanced Micro Devices, Inc.
|
||||
* Copyright © 2009 VIA Technology, Inc.
|
||||
* Copyright (c) 2010 Andres Salomon <dilinger@queued.net>
|
||||
*
|
||||
* This program is free software. You can redistribute it and/or
|
||||
* modify it under the terms of version 2 of the GNU General Public
|
||||
* License as published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
|
||||
|
||||
#include <linux/cs5535.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/delay.h>
|
||||
#include <asm/olpc.h>
|
||||
|
||||
#include "olpc_dcon.h"
|
||||
|
||||
static int dcon_init_xo_1(struct dcon_priv *dcon)
|
||||
{
|
||||
unsigned char lob;
|
||||
|
||||
if (gpio_request(OLPC_GPIO_DCON_STAT0, "OLPC-DCON")) {
|
||||
pr_err("failed to request STAT0 GPIO\n");
|
||||
return -EIO;
|
||||
}
|
||||
if (gpio_request(OLPC_GPIO_DCON_STAT1, "OLPC-DCON")) {
|
||||
pr_err("failed to request STAT1 GPIO\n");
|
||||
goto err_gp_stat1;
|
||||
}
|
||||
if (gpio_request(OLPC_GPIO_DCON_IRQ, "OLPC-DCON")) {
|
||||
pr_err("failed to request IRQ GPIO\n");
|
||||
goto err_gp_irq;
|
||||
}
|
||||
if (gpio_request(OLPC_GPIO_DCON_LOAD, "OLPC-DCON")) {
|
||||
pr_err("failed to request LOAD GPIO\n");
|
||||
goto err_gp_load;
|
||||
}
|
||||
if (gpio_request(OLPC_GPIO_DCON_BLANK, "OLPC-DCON")) {
|
||||
pr_err("failed to request BLANK GPIO\n");
|
||||
goto err_gp_blank;
|
||||
}
|
||||
|
||||
/* Turn off the event enable for GPIO7 just to be safe */
|
||||
cs5535_gpio_clear(OLPC_GPIO_DCON_IRQ, GPIO_EVENTS_ENABLE);
|
||||
|
||||
/*
|
||||
* Determine the current state by reading the GPIO bit; earlier
|
||||
* stages of the boot process have established the state.
|
||||
*
|
||||
* Note that we read GPIO_OUTPUT_VAL rather than GPIO_READ_BACK here;
|
||||
* this is because OFW will disable input for the pin and set a value..
|
||||
* READ_BACK will only contain a valid value if input is enabled and
|
||||
* then a value is set. So, future readings of the pin can use
|
||||
* READ_BACK, but the first one cannot. Awesome, huh?
|
||||
*/
|
||||
dcon->curr_src = cs5535_gpio_isset(OLPC_GPIO_DCON_LOAD, GPIO_OUTPUT_VAL)
|
||||
? DCON_SOURCE_CPU
|
||||
: DCON_SOURCE_DCON;
|
||||
dcon->pending_src = dcon->curr_src;
|
||||
|
||||
/* Set the directions for the GPIO pins */
|
||||
gpio_direction_input(OLPC_GPIO_DCON_STAT0);
|
||||
gpio_direction_input(OLPC_GPIO_DCON_STAT1);
|
||||
gpio_direction_input(OLPC_GPIO_DCON_IRQ);
|
||||
gpio_direction_input(OLPC_GPIO_DCON_BLANK);
|
||||
gpio_direction_output(OLPC_GPIO_DCON_LOAD,
|
||||
dcon->curr_src == DCON_SOURCE_CPU);
|
||||
|
||||
/* Set up the interrupt mappings */
|
||||
|
||||
/* Set the IRQ to pair 2 */
|
||||
cs5535_gpio_setup_event(OLPC_GPIO_DCON_IRQ, 2, 0);
|
||||
|
||||
/* Enable group 2 to trigger the DCON interrupt */
|
||||
cs5535_gpio_set_irq(2, DCON_IRQ);
|
||||
|
||||
/* Select edge level for interrupt (in PIC) */
|
||||
lob = inb(0x4d0);
|
||||
lob &= ~(1 << DCON_IRQ);
|
||||
outb(lob, 0x4d0);
|
||||
|
||||
/* Register the interrupt handler */
|
||||
if (request_irq(DCON_IRQ, &dcon_interrupt, 0, "DCON", dcon)) {
|
||||
pr_err("failed to request DCON's irq\n");
|
||||
goto err_req_irq;
|
||||
}
|
||||
|
||||
/* Clear INV_EN for GPIO7 (DCONIRQ) */
|
||||
cs5535_gpio_clear(OLPC_GPIO_DCON_IRQ, GPIO_INPUT_INVERT);
|
||||
|
||||
/* Enable filter for GPIO12 (DCONBLANK) */
|
||||
cs5535_gpio_set(OLPC_GPIO_DCON_BLANK, GPIO_INPUT_FILTER);
|
||||
|
||||
/* Disable filter for GPIO7 */
|
||||
cs5535_gpio_clear(OLPC_GPIO_DCON_IRQ, GPIO_INPUT_FILTER);
|
||||
|
||||
/* Disable event counter for GPIO7 (DCONIRQ) and GPIO12 (DCONBLANK) */
|
||||
cs5535_gpio_clear(OLPC_GPIO_DCON_IRQ, GPIO_INPUT_EVENT_COUNT);
|
||||
cs5535_gpio_clear(OLPC_GPIO_DCON_BLANK, GPIO_INPUT_EVENT_COUNT);
|
||||
|
||||
/* Add GPIO12 to the Filter Event Pair #7 */
|
||||
cs5535_gpio_set(OLPC_GPIO_DCON_BLANK, GPIO_FE7_SEL);
|
||||
|
||||
/* Turn off negative Edge Enable for GPIO12 */
|
||||
cs5535_gpio_clear(OLPC_GPIO_DCON_BLANK, GPIO_NEGATIVE_EDGE_EN);
|
||||
|
||||
/* Enable negative Edge Enable for GPIO7 */
|
||||
cs5535_gpio_set(OLPC_GPIO_DCON_IRQ, GPIO_NEGATIVE_EDGE_EN);
|
||||
|
||||
/* Zero the filter amount for Filter Event Pair #7 */
|
||||
cs5535_gpio_set(0, GPIO_FLTR7_AMOUNT);
|
||||
|
||||
/* Clear the negative edge status for GPIO7 and GPIO12 */
|
||||
cs5535_gpio_set(OLPC_GPIO_DCON_IRQ, GPIO_NEGATIVE_EDGE_STS);
|
||||
cs5535_gpio_set(OLPC_GPIO_DCON_BLANK, GPIO_NEGATIVE_EDGE_STS);
|
||||
|
||||
/* FIXME: Clear the positive status as well, just to be sure */
|
||||
cs5535_gpio_set(OLPC_GPIO_DCON_IRQ, GPIO_POSITIVE_EDGE_STS);
|
||||
cs5535_gpio_set(OLPC_GPIO_DCON_BLANK, GPIO_POSITIVE_EDGE_STS);
|
||||
|
||||
/* Enable events for GPIO7 (DCONIRQ) and GPIO12 (DCONBLANK) */
|
||||
cs5535_gpio_set(OLPC_GPIO_DCON_IRQ, GPIO_EVENTS_ENABLE);
|
||||
cs5535_gpio_set(OLPC_GPIO_DCON_BLANK, GPIO_EVENTS_ENABLE);
|
||||
|
||||
return 0;
|
||||
|
||||
err_req_irq:
|
||||
gpio_free(OLPC_GPIO_DCON_BLANK);
|
||||
err_gp_blank:
|
||||
gpio_free(OLPC_GPIO_DCON_LOAD);
|
||||
err_gp_load:
|
||||
gpio_free(OLPC_GPIO_DCON_IRQ);
|
||||
err_gp_irq:
|
||||
gpio_free(OLPC_GPIO_DCON_STAT1);
|
||||
err_gp_stat1:
|
||||
gpio_free(OLPC_GPIO_DCON_STAT0);
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
static void dcon_wiggle_xo_1(void)
|
||||
{
|
||||
int x;
|
||||
|
||||
/*
|
||||
* According to HiMax, when powering the DCON up we should hold
|
||||
* SMB_DATA high for 8 SMB_CLK cycles. This will force the DCON
|
||||
* state machine to reset to a (sane) initial state. Mitch Bradley
|
||||
* did some testing and discovered that holding for 16 SMB_CLK cycles
|
||||
* worked a lot more reliably, so that's what we do here.
|
||||
*
|
||||
* According to the cs5536 spec, to set GPIO14 to SMB_CLK we must
|
||||
* simultaneously set AUX1 IN/OUT to GPIO14; ditto for SMB_DATA and
|
||||
* GPIO15.
|
||||
*/
|
||||
cs5535_gpio_set(OLPC_GPIO_SMB_CLK, GPIO_OUTPUT_VAL);
|
||||
cs5535_gpio_set(OLPC_GPIO_SMB_DATA, GPIO_OUTPUT_VAL);
|
||||
cs5535_gpio_set(OLPC_GPIO_SMB_CLK, GPIO_OUTPUT_ENABLE);
|
||||
cs5535_gpio_set(OLPC_GPIO_SMB_DATA, GPIO_OUTPUT_ENABLE);
|
||||
cs5535_gpio_clear(OLPC_GPIO_SMB_CLK, GPIO_OUTPUT_AUX1);
|
||||
cs5535_gpio_clear(OLPC_GPIO_SMB_DATA, GPIO_OUTPUT_AUX1);
|
||||
cs5535_gpio_clear(OLPC_GPIO_SMB_CLK, GPIO_OUTPUT_AUX2);
|
||||
cs5535_gpio_clear(OLPC_GPIO_SMB_DATA, GPIO_OUTPUT_AUX2);
|
||||
cs5535_gpio_clear(OLPC_GPIO_SMB_CLK, GPIO_INPUT_AUX1);
|
||||
cs5535_gpio_clear(OLPC_GPIO_SMB_DATA, GPIO_INPUT_AUX1);
|
||||
|
||||
for (x = 0; x < 16; x++) {
|
||||
udelay(5);
|
||||
cs5535_gpio_clear(OLPC_GPIO_SMB_CLK, GPIO_OUTPUT_VAL);
|
||||
udelay(5);
|
||||
cs5535_gpio_set(OLPC_GPIO_SMB_CLK, GPIO_OUTPUT_VAL);
|
||||
}
|
||||
udelay(5);
|
||||
cs5535_gpio_set(OLPC_GPIO_SMB_CLK, GPIO_OUTPUT_AUX1);
|
||||
cs5535_gpio_set(OLPC_GPIO_SMB_DATA, GPIO_OUTPUT_AUX1);
|
||||
cs5535_gpio_set(OLPC_GPIO_SMB_CLK, GPIO_INPUT_AUX1);
|
||||
cs5535_gpio_set(OLPC_GPIO_SMB_DATA, GPIO_INPUT_AUX1);
|
||||
}
|
||||
|
||||
static void dcon_set_dconload_1(int val)
|
||||
{
|
||||
gpio_set_value(OLPC_GPIO_DCON_LOAD, val);
|
||||
}
|
||||
|
||||
static int dcon_read_status_xo_1(u8 *status)
|
||||
{
|
||||
*status = gpio_get_value(OLPC_GPIO_DCON_STAT0);
|
||||
*status |= gpio_get_value(OLPC_GPIO_DCON_STAT1) << 1;
|
||||
|
||||
/* Clear the negative edge status for GPIO7 */
|
||||
cs5535_gpio_set(OLPC_GPIO_DCON_IRQ, GPIO_NEGATIVE_EDGE_STS);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
struct dcon_platform_data dcon_pdata_xo_1 = {
|
||||
.init = dcon_init_xo_1,
|
||||
.bus_stabilize_wiggle = dcon_wiggle_xo_1,
|
||||
.set_dconload = dcon_set_dconload_1,
|
||||
.read_status = dcon_read_status_xo_1,
|
||||
};
|
|
@ -1,161 +0,0 @@
|
|||
/*
|
||||
* Copyright (c) 2009,2010 One Laptop per Child
|
||||
*
|
||||
* This program is free software. You can redistribute it and/or
|
||||
* modify it under the terms of version 2 of the GNU General Public
|
||||
* License as published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
|
||||
|
||||
#include <linux/acpi.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <asm/olpc.h>
|
||||
|
||||
/* TODO: this eventually belongs in linux/vx855.h */
|
||||
#define NR_VX855_GPI 14
|
||||
#define NR_VX855_GPO 13
|
||||
#define NR_VX855_GPIO 15
|
||||
|
||||
#define VX855_GPI(n) (n)
|
||||
#define VX855_GPO(n) (NR_VX855_GPI + (n))
|
||||
#define VX855_GPIO(n) (NR_VX855_GPI + NR_VX855_GPO + (n))
|
||||
|
||||
#include "olpc_dcon.h"
|
||||
|
||||
/* Hardware setup on the XO 1.5:
|
||||
* DCONLOAD connects to VX855_GPIO1 (not SMBCK2)
|
||||
* DCONBLANK connects to VX855_GPIO8 (not SSPICLK) unused in driver
|
||||
* DCONSTAT0 connects to VX855_GPI10 (not SSPISDI)
|
||||
* DCONSTAT1 connects to VX855_GPI11 (not nSSPISS)
|
||||
* DCONIRQ connects to VX855_GPIO12
|
||||
* DCONSMBDATA connects to VX855 graphics CRTSPD
|
||||
* DCONSMBCLK connects to VX855 graphics CRTSPCLK
|
||||
*/
|
||||
|
||||
#define VX855_GENL_PURPOSE_OUTPUT 0x44c /* PMIO_Rx4c-4f */
|
||||
#define VX855_GPI_STATUS_CHG 0x450 /* PMIO_Rx50 */
|
||||
#define VX855_GPI_SCI_SMI 0x452 /* PMIO_Rx52 */
|
||||
#define BIT_GPIO12 0x40
|
||||
|
||||
#define PREFIX "OLPC DCON:"
|
||||
|
||||
static void dcon_clear_irq(void)
|
||||
{
|
||||
/* irq status will appear in PMIO_Rx50[6] (RW1C) on gpio12 */
|
||||
outb(BIT_GPIO12, VX855_GPI_STATUS_CHG);
|
||||
}
|
||||
|
||||
static int dcon_was_irq(void)
|
||||
{
|
||||
u_int8_t tmp;
|
||||
|
||||
/* irq status will appear in PMIO_Rx50[6] on gpio12 */
|
||||
tmp = inb(VX855_GPI_STATUS_CHG);
|
||||
return !!(tmp & BIT_GPIO12);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int dcon_init_xo_1_5(struct dcon_priv *dcon)
|
||||
{
|
||||
unsigned int irq;
|
||||
|
||||
dcon_clear_irq();
|
||||
|
||||
/* set PMIO_Rx52[6] to enable SCI/SMI on gpio12 */
|
||||
outb(inb(VX855_GPI_SCI_SMI)|BIT_GPIO12, VX855_GPI_SCI_SMI);
|
||||
|
||||
/* Determine the current state of DCONLOAD, likely set by firmware */
|
||||
/* GPIO1 */
|
||||
dcon->curr_src = (inl(VX855_GENL_PURPOSE_OUTPUT) & 0x1000) ?
|
||||
DCON_SOURCE_CPU : DCON_SOURCE_DCON;
|
||||
dcon->pending_src = dcon->curr_src;
|
||||
|
||||
/* we're sharing the IRQ with ACPI */
|
||||
irq = acpi_gbl_FADT.sci_interrupt;
|
||||
if (request_irq(irq, &dcon_interrupt, IRQF_SHARED, "DCON", dcon)) {
|
||||
pr_err("DCON (IRQ%d) allocation failed\n", irq);
|
||||
return 1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void set_i2c_line(int sda, int scl)
|
||||
{
|
||||
unsigned char tmp;
|
||||
unsigned int port = 0x26;
|
||||
|
||||
/* FIXME: This directly accesses the CRT GPIO controller !!! */
|
||||
outb(port, 0x3c4);
|
||||
tmp = inb(0x3c5);
|
||||
|
||||
if (scl)
|
||||
tmp |= 0x20;
|
||||
else
|
||||
tmp &= ~0x20;
|
||||
|
||||
if (sda)
|
||||
tmp |= 0x10;
|
||||
else
|
||||
tmp &= ~0x10;
|
||||
|
||||
tmp |= 0x01;
|
||||
|
||||
outb(port, 0x3c4);
|
||||
outb(tmp, 0x3c5);
|
||||
}
|
||||
|
||||
|
||||
static void dcon_wiggle_xo_1_5(void)
|
||||
{
|
||||
int x;
|
||||
|
||||
/*
|
||||
* According to HiMax, when powering the DCON up we should hold
|
||||
* SMB_DATA high for 8 SMB_CLK cycles. This will force the DCON
|
||||
* state machine to reset to a (sane) initial state. Mitch Bradley
|
||||
* did some testing and discovered that holding for 16 SMB_CLK cycles
|
||||
* worked a lot more reliably, so that's what we do here.
|
||||
*/
|
||||
set_i2c_line(1, 1);
|
||||
|
||||
for (x = 0; x < 16; x++) {
|
||||
udelay(5);
|
||||
set_i2c_line(1, 0);
|
||||
udelay(5);
|
||||
set_i2c_line(1, 1);
|
||||
}
|
||||
udelay(5);
|
||||
|
||||
/* set PMIO_Rx52[6] to enable SCI/SMI on gpio12 */
|
||||
outb(inb(VX855_GPI_SCI_SMI)|BIT_GPIO12, VX855_GPI_SCI_SMI);
|
||||
}
|
||||
|
||||
static void dcon_set_dconload_xo_1_5(int val)
|
||||
{
|
||||
gpio_set_value(VX855_GPIO(1), val);
|
||||
}
|
||||
|
||||
static int dcon_read_status_xo_1_5(u8 *status)
|
||||
{
|
||||
if (!dcon_was_irq())
|
||||
return -1;
|
||||
|
||||
/* i believe this is the same as "inb(0x44b) & 3" */
|
||||
*status = gpio_get_value(VX855_GPI(10));
|
||||
*status |= gpio_get_value(VX855_GPI(11)) << 1;
|
||||
|
||||
dcon_clear_irq();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
struct dcon_platform_data dcon_pdata_xo_1_5 = {
|
||||
.init = dcon_init_xo_1_5,
|
||||
.bus_stabilize_wiggle = dcon_wiggle_xo_1_5,
|
||||
.set_dconload = dcon_set_dconload_xo_1_5,
|
||||
.read_status = dcon_read_status_xo_1_5,
|
||||
};
|
Loading…
Reference in New Issue