EDAC: Drop per-memory controller buses
... and use the single edac_subsys object returned from subsys_system_register(). The idea is to have a single bus and multiple devices on it. Signed-off-by: Borislav Petkov <bp@suse.de> Acked-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org> CC: Aristeu Rozanski Filho <arozansk@redhat.com> CC: Greg KH <gregkh@linuxfoundation.org> CC: Justin Ernst <justin.ernst@hpe.com> CC: linux-edac <linux-edac@vger.kernel.org> CC: Mauro Carvalho Chehab <mchehab@kernel.org> CC: Russ Anderson <rja@hpe.com> Cc: Tony Luck <tony.luck@intel.com> Link: https://lkml.kernel.org/r/20180926152752.GG5584@zn.tnic
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@ -55,8 +55,6 @@ static LIST_HEAD(mc_devices);
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*/
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static const char *edac_mc_owner;
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static struct bus_type mc_bus[EDAC_MAX_MCS];
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int edac_get_report_status(void)
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{
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return edac_report;
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@ -716,11 +714,6 @@ int edac_mc_add_mc_with_groups(struct mem_ctl_info *mci,
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int ret = -EINVAL;
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edac_dbg(0, "\n");
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if (mci->mc_idx >= EDAC_MAX_MCS) {
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pr_warn_once("Too many memory controllers: %d\n", mci->mc_idx);
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return -ENODEV;
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}
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#ifdef CONFIG_EDAC_DEBUG
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if (edac_debug_level >= 3)
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edac_mc_dump_mci(mci);
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@ -760,7 +753,7 @@ int edac_mc_add_mc_with_groups(struct mem_ctl_info *mci,
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/* set load time so that error rate can be tracked */
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mci->start_time = jiffies;
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mci->bus = &mc_bus[mci->mc_idx];
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mci->bus = edac_get_sysfs_subsys();
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if (edac_create_sysfs_mci_device(mci, groups)) {
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edac_mc_printk(mci, KERN_WARNING,
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@ -912,27 +912,8 @@ static const struct device_type mci_attr_type = {
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int edac_create_sysfs_mci_device(struct mem_ctl_info *mci,
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const struct attribute_group **groups)
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{
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char *name;
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int i, err;
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/*
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* The memory controller needs its own bus, in order to avoid
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* namespace conflicts at /sys/bus/edac.
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*/
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name = kasprintf(GFP_KERNEL, "mc%d", mci->mc_idx);
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if (!name)
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return -ENOMEM;
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mci->bus->name = name;
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edac_dbg(0, "creating bus %s\n", mci->bus->name);
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err = bus_register(mci->bus);
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if (err < 0) {
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kfree(name);
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return err;
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}
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/* get the /sys/devices/system/edac subsys reference */
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mci->dev.type = &mci_attr_type;
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device_initialize(&mci->dev);
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@ -947,7 +928,7 @@ int edac_create_sysfs_mci_device(struct mem_ctl_info *mci,
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err = device_add(&mci->dev);
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if (err < 0) {
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edac_dbg(1, "failure: create device %s\n", dev_name(&mci->dev));
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goto fail_unregister_bus;
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goto out;
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}
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/*
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@ -995,10 +976,8 @@ int edac_create_sysfs_mci_device(struct mem_ctl_info *mci,
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device_unregister(&dimm->dev);
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}
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device_unregister(&mci->dev);
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fail_unregister_bus:
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bus_unregister(mci->bus);
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kfree(name);
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out:
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return err;
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}
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@ -1029,13 +1008,8 @@ void edac_remove_sysfs_mci_device(struct mem_ctl_info *mci)
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void edac_unregister_sysfs(struct mem_ctl_info *mci)
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{
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struct bus_type *bus = mci->bus;
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const char *name = mci->bus->name;
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edac_dbg(1, "Unregistering device %s\n", dev_name(&mci->dev));
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device_unregister(&mci->dev);
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bus_unregister(bus);
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kfree(name);
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}
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static void mc_attr_release(struct device *dev)
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@ -669,10 +669,4 @@ struct mem_ctl_info {
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bool fake_inject_ue;
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u16 fake_inject_count;
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};
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/*
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* Maximum number of memory controllers in the coherent fabric.
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*/
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#define EDAC_MAX_MCS 2 * MAX_NUMNODES
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#endif
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