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x86/mce/amd: Rename setup_APIC_mce 

'setup_APIC_mce' doesn't give us an indication of why we are
going to program LVT. Make that explicit by renaming it to
setup_APIC_mce_threshold so we know.

No functional change is introduced.

Signed-off-by: Aravind Gopalakrishnan <Aravind.Gopalakrishnan@amd.com>
Cc: Tony Luck <tony.luck@intel.com>
Cc: x86-ml <x86@kernel.org>
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/1430913538-1415-7-git-send-email-Aravind.Gopalakrishnan@amd.com
Signed-off-by: Borislav Petkov <bp@suse.de>
This commit is contained in:
Aravind Gopalakrishnan 2015-05-06 06:58:58 -05:00 committed by Borislav Petkov
parent 5c0d728e1a
commit 868c00bb59
1 changed files with 2 additions and 2 deletions
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4
arch/x86/kernel/cpu/mcheck/mce_amd.c
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@ -213,7 +213,7 @@ static void mce_threshold_block_init(struct threshold_block *b, int offset)
threshold_restart_bank(&tr); threshold_restart_bank(&tr);
}; };
static int setup_APIC_mce(int reserved, int new) static int setup_APIC_mce_threshold(int reserved, int new)
{ {
if (reserved < 0 && !setup_APIC_eilvt(new, THRESHOLD_APIC_VECTOR, if (reserved < 0 && !setup_APIC_eilvt(new, THRESHOLD_APIC_VECTOR,
APIC_EILVT_MSG_FIX, 0)) APIC_EILVT_MSG_FIX, 0))
@ -302,7 +302,7 @@ void mce_amd_feature_init(struct cpuinfo_x86 *c)
b.interrupt_enable = 1; b.interrupt_enable = 1;
new = (high & MASK_LVTOFF_HI) >> 20; new = (high & MASK_LVTOFF_HI) >> 20;
offset = setup_APIC_mce(offset, new); offset = setup_APIC_mce_threshold(offset, new);
if ((offset == new) && if ((offset == new) &&
(mce_threshold_vector != amd_threshold_interrupt)) (mce_threshold_vector != amd_threshold_interrupt))