arm64: use the generic swiotlb_dma_ops
Now that the generic swiotlb code supports non-coherent DMA we can switch
to it for arm64. For that we need to refactor the existing
alloc/free/mmap/pgprot helpers to be used as the architecture hooks,
and implement the standard arch_sync_dma_for_{device,cpu} hooks for
cache maintaincance in the streaming dma hooks, which also implies
using the generic dma_coherent flag in struct device.
Note that we need to keep the old is_device_dma_coherent function around
for now, so that the shared arm/arm64 Xen code keeps working.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
This commit is contained in:
Christoph Hellwig
parent
a4a4330db4
commit
886643b766
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@ -11,6 +11,8 @@ config ARM64
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select ARCH_CLOCKSOURCE_DATA
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select ARCH_HAS_DEBUG_VIRTUAL
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select ARCH_HAS_DEVMEM_IS_ALLOWED
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select ARCH_HAS_DMA_COHERENT_TO_PFN
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select ARCH_HAS_DMA_MMAP_PGPROT
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select ARCH_HAS_ACPI_TABLE_UPGRADE if ACPI
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select ARCH_HAS_ELF_RANDOMIZE
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select ARCH_HAS_FAST_MULTIPLIER
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@ -24,6 +26,8 @@ config ARM64
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select ARCH_HAS_SG_CHAIN
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select ARCH_HAS_STRICT_KERNEL_RWX
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select ARCH_HAS_STRICT_MODULE_RWX
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select ARCH_HAS_SYNC_DMA_FOR_DEVICE
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select ARCH_HAS_SYNC_DMA_FOR_CPU
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select ARCH_HAS_SYSCALL_WRAPPER
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select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
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select ARCH_HAVE_NMI_SAFE_CMPXCHG
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@ -23,7 +23,6 @@ struct dev_archdata {
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#ifdef CONFIG_XEN
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const struct dma_map_ops *dev_dma_ops;
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#endif
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bool dma_coherent;
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};
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struct pdev_archdata {
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@ -44,10 +44,13 @@ void arch_teardown_dma_ops(struct device *dev);
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#define arch_teardown_dma_ops arch_teardown_dma_ops
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#endif
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/* do not use this function in a driver */
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/*
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* Do not use this function in a driver, it is only provided for
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* arch/arm/mm/xen.c, which is used by arm64 as well.
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*/
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static inline bool is_device_dma_coherent(struct device *dev)
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{
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return dev->archdata.dma_coherent;
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return dev->dma_coherent;
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}
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#endif /* __KERNEL__ */
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@ -25,6 +25,7 @@
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#include <linux/slab.h>
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#include <linux/genalloc.h>
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#include <linux/dma-direct.h>
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#include <linux/dma-noncoherent.h>
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#include <linux/dma-contiguous.h>
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#include <linux/vmalloc.h>
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#include <linux/swiotlb.h>
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@ -32,16 +33,6 @@
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#include <asm/cacheflush.h>
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static int swiotlb __ro_after_init;
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static pgprot_t __get_dma_pgprot(unsigned long attrs, pgprot_t prot,
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bool coherent)
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{
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if (!coherent || (attrs & DMA_ATTR_WRITE_COMBINE))
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return pgprot_writecombine(prot);
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return prot;
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}
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static struct gen_pool *atomic_pool __ro_after_init;
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#define DEFAULT_DMA_COHERENT_POOL_SIZE SZ_256K
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@ -91,18 +82,16 @@ static int __free_from_pool(void *start, size_t size)
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return 1;
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}
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static void *__dma_alloc(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t flags,
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unsigned long attrs)
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void *arch_dma_alloc(struct device *dev, size_t size, dma_addr_t *dma_handle,
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gfp_t flags, unsigned long attrs)
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{
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struct page *page;
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void *ptr, *coherent_ptr;
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bool coherent = is_device_dma_coherent(dev);
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pgprot_t prot = __get_dma_pgprot(attrs, PAGE_KERNEL, false);
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pgprot_t prot = pgprot_writecombine(PAGE_KERNEL);
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size = PAGE_ALIGN(size);
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if (!coherent && !gfpflags_allow_blocking(flags)) {
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if (!gfpflags_allow_blocking(flags)) {
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struct page *page = NULL;
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void *addr = __alloc_from_pool(size, &page, flags);
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@ -116,10 +105,6 @@ static void *__dma_alloc(struct device *dev, size_t size,
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if (!ptr)
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goto no_mem;
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/* no need for non-cacheable mapping if coherent */
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if (coherent)
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return ptr;
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/* remove any dirty cache lines on the kernel alias */
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__dma_flush_area(ptr, size);
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@ -138,127 +123,54 @@ static void *__dma_alloc(struct device *dev, size_t size,
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return NULL;
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}
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static void __dma_free(struct device *dev, size_t size,
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void *vaddr, dma_addr_t dma_handle,
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unsigned long attrs)
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void arch_dma_free(struct device *dev, size_t size, void *vaddr,
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dma_addr_t dma_handle, unsigned long attrs)
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{
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void *swiotlb_addr = phys_to_virt(dma_to_phys(dev, dma_handle));
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if (!__free_from_pool(vaddr, PAGE_ALIGN(size))) {
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void *kaddr = phys_to_virt(dma_to_phys(dev, dma_handle));
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size = PAGE_ALIGN(size);
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if (!is_device_dma_coherent(dev)) {
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if (__free_from_pool(vaddr, size))
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return;
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vunmap(vaddr);
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dma_direct_free_pages(dev, size, kaddr, dma_handle, attrs);
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}
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dma_direct_free_pages(dev, size, swiotlb_addr, dma_handle, attrs);
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}
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static dma_addr_t __swiotlb_map_page(struct device *dev, struct page *page,
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unsigned long offset, size_t size,
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enum dma_data_direction dir,
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unsigned long attrs)
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long arch_dma_coherent_to_pfn(struct device *dev, void *cpu_addr,
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dma_addr_t dma_addr)
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{
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dma_addr_t dev_addr;
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dev_addr = swiotlb_map_page(dev, page, offset, size, dir, attrs);
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if (!is_device_dma_coherent(dev) &&
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(attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
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__dma_map_area(phys_to_virt(dma_to_phys(dev, dev_addr)), size, dir);
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return dev_addr;
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return __phys_to_pfn(dma_to_phys(dev, dma_addr));
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}
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static void __swiotlb_unmap_page(struct device *dev, dma_addr_t dev_addr,
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size_t size, enum dma_data_direction dir,
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pgprot_t arch_dma_mmap_pgprot(struct device *dev, pgprot_t prot,
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unsigned long attrs)
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{
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if (!is_device_dma_coherent(dev) &&
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(attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
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__dma_unmap_area(phys_to_virt(dma_to_phys(dev, dev_addr)), size, dir);
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swiotlb_unmap_page(dev, dev_addr, size, dir, attrs);
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if (!dev_is_dma_coherent(dev) || (attrs & DMA_ATTR_WRITE_COMBINE))
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return pgprot_writecombine(prot);
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return prot;
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}
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static int __swiotlb_map_sg_attrs(struct device *dev, struct scatterlist *sgl,
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int nelems, enum dma_data_direction dir,
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unsigned long attrs)
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void arch_sync_dma_for_device(struct device *dev, phys_addr_t paddr,
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size_t size, enum dma_data_direction dir)
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{
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struct scatterlist *sg;
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int i, ret;
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__dma_map_area(phys_to_virt(paddr), size, dir);
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}
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ret = swiotlb_map_sg_attrs(dev, sgl, nelems, dir, attrs);
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if (!is_device_dma_coherent(dev) &&
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(attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
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for_each_sg(sgl, sg, ret, i)
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__dma_map_area(phys_to_virt(dma_to_phys(dev, sg->dma_address)),
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sg->length, dir);
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void arch_sync_dma_for_cpu(struct device *dev, phys_addr_t paddr,
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size_t size, enum dma_data_direction dir)
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{
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__dma_unmap_area(phys_to_virt(paddr), size, dir);
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}
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static int __swiotlb_get_sgtable_page(struct sg_table *sgt,
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struct page *page, size_t size)
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{
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int ret = sg_alloc_table(sgt, 1, GFP_KERNEL);
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if (!ret)
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sg_set_page(sgt->sgl, page, PAGE_ALIGN(size), 0);
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return ret;
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}
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static void __swiotlb_unmap_sg_attrs(struct device *dev,
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struct scatterlist *sgl, int nelems,
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enum dma_data_direction dir,
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unsigned long attrs)
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{
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struct scatterlist *sg;
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int i;
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if (!is_device_dma_coherent(dev) &&
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(attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
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for_each_sg(sgl, sg, nelems, i)
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__dma_unmap_area(phys_to_virt(dma_to_phys(dev, sg->dma_address)),
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sg->length, dir);
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swiotlb_unmap_sg_attrs(dev, sgl, nelems, dir, attrs);
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}
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static void __swiotlb_sync_single_for_cpu(struct device *dev,
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dma_addr_t dev_addr, size_t size,
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enum dma_data_direction dir)
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{
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if (!is_device_dma_coherent(dev))
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__dma_unmap_area(phys_to_virt(dma_to_phys(dev, dev_addr)), size, dir);
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swiotlb_sync_single_for_cpu(dev, dev_addr, size, dir);
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}
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static void __swiotlb_sync_single_for_device(struct device *dev,
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dma_addr_t dev_addr, size_t size,
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enum dma_data_direction dir)
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{
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swiotlb_sync_single_for_device(dev, dev_addr, size, dir);
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if (!is_device_dma_coherent(dev))
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__dma_map_area(phys_to_virt(dma_to_phys(dev, dev_addr)), size, dir);
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}
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static void __swiotlb_sync_sg_for_cpu(struct device *dev,
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struct scatterlist *sgl, int nelems,
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enum dma_data_direction dir)
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{
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struct scatterlist *sg;
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int i;
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if (!is_device_dma_coherent(dev))
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for_each_sg(sgl, sg, nelems, i)
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__dma_unmap_area(phys_to_virt(dma_to_phys(dev, sg->dma_address)),
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sg->length, dir);
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swiotlb_sync_sg_for_cpu(dev, sgl, nelems, dir);
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}
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static void __swiotlb_sync_sg_for_device(struct device *dev,
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struct scatterlist *sgl, int nelems,
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enum dma_data_direction dir)
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{
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struct scatterlist *sg;
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int i;
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swiotlb_sync_sg_for_device(dev, sgl, nelems, dir);
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if (!is_device_dma_coherent(dev))
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for_each_sg(sgl, sg, nelems, i)
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__dma_map_area(phys_to_virt(dma_to_phys(dev, sg->dma_address)),
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sg->length, dir);
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}
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static int __swiotlb_mmap_pfn(struct vm_area_struct *vma,
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unsigned long pfn, size_t size)
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{
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@ -277,74 +189,6 @@ static int __swiotlb_mmap_pfn(struct vm_area_struct *vma,
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return ret;
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}
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static int __swiotlb_mmap(struct device *dev,
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struct vm_area_struct *vma,
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void *cpu_addr, dma_addr_t dma_addr, size_t size,
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unsigned long attrs)
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{
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int ret;
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unsigned long pfn = dma_to_phys(dev, dma_addr) >> PAGE_SHIFT;
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vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot,
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is_device_dma_coherent(dev));
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if (dma_mmap_from_dev_coherent(dev, vma, cpu_addr, size, &ret))
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return ret;
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return __swiotlb_mmap_pfn(vma, pfn, size);
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}
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static int __swiotlb_get_sgtable_page(struct sg_table *sgt,
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struct page *page, size_t size)
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{
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int ret = sg_alloc_table(sgt, 1, GFP_KERNEL);
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if (!ret)
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sg_set_page(sgt->sgl, page, PAGE_ALIGN(size), 0);
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return ret;
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}
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static int __swiotlb_get_sgtable(struct device *dev, struct sg_table *sgt,
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void *cpu_addr, dma_addr_t handle, size_t size,
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unsigned long attrs)
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{
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struct page *page = phys_to_page(dma_to_phys(dev, handle));
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return __swiotlb_get_sgtable_page(sgt, page, size);
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}
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static int __swiotlb_dma_supported(struct device *hwdev, u64 mask)
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{
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if (swiotlb)
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return swiotlb_dma_supported(hwdev, mask);
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return 1;
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}
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static int __swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t addr)
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{
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if (swiotlb)
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return dma_direct_mapping_error(hwdev, addr);
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return 0;
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}
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static const struct dma_map_ops arm64_swiotlb_dma_ops = {
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.alloc = __dma_alloc,
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.free = __dma_free,
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.mmap = __swiotlb_mmap,
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.get_sgtable = __swiotlb_get_sgtable,
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.map_page = __swiotlb_map_page,
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.unmap_page = __swiotlb_unmap_page,
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.map_sg = __swiotlb_map_sg_attrs,
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.unmap_sg = __swiotlb_unmap_sg_attrs,
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.sync_single_for_cpu = __swiotlb_sync_single_for_cpu,
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.sync_single_for_device = __swiotlb_sync_single_for_device,
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.sync_sg_for_cpu = __swiotlb_sync_sg_for_cpu,
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.sync_sg_for_device = __swiotlb_sync_sg_for_device,
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.dma_supported = __swiotlb_dma_supported,
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.mapping_error = __swiotlb_dma_mapping_error,
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};
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static int __init atomic_pool_init(void)
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{
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pgprot_t prot = __pgprot(PROT_NORMAL_NC);
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@ -500,10 +344,6 @@ EXPORT_SYMBOL(dummy_dma_ops);
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static int __init arm64_dma_init(void)
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{
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if (swiotlb_force == SWIOTLB_FORCE ||
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max_pfn > (arm64_dma_phys_limit >> PAGE_SHIFT))
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swiotlb = 1;
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WARN_TAINT(ARCH_DMA_MINALIGN < cache_line_size(),
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TAINT_CPU_OUT_OF_SPEC,
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"ARCH_DMA_MINALIGN smaller than CTR_EL0.CWG (%d < %d)",
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@ -528,7 +368,7 @@ static void *__iommu_alloc_attrs(struct device *dev, size_t size,
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dma_addr_t *handle, gfp_t gfp,
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unsigned long attrs)
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{
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bool coherent = is_device_dma_coherent(dev);
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bool coherent = dev_is_dma_coherent(dev);
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int ioprot = dma_info_to_prot(DMA_BIDIRECTIONAL, coherent, attrs);
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size_t iosize = size;
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void *addr;
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@ -569,7 +409,7 @@ static void *__iommu_alloc_attrs(struct device *dev, size_t size,
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addr = NULL;
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}
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} else if (attrs & DMA_ATTR_FORCE_CONTIGUOUS) {
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pgprot_t prot = __get_dma_pgprot(attrs, PAGE_KERNEL, coherent);
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pgprot_t prot = arch_dma_mmap_pgprot(dev, PAGE_KERNEL, attrs);
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struct page *page;
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page = dma_alloc_from_contiguous(dev, size >> PAGE_SHIFT,
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@ -596,7 +436,7 @@ static void *__iommu_alloc_attrs(struct device *dev, size_t size,
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size >> PAGE_SHIFT);
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}
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} else {
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pgprot_t prot = __get_dma_pgprot(attrs, PAGE_KERNEL, coherent);
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pgprot_t prot = arch_dma_mmap_pgprot(dev, PAGE_KERNEL, attrs);
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struct page **pages;
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pages = iommu_dma_alloc(dev, iosize, gfp, attrs, ioprot,
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@ -658,8 +498,7 @@ static int __iommu_mmap_attrs(struct device *dev, struct vm_area_struct *vma,
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struct vm_struct *area;
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int ret;
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vma->vm_page_prot = __get_dma_pgprot(attrs, vma->vm_page_prot,
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is_device_dma_coherent(dev));
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vma->vm_page_prot = arch_dma_mmap_pgprot(dev, vma->vm_page_prot, attrs);
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if (dma_mmap_from_dev_coherent(dev, vma, cpu_addr, size, &ret))
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return ret;
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@ -709,11 +548,11 @@ static void __iommu_sync_single_for_cpu(struct device *dev,
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{
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phys_addr_t phys;
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if (is_device_dma_coherent(dev))
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if (dev_is_dma_coherent(dev))
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return;
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phys = iommu_iova_to_phys(iommu_get_domain_for_dev(dev), dev_addr);
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__dma_unmap_area(phys_to_virt(phys), size, dir);
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arch_sync_dma_for_cpu(dev, phys, size, dir);
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}
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static void __iommu_sync_single_for_device(struct device *dev,
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@ -722,11 +561,11 @@ static void __iommu_sync_single_for_device(struct device *dev,
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{
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phys_addr_t phys;
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if (is_device_dma_coherent(dev))
|
||||
if (dev_is_dma_coherent(dev))
|
||||
return;
|
||||
|
||||
phys = iommu_iova_to_phys(iommu_get_domain_for_dev(dev), dev_addr);
|
||||
__dma_map_area(phys_to_virt(phys), size, dir);
|
||||
arch_sync_dma_for_device(dev, phys, size, dir);
|
||||
}
|
||||
|
||||
static dma_addr_t __iommu_map_page(struct device *dev, struct page *page,
|
||||
|
|
@ -734,7 +573,7 @@ static dma_addr_t __iommu_map_page(struct device *dev, struct page *page,
|
|||
enum dma_data_direction dir,
|
||||
unsigned long attrs)
|
||||
{
|
||||
bool coherent = is_device_dma_coherent(dev);
|
||||
bool coherent = dev_is_dma_coherent(dev);
|
||||
int prot = dma_info_to_prot(dir, coherent, attrs);
|
||||
dma_addr_t dev_addr = iommu_dma_map_page(dev, page, offset, size, prot);
|
||||
|
||||
|
|
@ -762,11 +601,11 @@ static void __iommu_sync_sg_for_cpu(struct device *dev,
|
|||
struct scatterlist *sg;
|
||||
int i;
|
||||
|
||||
if (is_device_dma_coherent(dev))
|
||||
if (dev_is_dma_coherent(dev))
|
||||
return;
|
||||
|
||||
for_each_sg(sgl, sg, nelems, i)
|
||||
__dma_unmap_area(sg_virt(sg), sg->length, dir);
|
||||
arch_sync_dma_for_cpu(dev, sg_phys(sg), sg->length, dir);
|
||||
}
|
||||
|
||||
static void __iommu_sync_sg_for_device(struct device *dev,
|
||||
|
|
@ -776,18 +615,18 @@ static void __iommu_sync_sg_for_device(struct device *dev,
|
|||
struct scatterlist *sg;
|
||||
int i;
|
||||
|
||||
if (is_device_dma_coherent(dev))
|
||||
if (dev_is_dma_coherent(dev))
|
||||
return;
|
||||
|
||||
for_each_sg(sgl, sg, nelems, i)
|
||||
__dma_map_area(sg_virt(sg), sg->length, dir);
|
||||
arch_sync_dma_for_device(dev, sg_phys(sg), sg->length, dir);
|
||||
}
|
||||
|
||||
static int __iommu_map_sg_attrs(struct device *dev, struct scatterlist *sgl,
|
||||
int nelems, enum dma_data_direction dir,
|
||||
unsigned long attrs)
|
||||
{
|
||||
bool coherent = is_device_dma_coherent(dev);
|
||||
bool coherent = dev_is_dma_coherent(dev);
|
||||
|
||||
if ((attrs & DMA_ATTR_SKIP_CPU_SYNC) == 0)
|
||||
__iommu_sync_sg_for_device(dev, sgl, nelems, dir);
|
||||
|
|
@ -879,9 +718,9 @@ void arch_setup_dma_ops(struct device *dev, u64 dma_base, u64 size,
|
|||
const struct iommu_ops *iommu, bool coherent)
|
||||
{
|
||||
if (!dev->dma_ops)
|
||||
dev->dma_ops = &arm64_swiotlb_dma_ops;
|
||||
dev->dma_ops = &swiotlb_dma_ops;
|
||||
|
||||
dev->archdata.dma_coherent = coherent;
|
||||
dev->dma_coherent = coherent;
|
||||
__iommu_setup_dma_ops(dev, dma_base, size, iommu);
|
||||
|
||||
#ifdef CONFIG_XEN
|
||||
|
|
|
|||
Loading…
Reference in New Issue